1 //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class prints an AArch64 MCInst to a .s file.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H
15 #define LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H
17 #include "MCTargetDesc/AArch64MCTargetDesc.h"
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/MC/MCInstPrinter.h"
20 #include "../Utils/AArch64BaseInfo.h"
24 class AArch64InstPrinter : public MCInstPrinter {
26 AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
27 const MCRegisterInfo &MRI);
29 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
30 const MCSubtargetInfo &STI) override;
31 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
33 // Autogenerated by tblgen.
34 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
36 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
38 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
39 unsigned PrintMethodIdx,
40 const MCSubtargetInfo &STI,
43 virtual StringRef getRegName(unsigned RegNo) const {
44 return getRegisterName(RegNo);
47 static const char *getRegisterName(unsigned RegNo,
48 unsigned AltIdx = AArch64::NoRegAltName);
51 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
54 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
56 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
58 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
60 template <typename T> void printImmSVE(T Value, raw_ostream &O);
61 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
64 void printPostIncOperand(const MCInst *MI, unsigned OpNo,
65 const MCSubtargetInfo &STI, raw_ostream &O) {
66 printPostIncOperand(MI, OpNo, Amount, O);
69 void printVRegOperand(const MCInst *MI, unsigned OpNo,
70 const MCSubtargetInfo &STI, raw_ostream &O);
71 void printSysCROperand(const MCInst *MI, unsigned OpNo,
72 const MCSubtargetInfo &STI, raw_ostream &O);
73 void printAddSubImm(const MCInst *MI, unsigned OpNum,
74 const MCSubtargetInfo &STI, raw_ostream &O);
76 void printLogicalImm(const MCInst *MI, unsigned OpNum,
77 const MCSubtargetInfo &STI, raw_ostream &O);
78 void printShifter(const MCInst *MI, unsigned OpNum,
79 const MCSubtargetInfo &STI, raw_ostream &O);
80 void printShiftedRegister(const MCInst *MI, unsigned OpNum,
81 const MCSubtargetInfo &STI, raw_ostream &O);
82 void printExtendedRegister(const MCInst *MI, unsigned OpNum,
83 const MCSubtargetInfo &STI, raw_ostream &O);
84 void printArithExtend(const MCInst *MI, unsigned OpNum,
85 const MCSubtargetInfo &STI, raw_ostream &O);
87 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
88 char SrcRegKind, unsigned Width);
89 template <char SrcRegKind, unsigned Width>
90 void printMemExtend(const MCInst *MI, unsigned OpNum,
91 const MCSubtargetInfo &STI, raw_ostream &O) {
92 printMemExtend(MI, OpNum, O, SrcRegKind, Width);
94 template <bool SignedExtend, int ExtWidth, char SrcRegKind, char Suffix>
95 void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum,
96 const MCSubtargetInfo &STI, raw_ostream &O);
97 void printCondCode(const MCInst *MI, unsigned OpNum,
98 const MCSubtargetInfo &STI, raw_ostream &O);
99 void printInverseCondCode(const MCInst *MI, unsigned OpNum,
100 const MCSubtargetInfo &STI, raw_ostream &O);
101 void printAlignedLabel(const MCInst *MI, unsigned OpNum,
102 const MCSubtargetInfo &STI, raw_ostream &O);
103 void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
105 void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
109 void printUImm12Offset(const MCInst *MI, unsigned OpNum,
110 const MCSubtargetInfo &STI, raw_ostream &O) {
111 printUImm12Offset(MI, OpNum, Scale, O);
114 template <int BitWidth>
115 void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
116 const MCSubtargetInfo &STI, raw_ostream &O) {
117 printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
120 void printAMNoIndex(const MCInst *MI, unsigned OpNum,
121 const MCSubtargetInfo &STI, raw_ostream &O);
124 void printImmScale(const MCInst *MI, unsigned OpNum,
125 const MCSubtargetInfo &STI, raw_ostream &O);
127 template <bool IsSVEPrefetch = false>
128 void printPrefetchOp(const MCInst *MI, unsigned OpNum,
129 const MCSubtargetInfo &STI, raw_ostream &O);
131 void printPSBHintOp(const MCInst *MI, unsigned OpNum,
132 const MCSubtargetInfo &STI, raw_ostream &O);
134 void printFPImmOperand(const MCInst *MI, unsigned OpNum,
135 const MCSubtargetInfo &STI, raw_ostream &O);
137 void printVectorList(const MCInst *MI, unsigned OpNum,
138 const MCSubtargetInfo &STI, raw_ostream &O,
139 StringRef LayoutSuffix);
141 /// Print a list of vector registers where the type suffix is implicit
142 /// (i.e. attached to the instruction rather than the registers).
143 void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
144 const MCSubtargetInfo &STI,
147 template <unsigned NumLanes, char LaneKind>
148 void printTypedVectorList(const MCInst *MI, unsigned OpNum,
149 const MCSubtargetInfo &STI, raw_ostream &O);
151 void printVectorIndex(const MCInst *MI, unsigned OpNum,
152 const MCSubtargetInfo &STI, raw_ostream &O);
153 void printAdrpLabel(const MCInst *MI, unsigned OpNum,
154 const MCSubtargetInfo &STI, raw_ostream &O);
155 void printBarrierOption(const MCInst *MI, unsigned OpNum,
156 const MCSubtargetInfo &STI, raw_ostream &O);
157 void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
158 const MCSubtargetInfo &STI, raw_ostream &O);
159 void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
160 const MCSubtargetInfo &STI, raw_ostream &O);
161 void printSystemPStateField(const MCInst *MI, unsigned OpNum,
162 const MCSubtargetInfo &STI, raw_ostream &O);
163 void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
164 const MCSubtargetInfo &STI, raw_ostream &O);
165 template<int64_t Angle, int64_t Remainder>
166 void printComplexRotationOp(const MCInst *MI, unsigned OpNo,
167 const MCSubtargetInfo &STI, raw_ostream &O);
168 template<unsigned size>
169 void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
170 const MCSubtargetInfo &STI,
172 template <typename T>
173 void printImm8OptLsl(const MCInst *MI, unsigned OpNum,
174 const MCSubtargetInfo &STI, raw_ostream &O);
175 template <typename T>
176 void printSVELogicalImm(const MCInst *MI, unsigned OpNum,
177 const MCSubtargetInfo &STI, raw_ostream &O);
178 void printSVEPattern(const MCInst *MI, unsigned OpNum,
179 const MCSubtargetInfo &STI, raw_ostream &O);
181 void printSVERegOp(const MCInst *MI, unsigned OpNum,
182 const MCSubtargetInfo &STI, raw_ostream &O);
183 void printGPR64as32(const MCInst *MI, unsigned OpNum,
184 const MCSubtargetInfo &STI, raw_ostream &O);
186 void printZPRasFPR(const MCInst *MI, unsigned OpNum,
187 const MCSubtargetInfo &STI, raw_ostream &O);
188 template <unsigned ImmIs0, unsigned ImmIs1>
189 void printExactFPImm(const MCInst *MI, unsigned OpNum,
190 const MCSubtargetInfo &STI, raw_ostream &O);
193 class AArch64AppleInstPrinter : public AArch64InstPrinter {
195 AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
196 const MCRegisterInfo &MRI);
198 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
199 const MCSubtargetInfo &STI) override;
201 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
202 raw_ostream &O) override;
203 bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
204 raw_ostream &O) override;
205 void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
206 unsigned PrintMethodIdx,
207 const MCSubtargetInfo &STI,
208 raw_ostream &O) override;
210 StringRef getRegName(unsigned RegNo) const override {
211 return getRegisterName(RegNo);
214 static const char *getRegisterName(unsigned RegNo,
215 unsigned AltIdx = AArch64::NoRegAltName);
218 } // end namespace llvm
220 #endif // LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H