1 //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class prints an AArch64 MCInst to a .s file.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H
15 #define LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H
17 #include "MCTargetDesc/AArch64MCTargetDesc.h"
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/MC/MCInstPrinter.h"
23 class AArch64InstPrinter : public MCInstPrinter {
25 AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
26 const MCRegisterInfo &MRI);
28 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
29 const MCSubtargetInfo &STI) override;
30 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
32 // Autogenerated by tblgen.
33 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
35 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
37 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
38 unsigned PrintMethodIdx,
39 const MCSubtargetInfo &STI,
42 virtual StringRef getRegName(unsigned RegNo) const {
43 return getRegisterName(RegNo);
46 static const char *getRegisterName(unsigned RegNo,
47 unsigned AltIdx = AArch64::NoRegAltName);
50 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
53 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
55 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
57 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
59 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
62 void printPostIncOperand(const MCInst *MI, unsigned OpNo,
63 const MCSubtargetInfo &STI, raw_ostream &O) {
64 printPostIncOperand(MI, OpNo, Amount, O);
67 void printVRegOperand(const MCInst *MI, unsigned OpNo,
68 const MCSubtargetInfo &STI, raw_ostream &O);
69 void printSysCROperand(const MCInst *MI, unsigned OpNo,
70 const MCSubtargetInfo &STI, raw_ostream &O);
71 void printAddSubImm(const MCInst *MI, unsigned OpNum,
72 const MCSubtargetInfo &STI, raw_ostream &O);
73 void printLogicalImm32(const MCInst *MI, unsigned OpNum,
74 const MCSubtargetInfo &STI, raw_ostream &O);
75 void printLogicalImm64(const MCInst *MI, unsigned OpNum,
76 const MCSubtargetInfo &STI, raw_ostream &O);
77 void printShifter(const MCInst *MI, unsigned OpNum,
78 const MCSubtargetInfo &STI, raw_ostream &O);
79 void printShiftedRegister(const MCInst *MI, unsigned OpNum,
80 const MCSubtargetInfo &STI, raw_ostream &O);
81 void printExtendedRegister(const MCInst *MI, unsigned OpNum,
82 const MCSubtargetInfo &STI, raw_ostream &O);
83 void printArithExtend(const MCInst *MI, unsigned OpNum,
84 const MCSubtargetInfo &STI, raw_ostream &O);
86 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
87 char SrcRegKind, unsigned Width);
88 template <char SrcRegKind, unsigned Width>
89 void printMemExtend(const MCInst *MI, unsigned OpNum,
90 const MCSubtargetInfo &STI, raw_ostream &O) {
91 printMemExtend(MI, OpNum, O, SrcRegKind, Width);
94 void printCondCode(const MCInst *MI, unsigned OpNum,
95 const MCSubtargetInfo &STI, raw_ostream &O);
96 void printInverseCondCode(const MCInst *MI, unsigned OpNum,
97 const MCSubtargetInfo &STI, raw_ostream &O);
98 void printAlignedLabel(const MCInst *MI, unsigned OpNum,
99 const MCSubtargetInfo &STI, raw_ostream &O);
100 void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
102 void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
106 void printUImm12Offset(const MCInst *MI, unsigned OpNum,
107 const MCSubtargetInfo &STI, raw_ostream &O) {
108 printUImm12Offset(MI, OpNum, Scale, O);
111 template <int BitWidth>
112 void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
113 const MCSubtargetInfo &STI, raw_ostream &O) {
114 printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
117 void printAMNoIndex(const MCInst *MI, unsigned OpNum,
118 const MCSubtargetInfo &STI, raw_ostream &O);
121 void printImmScale(const MCInst *MI, unsigned OpNum,
122 const MCSubtargetInfo &STI, raw_ostream &O);
124 void printPrefetchOp(const MCInst *MI, unsigned OpNum,
125 const MCSubtargetInfo &STI, raw_ostream &O);
127 void printPSBHintOp(const MCInst *MI, unsigned OpNum,
128 const MCSubtargetInfo &STI, raw_ostream &O);
130 void printFPImmOperand(const MCInst *MI, unsigned OpNum,
131 const MCSubtargetInfo &STI, raw_ostream &O);
133 void printVectorList(const MCInst *MI, unsigned OpNum,
134 const MCSubtargetInfo &STI, raw_ostream &O,
135 StringRef LayoutSuffix);
137 /// Print a list of vector registers where the type suffix is implicit
138 /// (i.e. attached to the instruction rather than the registers).
139 void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
140 const MCSubtargetInfo &STI,
143 template <unsigned NumLanes, char LaneKind>
144 void printTypedVectorList(const MCInst *MI, unsigned OpNum,
145 const MCSubtargetInfo &STI, raw_ostream &O);
147 void printVectorIndex(const MCInst *MI, unsigned OpNum,
148 const MCSubtargetInfo &STI, raw_ostream &O);
149 void printAdrpLabel(const MCInst *MI, unsigned OpNum,
150 const MCSubtargetInfo &STI, raw_ostream &O);
151 void printBarrierOption(const MCInst *MI, unsigned OpNum,
152 const MCSubtargetInfo &STI, raw_ostream &O);
153 void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
154 const MCSubtargetInfo &STI, raw_ostream &O);
155 void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
156 const MCSubtargetInfo &STI, raw_ostream &O);
157 void printSystemPStateField(const MCInst *MI, unsigned OpNum,
158 const MCSubtargetInfo &STI, raw_ostream &O);
159 void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
160 const MCSubtargetInfo &STI, raw_ostream &O);
161 template<int64_t Angle, int64_t Remainder>
162 void printComplexRotationOp(const MCInst *MI, unsigned OpNo,
163 const MCSubtargetInfo &STI, raw_ostream &O);
164 template<unsigned size>
165 void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
166 const MCSubtargetInfo &STI,
169 void printSVERegOp(const MCInst *MI, unsigned OpNum,
170 const MCSubtargetInfo &STI, raw_ostream &O);
173 class AArch64AppleInstPrinter : public AArch64InstPrinter {
175 AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
176 const MCRegisterInfo &MRI);
178 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
179 const MCSubtargetInfo &STI) override;
181 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
182 raw_ostream &O) override;
183 bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
184 raw_ostream &O) override;
185 void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
186 unsigned PrintMethodIdx,
187 const MCSubtargetInfo &STI,
188 raw_ostream &O) override;
190 StringRef getRegName(unsigned RegNo) const override {
191 return getRegisterName(RegNo);
194 static const char *getRegisterName(unsigned RegNo,
195 unsigned AltIdx = AArch64::NoRegAltName);
198 } // end namespace llvm
200 #endif // LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H