1 //==- AMDGPUArgumentrUsageInfo.h - Function Arg Usage Info -------*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUARGUMENTUSAGEINFO_H
11 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUARGUMENTUSAGEINFO_H
13 #include "llvm/ADT/DenseMap.h"
14 #include "llvm/IR/Function.h"
15 #include "llvm/Pass.h"
23 class TargetRegisterClass;
24 class TargetRegisterInfo;
26 struct ArgDescriptor {
28 friend struct AMDGPUFunctionArgInfo;
29 friend class AMDGPUArgumentUsageInfo;
39 ArgDescriptor(unsigned Val = 0, bool IsStack = false, bool IsSet = false)
40 : Register(Val), IsStack(IsStack), IsSet(IsSet) {}
42 static ArgDescriptor createRegister(unsigned Reg) {
43 return ArgDescriptor(Reg, false, true);
46 static ArgDescriptor createStack(unsigned Reg) {
47 return ArgDescriptor(Reg, true, true);
54 explicit operator bool() const {
58 bool isRegister() const {
62 unsigned getRegister() const {
67 unsigned getStackOffset() const {
72 void print(raw_ostream &OS, const TargetRegisterInfo *TRI = nullptr) const;
75 inline raw_ostream &operator<<(raw_ostream &OS, const ArgDescriptor &Arg) {
80 struct AMDGPUFunctionArgInfo {
83 PRIVATE_SEGMENT_BUFFER = 0,
86 KERNARG_SEGMENT_PTR = 3,
88 FLAT_SCRATCH_INIT = 5,
92 PRIVATE_SEGMENT_WAVE_BYTE_OFFSET = 14,
93 IMPLICIT_BUFFER_PTR = 15,
94 IMPLICIT_ARG_PTR = 16,
100 FIRST_VGPR_VALUE = WORKITEM_ID_X
103 // Kernel input registers setup for the HSA ABI in allocation order.
105 // User SGPRs in kernels
106 // XXX - Can these require argument spills?
107 ArgDescriptor PrivateSegmentBuffer;
108 ArgDescriptor DispatchPtr;
109 ArgDescriptor QueuePtr;
110 ArgDescriptor KernargSegmentPtr;
111 ArgDescriptor DispatchID;
112 ArgDescriptor FlatScratchInit;
113 ArgDescriptor PrivateSegmentSize;
115 // System SGPRs in kernels.
116 ArgDescriptor WorkGroupIDX;
117 ArgDescriptor WorkGroupIDY;
118 ArgDescriptor WorkGroupIDZ;
119 ArgDescriptor WorkGroupInfo;
120 ArgDescriptor PrivateSegmentWaveByteOffset;
122 // Pointer with offset from kernargsegmentptr to where special ABI arguments
123 // are passed to callable functions.
124 ArgDescriptor ImplicitArgPtr;
126 // Input registers for non-HSA ABI
127 ArgDescriptor ImplicitBufferPtr = 0;
129 // VGPRs inputs. These are always v0, v1 and v2 for entry functions.
130 ArgDescriptor WorkItemIDX;
131 ArgDescriptor WorkItemIDY;
132 ArgDescriptor WorkItemIDZ;
134 std::pair<const ArgDescriptor *, const TargetRegisterClass *>
135 getPreloadedValue(PreloadedValue Value) const;
138 class AMDGPUArgumentUsageInfo : public ImmutablePass {
140 static const AMDGPUFunctionArgInfo ExternFunctionInfo;
141 DenseMap<const Function *, AMDGPUFunctionArgInfo> ArgInfoMap;
146 AMDGPUArgumentUsageInfo() : ImmutablePass(ID) { }
148 void getAnalysisUsage(AnalysisUsage &AU) const override {
149 AU.setPreservesAll();
152 bool doInitialization(Module &M) override;
153 bool doFinalization(Module &M) override;
155 void print(raw_ostream &OS, const Module *M = nullptr) const override;
157 void setFuncArgInfo(const Function &F, const AMDGPUFunctionArgInfo &ArgInfo) {
158 ArgInfoMap[&F] = ArgInfo;
161 const AMDGPUFunctionArgInfo &lookupFuncArgInfo(const Function &F) const {
162 auto I = ArgInfoMap.find(&F);
163 if (I == ArgInfoMap.end()) {
164 assert(F.isDeclaration());
165 return ExternFunctionInfo;
172 } // end namespace llvm