1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file implements the targeting of the Machinelegalizer class for
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
15 #include "AMDGPULegalizerInfo.h"
16 #include "llvm/CodeGen/TargetOpcodes.h"
17 #include "llvm/CodeGen/ValueTypes.h"
18 #include "llvm/IR/DerivedTypes.h"
19 #include "llvm/IR/Type.h"
20 #include "llvm/Support/Debug.h"
24 AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
25 using namespace TargetOpcode;
27 const LLT S1= LLT::scalar(1);
28 const LLT V2S16 = LLT::vector(2, 16);
29 const LLT S32 = LLT::scalar(32);
30 const LLT S64 = LLT::scalar(64);
31 const LLT P1 = LLT::pointer(1, 64);
32 const LLT P2 = LLT::pointer(2, 64);
34 setAction({G_ADD, S32}, Legal);
35 setAction({G_AND, S32}, Legal);
37 setAction({G_BITCAST, V2S16}, Legal);
38 setAction({G_BITCAST, 1, S32}, Legal);
40 setAction({G_BITCAST, S32}, Legal);
41 setAction({G_BITCAST, 1, V2S16}, Legal);
43 // FIXME: i1 operands to intrinsics should always be legal, but other i1
44 // values may not be legal. We need to figure out how to distinguish
45 // between these two scenarios.
46 setAction({G_CONSTANT, S1}, Legal);
47 setAction({G_CONSTANT, S32}, Legal);
48 setAction({G_CONSTANT, S64}, Legal);
50 setAction({G_FCONSTANT, S32}, Legal);
52 setAction({G_FADD, S32}, Legal);
54 setAction({G_FMUL, S32}, Legal);
56 setAction({G_GEP, P1}, Legal);
57 setAction({G_GEP, P2}, Legal);
58 setAction({G_GEP, 1, S64}, Legal);
60 setAction({G_ICMP, S1}, Legal);
61 setAction({G_ICMP, 1, S32}, Legal);
63 setAction({G_LOAD, P1}, Legal);
64 setAction({G_LOAD, P2}, Legal);
65 setAction({G_LOAD, S32}, Legal);
66 setAction({G_LOAD, 1, P1}, Legal);
67 setAction({G_LOAD, 1, P2}, Legal);
69 setAction({G_OR, S32}, Legal);
71 setAction({G_SELECT, S32}, Legal);
72 setAction({G_SELECT, 1, S1}, Legal);
74 setAction({G_SHL, S32}, Legal);
76 setAction({G_STORE, S32}, Legal);
77 setAction({G_STORE, 1, P1}, Legal);
79 // FIXME: When RegBankSelect inserts copies, it will only create new
80 // registers with scalar types. This means we can end up with
81 // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer
82 // operands. In assert builds, the instruction selector will assert
83 // if it sees a generic instruction which isn't legal, so we need to
84 // tell it that scalar types are legal for pointer operands
85 setAction({G_GEP, S64}, Legal);
86 setAction({G_LOAD, 1, S64}, Legal);
87 setAction({G_STORE, 1, S64}, Legal);