1 //===---------------------- GCNRegPressure.h -*- C++ -*--------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
15 #define LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
17 #include "AMDGPUSubtarget.h"
23 struct GCNRegPressure {
36 bool empty() const { return getSGPRNum() == 0 && getVGPRNum() == 0; }
38 void clear() { std::fill(&Value[0], &Value[TOTAL_KINDS], 0); }
40 unsigned getSGPRNum() const { return Value[SGPR32]; }
41 unsigned getVGPRNum() const { return Value[VGPR32]; }
43 unsigned getVGPRTuplesWeight() const { return Value[VGPR_TUPLE]; }
44 unsigned getSGPRTuplesWeight() const { return Value[SGPR_TUPLE]; }
46 unsigned getOccupancy(const SISubtarget &ST) const {
47 return std::min(ST.getOccupancyWithNumSGPRs(getSGPRNum()),
48 ST.getOccupancyWithNumVGPRs(getVGPRNum()));
51 void inc(unsigned Reg,
54 const MachineRegisterInfo &MRI);
56 bool higherOccupancy(const SISubtarget &ST, const GCNRegPressure& O) const {
57 return getOccupancy(ST) > O.getOccupancy(ST);
60 bool less(const SISubtarget &ST, const GCNRegPressure& O,
61 unsigned MaxOccupancy = std::numeric_limits<unsigned>::max()) const;
63 bool operator==(const GCNRegPressure &O) const {
64 return std::equal(&Value[0], &Value[TOTAL_KINDS], O.Value);
67 bool operator!=(const GCNRegPressure &O) const {
71 void print(raw_ostream &OS, const SISubtarget *ST=nullptr) const;
72 void dump() const { print(dbgs()); }
75 unsigned Value[TOTAL_KINDS];
77 static unsigned getRegKind(unsigned Reg, const MachineRegisterInfo &MRI);
79 friend GCNRegPressure max(const GCNRegPressure &P1,
80 const GCNRegPressure &P2);
83 inline GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2) {
85 for (unsigned I = 0; I < GCNRegPressure::TOTAL_KINDS; ++I)
86 Res.Value[I] = std::max(P1.Value[I], P2.Value[I]);
92 typedef DenseMap<unsigned, LaneBitmask> LiveRegSet;
95 const LiveIntervals &LIS;
97 GCNRegPressure CurPressure, MaxPressure;
98 const MachineInstr *LastTrackedMI = nullptr;
99 mutable const MachineRegisterInfo *MRI = nullptr;
100 GCNRPTracker(const LiveIntervals &LIS_) : LIS(LIS_) {}
102 // live regs for the current state
103 const decltype(LiveRegs) &getLiveRegs() const { return LiveRegs; }
104 const MachineInstr *getLastTrackedMI() const { return LastTrackedMI; }
106 void clearMaxPressure() { MaxPressure.clear(); }
108 // returns MaxPressure, resetting it
109 decltype(MaxPressure) moveMaxPressure() {
110 auto Res = MaxPressure;
114 decltype(LiveRegs) moveLiveRegs() {
115 return std::move(LiveRegs);
117 static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
118 const MachineRegisterInfo &MRI);
121 class GCNUpwardRPTracker : public GCNRPTracker {
123 GCNUpwardRPTracker(const LiveIntervals &LIS_) : GCNRPTracker(LIS_) {}
124 // reset tracker to the point just below MI
125 // filling live regs upon this point using LIS
126 void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
128 // move to the state just above the MI
129 void recede(const MachineInstr &MI);
131 // checks whether the tracker's state after receding MI corresponds
132 // to reported by LIS
133 bool isValid() const;
136 class GCNDownwardRPTracker : public GCNRPTracker {
137 // Last position of reset or advanceBeforeNext
138 MachineBasicBlock::const_iterator NextMI;
140 MachineBasicBlock::const_iterator MBBEnd;
143 GCNDownwardRPTracker(const LiveIntervals &LIS_) : GCNRPTracker(LIS_) {}
145 const MachineBasicBlock::const_iterator getNext() const { return NextMI; }
147 // Reset tracker to the point before the MI
148 // filling live regs upon this point using LIS.
149 // Returns false if block is empty except debug values.
150 bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
152 // Move to the state right before the next MI. Returns false if reached
154 bool advanceBeforeNext();
156 // Move to the state at the MI, advanceBeforeNext has to be called first.
157 void advanceToNext();
159 // Move to the state at the next MI. Returns false if reached end of block.
162 // Advance instructions until before End.
163 bool advance(MachineBasicBlock::const_iterator End);
165 // Reset to Begin and advance to End.
166 bool advance(MachineBasicBlock::const_iterator Begin,
167 MachineBasicBlock::const_iterator End,
168 const LiveRegSet *LiveRegsCopy = nullptr);
171 LaneBitmask getLiveLaneMask(unsigned Reg,
173 const LiveIntervals &LIS,
174 const MachineRegisterInfo &MRI);
176 GCNRPTracker::LiveRegSet getLiveRegs(SlotIndex SI,
177 const LiveIntervals &LIS,
178 const MachineRegisterInfo &MRI);
180 inline GCNRPTracker::LiveRegSet getLiveRegsAfter(const MachineInstr &MI,
181 const LiveIntervals &LIS) {
182 return getLiveRegs(LIS.getInstructionIndex(MI).getDeadSlot(), LIS,
183 MI.getParent()->getParent()->getRegInfo());
186 inline GCNRPTracker::LiveRegSet getLiveRegsBefore(const MachineInstr &MI,
187 const LiveIntervals &LIS) {
188 return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS,
189 MI.getParent()->getParent()->getRegInfo());
192 template <typename Range>
193 GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI,
196 for (const auto &RM : LiveRegs)
197 Res.inc(RM.first, LaneBitmask::getNone(), RM.second, MRI);
201 void printLivesAt(SlotIndex SI,
202 const LiveIntervals &LIS,
203 const MachineRegisterInfo &MRI);
205 } // End namespace llvm
207 #endif // LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H