contrib/llvm/lib/Target/AMDGPU/MIMGInstructions.td

   1 //===-- MIMGInstructions.td - MIMG Instruction Defintions -----------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 class MIMG_Mask <string op, int channels> {
  11   string Op = op;
  12   int Channels = channels;
  13 }
  14
  15 class mimg <bits<7> si, bits<7> vi = si> {
  16   field bits<7> SI = si;
  17   field bits<7> VI = vi;
  18 }
  19
  20 class MIMG_Helper <dag outs, dag ins, string asm,
  21                    string dns=""> : MIMG<outs, ins, asm,[]> {
  22   let mayLoad = 1;
  23   let mayStore = 0;
  24   let hasPostISelHook = 1;
  25   let DecoderNamespace = dns;
  26   let isAsmParserOnly = !if(!eq(dns,""), 1, 0);
  27   let AsmMatchConverter = "cvtMIMG";
  28   let usesCustomInserter = 1;
  29   let SchedRW = [WriteVMEM];
  30 }
  31
  32 class MIMG_NoSampler_Helper <bits<7> op, string asm,
  33                              RegisterClass dst_rc,
  34                              RegisterClass addr_rc,
  35                              string dns=""> : MIMG_Helper <
  36   (outs dst_rc:$vdata),
  37   (ins addr_rc:$vaddr, SReg_256:$srsrc,
  38        dmask:$dmask, unorm:$unorm, GLC:$glc, slc:$slc,
  39        r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
  40   asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da",
  41   dns>, MIMGe<op> {
  42   let ssamp = 0;
  43 }
  44
  45 multiclass MIMG_NoSampler_Src_Helper <bits<7> op, string asm,
  46                                       RegisterClass dst_rc,
  47                                       int channels> {
  48   def _V1 : MIMG_NoSampler_Helper <op, asm, dst_rc, VGPR_32,
  49                                    !if(!eq(channels, 1), "AMDGPU", "")>,
  50             MIMG_Mask<asm#"_V1", channels>;
  51   def _V2 : MIMG_NoSampler_Helper <op, asm, dst_rc, VReg_64>,
  52             MIMG_Mask<asm#"_V2", channels>;
  53   def _V4 : MIMG_NoSampler_Helper <op, asm, dst_rc, VReg_128>,
  54             MIMG_Mask<asm#"_V4", channels>;
  55 }
  56
  57 multiclass MIMG_NoSampler <bits<7> op, string asm> {
  58   defm _V1 : MIMG_NoSampler_Src_Helper <op, asm, VGPR_32, 1>;
  59   defm _V2 : MIMG_NoSampler_Src_Helper <op, asm, VReg_64, 2>;
  60   defm _V3 : MIMG_NoSampler_Src_Helper <op, asm, VReg_96, 3>;
  61   defm _V4 : MIMG_NoSampler_Src_Helper <op, asm, VReg_128, 4>;
  62 }
  63
  64 class MIMG_Store_Helper <bits<7> op, string asm,
  65                          RegisterClass data_rc,
  66                          RegisterClass addr_rc> : MIMG_Helper <
  67   (outs),
  68   (ins data_rc:$vdata, addr_rc:$vaddr, SReg_256:$srsrc,
  69        dmask:$dmask, unorm:$unorm, GLC:$glc, slc:$slc,
  70        r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
  71   asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
  72      >, MIMGe<op> {
  73   let ssamp = 0;
  74   let mayLoad = 1; // TableGen requires this for matching with the intrinsics
  75   let mayStore = 1;
  76   let hasSideEffects = 1;
  77   let hasPostISelHook = 0;
  78   let DisableWQM = 1;
  79 }
  80
  81 multiclass MIMG_Store_Addr_Helper <bits<7> op, string asm,
  82                                   RegisterClass data_rc,
  83                                   int channels> {
  84   def _V1 : MIMG_Store_Helper <op, asm, data_rc, VGPR_32>,
  85             MIMG_Mask<asm#"_V1", channels>;
  86   def _V2 : MIMG_Store_Helper <op, asm, data_rc, VReg_64>,
  87             MIMG_Mask<asm#"_V2", channels>;
  88   def _V4 : MIMG_Store_Helper <op, asm, data_rc, VReg_128>,
  89             MIMG_Mask<asm#"_V4", channels>;
  90 }
  91
  92 multiclass MIMG_Store <bits<7> op, string asm> {
  93   defm _V1 : MIMG_Store_Addr_Helper <op, asm, VGPR_32, 1>;
  94   defm _V2 : MIMG_Store_Addr_Helper <op, asm, VReg_64, 2>;
  95   defm _V3 : MIMG_Store_Addr_Helper <op, asm, VReg_96, 3>;
  96   defm _V4 : MIMG_Store_Addr_Helper <op, asm, VReg_128, 4>;
  97 }
  98
  99 class MIMG_Atomic_Helper <string asm, RegisterClass data_rc,
 100                           RegisterClass addr_rc> : MIMG_Helper <
 101     (outs data_rc:$vdst),
 102     (ins data_rc:$vdata, addr_rc:$vaddr, SReg_256:$srsrc,
 103          dmask:$dmask, unorm:$unorm, GLC:$glc, slc:$slc,
 104          r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
 105     asm#" $vdst, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
 106   > {
 107   let mayStore = 1;
 108   let hasSideEffects = 1;
 109   let hasPostISelHook = 0;
 110   let DisableWQM = 1;
 111   let Constraints = "$vdst = $vdata";
 112   let AsmMatchConverter = "cvtMIMGAtomic";
 113 }
 114
 115 class MIMG_Atomic_Real_si<mimg op, string name, string asm,
 116   RegisterClass data_rc, RegisterClass addr_rc> :
 117   MIMG_Atomic_Helper<asm, data_rc, addr_rc>,
 118   SIMCInstr<name, SIEncodingFamily.SI>,
 119   MIMGe<op.SI> {
 120   let isCodeGenOnly = 0;
 121   let AssemblerPredicates = [isSICI];
 122   let DecoderNamespace = "SICI";
 123   let DisableDecoder = DisableSIDecoder;
 124 }
 125
 126 class MIMG_Atomic_Real_vi<mimg op, string name, string asm,
 127   RegisterClass data_rc, RegisterClass addr_rc> :
 128   MIMG_Atomic_Helper<asm, data_rc, addr_rc>,
 129   SIMCInstr<name, SIEncodingFamily.VI>,
 130   MIMGe<op.VI> {
 131   let isCodeGenOnly = 0;
 132   let AssemblerPredicates = [isVI];
 133   let DecoderNamespace = "VI";
 134   let DisableDecoder = DisableVIDecoder;
 135 }
 136
 137 multiclass MIMG_Atomic_Helper_m <mimg op, string name, string asm,
 138                                  RegisterClass data_rc, RegisterClass addr_rc> {
 139   let isPseudo = 1, isCodeGenOnly = 1 in {
 140     def "" : MIMG_Atomic_Helper<asm, data_rc, addr_rc>,
 141              SIMCInstr<name, SIEncodingFamily.NONE>;
 142   }
 143
 144   let ssamp = 0 in {
 145     def _si : MIMG_Atomic_Real_si<op, name, asm, data_rc, addr_rc>;
 146
 147     def _vi : MIMG_Atomic_Real_vi<op, name, asm, data_rc, addr_rc>;
 148   }
 149 }
 150
 151 multiclass MIMG_Atomic <mimg op, string asm, RegisterClass data_rc = VGPR_32> {
 152   defm _V1 : MIMG_Atomic_Helper_m <op, asm # "_V1", asm, data_rc, VGPR_32>;
 153   defm _V2 : MIMG_Atomic_Helper_m <op, asm # "_V2", asm, data_rc, VReg_64>;
 154   defm _V4 : MIMG_Atomic_Helper_m <op, asm # "_V3", asm, data_rc, VReg_128>;
 155 }
 156
 157 class MIMG_Sampler_Helper <bits<7> op, string asm,
 158                            RegisterClass dst_rc,
 159                            RegisterClass src_rc,
 160                            bit wqm,
 161                            string dns=""> : MIMG_Helper <
 162   (outs dst_rc:$vdata),
 163   (ins src_rc:$vaddr, SReg_256:$srsrc, SReg_128:$ssamp,
 164        dmask:$dmask, unorm:$unorm, GLC:$glc, slc:$slc,
 165        r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
 166   asm#" $vdata, $vaddr, $srsrc, $ssamp$dmask$unorm$glc$slc$r128$tfe$lwe$da",
 167   dns>, MIMGe<op> {
 168   let WQM = wqm;
 169 }
 170
 171 multiclass MIMG_Sampler_Src_Helper <bits<7> op, string asm,
 172                                     RegisterClass dst_rc,
 173                                     int channels, bit wqm> {
 174   def _V1 : MIMG_Sampler_Helper <op, asm, dst_rc, VGPR_32, wqm,
 175                                  !if(!eq(channels, 1), "AMDGPU", "")>,
 176             MIMG_Mask<asm#"_V1", channels>;
 177   def _V2 : MIMG_Sampler_Helper <op, asm, dst_rc, VReg_64, wqm>,
 178             MIMG_Mask<asm#"_V2", channels>;
 179   def _V4 : MIMG_Sampler_Helper <op, asm, dst_rc, VReg_128, wqm>,
 180             MIMG_Mask<asm#"_V4", channels>;
 181   def _V8 : MIMG_Sampler_Helper <op, asm, dst_rc, VReg_256, wqm>,
 182             MIMG_Mask<asm#"_V8", channels>;
 183   def _V16 : MIMG_Sampler_Helper <op, asm, dst_rc, VReg_512, wqm>,
 184             MIMG_Mask<asm#"_V16", channels>;
 185 }
 186
 187 multiclass MIMG_Sampler <bits<7> op, string asm, bit wqm=0> {
 188   defm _V1 : MIMG_Sampler_Src_Helper<op, asm, VGPR_32, 1, wqm>;
 189   defm _V2 : MIMG_Sampler_Src_Helper<op, asm, VReg_64, 2, wqm>;
 190   defm _V3 : MIMG_Sampler_Src_Helper<op, asm, VReg_96, 3, wqm>;
 191   defm _V4 : MIMG_Sampler_Src_Helper<op, asm, VReg_128, 4, wqm>;
 192 }
 193
 194 multiclass MIMG_Sampler_WQM <bits<7> op, string asm> : MIMG_Sampler<op, asm, 1>;
 195
 196 class MIMG_Gather_Helper <bits<7> op, string asm,
 197                           RegisterClass dst_rc,
 198                           RegisterClass src_rc, bit wqm> : MIMG <
 199   (outs dst_rc:$vdata),
 200   (ins src_rc:$vaddr, SReg_256:$srsrc, SReg_128:$ssamp,
 201        dmask:$dmask, unorm:$unorm, GLC:$glc, slc:$slc,
 202        r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
 203   asm#" $vdata, $vaddr, $srsrc, $ssamp$dmask$unorm$glc$slc$r128$tfe$lwe$da",
 204   []>, MIMGe<op> {
 205   let mayLoad = 1;
 206   let mayStore = 0;
 207
 208   // DMASK was repurposed for GATHER4. 4 components are always
 209   // returned and DMASK works like a swizzle - it selects
 210   // the component to fetch. The only useful DMASK values are
 211   // 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
 212   // (red,red,red,red) etc.) The ISA document doesn't mention
 213   // this.
 214   // Therefore, disable all code which updates DMASK by setting this:
 215   let Gather4 = 1;
 216   let hasPostISelHook = 0;
 217   let WQM = wqm;
 218
 219   let isAsmParserOnly = 1; // TBD: fix it later
 220 }
 221
 222 multiclass MIMG_Gather_Src_Helper <bits<7> op, string asm,
 223                                     RegisterClass dst_rc,
 224                                     int channels, bit wqm> {
 225   def _V1 : MIMG_Gather_Helper <op, asm, dst_rc, VGPR_32, wqm>,
 226             MIMG_Mask<asm#"_V1", channels>;
 227   def _V2 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_64, wqm>,
 228             MIMG_Mask<asm#"_V2", channels>;
 229   def _V4 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_128, wqm>,
 230             MIMG_Mask<asm#"_V4", channels>;
 231   def _V8 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_256, wqm>,
 232             MIMG_Mask<asm#"_V8", channels>;
 233   def _V16 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_512, wqm>,
 234             MIMG_Mask<asm#"_V16", channels>;
 235 }
 236
 237 multiclass MIMG_Gather <bits<7> op, string asm, bit wqm=0> {
 238   defm _V1 : MIMG_Gather_Src_Helper<op, asm, VGPR_32, 1, wqm>;
 239   defm _V2 : MIMG_Gather_Src_Helper<op, asm, VReg_64, 2, wqm>;
 240   defm _V3 : MIMG_Gather_Src_Helper<op, asm, VReg_96, 3, wqm>;
 241   defm _V4 : MIMG_Gather_Src_Helper<op, asm, VReg_128, 4, wqm>;
 242 }
 243
 244 multiclass MIMG_Gather_WQM <bits<7> op, string asm> : MIMG_Gather<op, asm, 1>;
 245
 246 //===----------------------------------------------------------------------===//
 247 // MIMG Instructions
 248 //===----------------------------------------------------------------------===//
 249 let SubtargetPredicate = isGCN in {
 250 defm IMAGE_LOAD : MIMG_NoSampler <0x00000000, "image_load">;
 251 defm IMAGE_LOAD_MIP : MIMG_NoSampler <0x00000001, "image_load_mip">;
 252 //def IMAGE_LOAD_PCK : MIMG_NoPattern_ <"image_load_pck", 0x00000002>;
 253 //def IMAGE_LOAD_PCK_SGN : MIMG_NoPattern_ <"image_load_pck_sgn", 0x00000003>;
 254 //def IMAGE_LOAD_MIP_PCK : MIMG_NoPattern_ <"image_load_mip_pck", 0x00000004>;
 255 //def IMAGE_LOAD_MIP_PCK_SGN : MIMG_NoPattern_ <"image_load_mip_pck_sgn", 0x00000005>;
 256 defm IMAGE_STORE : MIMG_Store <0x00000008, "image_store">;
 257 defm IMAGE_STORE_MIP : MIMG_Store <0x00000009, "image_store_mip">;
 258 //def IMAGE_STORE_PCK : MIMG_NoPattern_ <"image_store_pck", 0x0000000a>;
 259 //def IMAGE_STORE_MIP_PCK : MIMG_NoPattern_ <"image_store_mip_pck", 0x0000000b>;
 260 defm IMAGE_GET_RESINFO : MIMG_NoSampler <0x0000000e, "image_get_resinfo">;
 261 defm IMAGE_ATOMIC_SWAP : MIMG_Atomic <mimg<0x0f, 0x10>, "image_atomic_swap">;
 262 defm IMAGE_ATOMIC_CMPSWAP : MIMG_Atomic <mimg<0x10, 0x11>, "image_atomic_cmpswap", VReg_64>;
 263 defm IMAGE_ATOMIC_ADD : MIMG_Atomic <mimg<0x11, 0x12>, "image_atomic_add">;
 264 defm IMAGE_ATOMIC_SUB : MIMG_Atomic <mimg<0x12, 0x13>, "image_atomic_sub">;
 265 //def IMAGE_ATOMIC_RSUB : MIMG_NoPattern_ <"image_atomic_rsub", 0x00000013>; -- not on VI
 266 defm IMAGE_ATOMIC_SMIN : MIMG_Atomic <mimg<0x14>, "image_atomic_smin">;
 267 defm IMAGE_ATOMIC_UMIN : MIMG_Atomic <mimg<0x15>, "image_atomic_umin">;
 268 defm IMAGE_ATOMIC_SMAX : MIMG_Atomic <mimg<0x16>, "image_atomic_smax">;
 269 defm IMAGE_ATOMIC_UMAX : MIMG_Atomic <mimg<0x17>, "image_atomic_umax">;
 270 defm IMAGE_ATOMIC_AND : MIMG_Atomic <mimg<0x18>, "image_atomic_and">;
 271 defm IMAGE_ATOMIC_OR : MIMG_Atomic <mimg<0x19>, "image_atomic_or">;
 272 defm IMAGE_ATOMIC_XOR : MIMG_Atomic <mimg<0x1a>, "image_atomic_xor">;
 273 defm IMAGE_ATOMIC_INC : MIMG_Atomic <mimg<0x1b>, "image_atomic_inc">;
 274 defm IMAGE_ATOMIC_DEC : MIMG_Atomic <mimg<0x1c>, "image_atomic_dec">;
 275 //def IMAGE_ATOMIC_FCMPSWAP : MIMG_NoPattern_ <"image_atomic_fcmpswap", 0x0000001d>; -- not on VI
 276 //def IMAGE_ATOMIC_FMIN : MIMG_NoPattern_ <"image_atomic_fmin", 0x0000001e>; -- not on VI
 277 //def IMAGE_ATOMIC_FMAX : MIMG_NoPattern_ <"image_atomic_fmax", 0x0000001f>; -- not on VI
 278 defm IMAGE_SAMPLE           : MIMG_Sampler_WQM <0x00000020, "image_sample">;
 279 defm IMAGE_SAMPLE_CL        : MIMG_Sampler_WQM <0x00000021, "image_sample_cl">;
 280 defm IMAGE_SAMPLE_D         : MIMG_Sampler <0x00000022, "image_sample_d">;
 281 defm IMAGE_SAMPLE_D_CL      : MIMG_Sampler <0x00000023, "image_sample_d_cl">;
 282 defm IMAGE_SAMPLE_L         : MIMG_Sampler <0x00000024, "image_sample_l">;
 283 defm IMAGE_SAMPLE_B         : MIMG_Sampler_WQM <0x00000025, "image_sample_b">;
 284 defm IMAGE_SAMPLE_B_CL      : MIMG_Sampler_WQM <0x00000026, "image_sample_b_cl">;
 285 defm IMAGE_SAMPLE_LZ        : MIMG_Sampler <0x00000027, "image_sample_lz">;
 286 defm IMAGE_SAMPLE_C         : MIMG_Sampler_WQM <0x00000028, "image_sample_c">;
 287 defm IMAGE_SAMPLE_C_CL      : MIMG_Sampler_WQM <0x00000029, "image_sample_c_cl">;
 288 defm IMAGE_SAMPLE_C_D       : MIMG_Sampler <0x0000002a, "image_sample_c_d">;
 289 defm IMAGE_SAMPLE_C_D_CL    : MIMG_Sampler <0x0000002b, "image_sample_c_d_cl">;
 290 defm IMAGE_SAMPLE_C_L       : MIMG_Sampler <0x0000002c, "image_sample_c_l">;
 291 defm IMAGE_SAMPLE_C_B       : MIMG_Sampler_WQM <0x0000002d, "image_sample_c_b">;
 292 defm IMAGE_SAMPLE_C_B_CL    : MIMG_Sampler_WQM <0x0000002e, "image_sample_c_b_cl">;
 293 defm IMAGE_SAMPLE_C_LZ      : MIMG_Sampler <0x0000002f, "image_sample_c_lz">;
 294 defm IMAGE_SAMPLE_O         : MIMG_Sampler_WQM <0x00000030, "image_sample_o">;
 295 defm IMAGE_SAMPLE_CL_O      : MIMG_Sampler_WQM <0x00000031, "image_sample_cl_o">;
 296 defm IMAGE_SAMPLE_D_O       : MIMG_Sampler <0x00000032, "image_sample_d_o">;
 297 defm IMAGE_SAMPLE_D_CL_O    : MIMG_Sampler <0x00000033, "image_sample_d_cl_o">;
 298 defm IMAGE_SAMPLE_L_O       : MIMG_Sampler <0x00000034, "image_sample_l_o">;
 299 defm IMAGE_SAMPLE_B_O       : MIMG_Sampler_WQM <0x00000035, "image_sample_b_o">;
 300 defm IMAGE_SAMPLE_B_CL_O    : MIMG_Sampler_WQM <0x00000036, "image_sample_b_cl_o">;
 301 defm IMAGE_SAMPLE_LZ_O      : MIMG_Sampler <0x00000037, "image_sample_lz_o">;
 302 defm IMAGE_SAMPLE_C_O       : MIMG_Sampler_WQM <0x00000038, "image_sample_c_o">;
 303 defm IMAGE_SAMPLE_C_CL_O    : MIMG_Sampler_WQM <0x00000039, "image_sample_c_cl_o">;
 304 defm IMAGE_SAMPLE_C_D_O     : MIMG_Sampler <0x0000003a, "image_sample_c_d_o">;
 305 defm IMAGE_SAMPLE_C_D_CL_O  : MIMG_Sampler <0x0000003b, "image_sample_c_d_cl_o">;
 306 defm IMAGE_SAMPLE_C_L_O     : MIMG_Sampler <0x0000003c, "image_sample_c_l_o">;
 307 defm IMAGE_SAMPLE_C_B_O     : MIMG_Sampler_WQM <0x0000003d, "image_sample_c_b_o">;
 308 defm IMAGE_SAMPLE_C_B_CL_O  : MIMG_Sampler_WQM <0x0000003e, "image_sample_c_b_cl_o">;
 309 defm IMAGE_SAMPLE_C_LZ_O    : MIMG_Sampler <0x0000003f, "image_sample_c_lz_o">;
 310 defm IMAGE_GATHER4          : MIMG_Gather_WQM <0x00000040, "image_gather4">;
 311 defm IMAGE_GATHER4_CL       : MIMG_Gather_WQM <0x00000041, "image_gather4_cl">;
 312 defm IMAGE_GATHER4_L        : MIMG_Gather <0x00000044, "image_gather4_l">;
 313 defm IMAGE_GATHER4_B        : MIMG_Gather_WQM <0x00000045, "image_gather4_b">;
 314 defm IMAGE_GATHER4_B_CL     : MIMG_Gather_WQM <0x00000046, "image_gather4_b_cl">;
 315 defm IMAGE_GATHER4_LZ       : MIMG_Gather <0x00000047, "image_gather4_lz">;
 316 defm IMAGE_GATHER4_C        : MIMG_Gather_WQM <0x00000048, "image_gather4_c">;
 317 defm IMAGE_GATHER4_C_CL     : MIMG_Gather_WQM <0x00000049, "image_gather4_c_cl">;
 318 defm IMAGE_GATHER4_C_L      : MIMG_Gather <0x0000004c, "image_gather4_c_l">;
 319 defm IMAGE_GATHER4_C_B      : MIMG_Gather_WQM <0x0000004d, "image_gather4_c_b">;
 320 defm IMAGE_GATHER4_C_B_CL   : MIMG_Gather_WQM <0x0000004e, "image_gather4_c_b_cl">;
 321 defm IMAGE_GATHER4_C_LZ     : MIMG_Gather <0x0000004f, "image_gather4_c_lz">;
 322 defm IMAGE_GATHER4_O        : MIMG_Gather_WQM <0x00000050, "image_gather4_o">;
 323 defm IMAGE_GATHER4_CL_O     : MIMG_Gather_WQM <0x00000051, "image_gather4_cl_o">;
 324 defm IMAGE_GATHER4_L_O      : MIMG_Gather <0x00000054, "image_gather4_l_o">;
 325 defm IMAGE_GATHER4_B_O      : MIMG_Gather_WQM <0x00000055, "image_gather4_b_o">;
 326 defm IMAGE_GATHER4_B_CL_O   : MIMG_Gather <0x00000056, "image_gather4_b_cl_o">;
 327 defm IMAGE_GATHER4_LZ_O     : MIMG_Gather <0x00000057, "image_gather4_lz_o">;
 328 defm IMAGE_GATHER4_C_O      : MIMG_Gather_WQM <0x00000058, "image_gather4_c_o">;
 329 defm IMAGE_GATHER4_C_CL_O   : MIMG_Gather_WQM <0x00000059, "image_gather4_c_cl_o">;
 330 defm IMAGE_GATHER4_C_L_O    : MIMG_Gather <0x0000005c, "image_gather4_c_l_o">;
 331 defm IMAGE_GATHER4_C_B_O    : MIMG_Gather_WQM <0x0000005d, "image_gather4_c_b_o">;
 332 defm IMAGE_GATHER4_C_B_CL_O : MIMG_Gather_WQM <0x0000005e, "image_gather4_c_b_cl_o">;
 333 defm IMAGE_GATHER4_C_LZ_O   : MIMG_Gather <0x0000005f, "image_gather4_c_lz_o">;
 334 defm IMAGE_GET_LOD          : MIMG_Sampler_WQM <0x00000060, "image_get_lod">;
 335 defm IMAGE_SAMPLE_CD        : MIMG_Sampler <0x00000068, "image_sample_cd">;
 336 defm IMAGE_SAMPLE_CD_CL     : MIMG_Sampler <0x00000069, "image_sample_cd_cl">;
 337 defm IMAGE_SAMPLE_C_CD      : MIMG_Sampler <0x0000006a, "image_sample_c_cd">;
 338 defm IMAGE_SAMPLE_C_CD_CL   : MIMG_Sampler <0x0000006b, "image_sample_c_cd_cl">;
 339 defm IMAGE_SAMPLE_CD_O      : MIMG_Sampler <0x0000006c, "image_sample_cd_o">;
 340 defm IMAGE_SAMPLE_CD_CL_O   : MIMG_Sampler <0x0000006d, "image_sample_cd_cl_o">;
 341 defm IMAGE_SAMPLE_C_CD_O    : MIMG_Sampler <0x0000006e, "image_sample_c_cd_o">;
 342 defm IMAGE_SAMPLE_C_CD_CL_O : MIMG_Sampler <0x0000006f, "image_sample_c_cd_cl_o">;
 343 //def IMAGE_RSRC256 : MIMG_NoPattern_RSRC256 <"image_rsrc256", 0x0000007e>;
 344 //def IMAGE_SAMPLER : MIMG_NoPattern_ <"image_sampler", 0x0000007f>;
 345 }
 346
 347 /********** ======================= **********/
 348 /********** Image sampling patterns **********/
 349 /********** ======================= **********/
 350
 351 // Image + sampler
 352 class SampleRawPattern<SDPatternOperator name, MIMG opcode, ValueType vt> : Pat <
 353   (name vt:$addr, v8i32:$rsrc, v4i32:$sampler, i32:$dmask, i32:$unorm,
 354         i32:$r128, i32:$da, i32:$glc, i32:$slc, i32:$tfe, i32:$lwe),
 355   (opcode $addr, $rsrc, $sampler,
 356           (as_i32imm $dmask), (as_i1imm $unorm), (as_i1imm $glc), (as_i1imm $slc),
 357           (as_i1imm $r128), (as_i1imm $tfe), (as_i1imm $lwe), (as_i1imm $da))
 358 >;
 359
 360 multiclass SampleRawPatterns<SDPatternOperator name, string opcode> {
 361   def : SampleRawPattern<name, !cast<MIMG>(opcode # _V4_V1), i32>;
 362   def : SampleRawPattern<name, !cast<MIMG>(opcode # _V4_V2), v2i32>;
 363   def : SampleRawPattern<name, !cast<MIMG>(opcode # _V4_V4), v4i32>;
 364   def : SampleRawPattern<name, !cast<MIMG>(opcode # _V4_V8), v8i32>;
 365   def : SampleRawPattern<name, !cast<MIMG>(opcode # _V4_V16), v16i32>;
 366 }
 367
 368 // Image + sampler for amdgcn
 369 // TODO:
 370 // 1. Handle half data type like v4f16, and add D16 bit support;
 371 // 2. Handle v4i32 rsrc type (Register Class for the instruction to be SReg_128).
 372 // 3. Add A16 support when we pass address of half type.
 373 multiclass AMDGCNSamplePattern<SDPatternOperator name, MIMG opcode, ValueType dt, ValueType vt>  {
 374   def : Pat<
 375     (dt (name vt:$addr, v8i32:$rsrc, v4i32:$sampler, i32:$dmask, i1:$unorm, i1:$glc,
 376         i1:$slc, i1:$lwe, i1:$da)),
 377     (opcode $addr, $rsrc, $sampler,
 378           (as_i32imm $dmask), (as_i1imm $unorm), (as_i1imm $glc), (as_i1imm $slc),
 379           0, 0, (as_i1imm $lwe), (as_i1imm $da))
 380     >;
 381 }
 382
 383 multiclass AMDGCNSampleDataPatterns<SDPatternOperator name, string opcode, ValueType dt> {
 384   defm : AMDGCNSamplePattern<name, !cast<MIMG>(opcode # _V1), dt, f32>;
 385   defm : AMDGCNSamplePattern<name, !cast<MIMG>(opcode # _V2), dt, v2f32>;
 386   defm : AMDGCNSamplePattern<name, !cast<MIMG>(opcode # _V4), dt, v4f32>;
 387   defm : AMDGCNSamplePattern<name, !cast<MIMG>(opcode # _V8), dt, v8f32>;
 388   defm : AMDGCNSamplePattern<name, !cast<MIMG>(opcode # _V16), dt, v16f32>;
 389 }
 390
 391 // TODO: support v3f32.
 392 multiclass AMDGCNSamplePatterns<SDPatternOperator name, string opcode> {
 393   defm : AMDGCNSampleDataPatterns<name, !cast<string>(opcode # _V1), f32>;
 394   defm : AMDGCNSampleDataPatterns<name, !cast<string>(opcode # _V2), v2f32>;
 395   defm : AMDGCNSampleDataPatterns<name, !cast<string>(opcode # _V4), v4f32>;
 396 }
 397
 398 // Image only
 399 class ImagePattern<SDPatternOperator name, MIMG opcode, ValueType vt> : Pat <
 400   (name vt:$addr, v8i32:$rsrc, imm:$dmask, imm:$unorm,
 401         imm:$r128, imm:$da, imm:$glc, imm:$slc, imm:$tfe, imm:$lwe),
 402   (opcode $addr, $rsrc,
 403           (as_i32imm $dmask), (as_i1imm $unorm), (as_i1imm $glc), (as_i1imm $slc),
 404           (as_i1imm $r128), (as_i1imm $tfe), (as_i1imm $lwe), (as_i1imm $da))
 405 >;
 406
 407 multiclass ImagePatterns<SDPatternOperator name, string opcode> {
 408   def : ImagePattern<name, !cast<MIMG>(opcode # _V4_V1), i32>;
 409   def : ImagePattern<name, !cast<MIMG>(opcode # _V4_V2), v2i32>;
 410   def : ImagePattern<name, !cast<MIMG>(opcode # _V4_V4), v4i32>;
 411 }
 412
 413 multiclass ImageLoadPattern<SDPatternOperator name, MIMG opcode, ValueType dt, ValueType vt> {
 414   def : Pat <
 415     (dt (name vt:$addr, v8i32:$rsrc, i32:$dmask, i1:$glc, i1:$slc, i1:$lwe,
 416                 i1:$da)),
 417     (opcode $addr, $rsrc,
 418           (as_i32imm $dmask), 1, (as_i1imm $glc), (as_i1imm $slc),
 419           0, 0, (as_i1imm $lwe), (as_i1imm $da))
 420   >;
 421 }
 422
 423 multiclass ImageLoadDataPatterns<SDPatternOperator name, string opcode, ValueType dt> {
 424   defm : ImageLoadPattern<name, !cast<MIMG>(opcode # _V1), dt, i32>;
 425   defm : ImageLoadPattern<name, !cast<MIMG>(opcode # _V2), dt, v2i32>;
 426   defm : ImageLoadPattern<name, !cast<MIMG>(opcode # _V4), dt, v4i32>;
 427 }
 428
 429 // TODO: support v3f32.
 430 multiclass ImageLoadPatterns<SDPatternOperator name, string opcode> {
 431   defm : ImageLoadDataPatterns<name, !cast<string>(opcode # _V1), f32>;
 432   defm : ImageLoadDataPatterns<name, !cast<string>(opcode # _V2), v2f32>;
 433   defm : ImageLoadDataPatterns<name, !cast<string>(opcode # _V4), v4f32>;
 434 }
 435
 436 multiclass ImageStorePattern<SDPatternOperator name, MIMG opcode, ValueType dt, ValueType vt> {
 437   def : Pat <
 438     (name dt:$data, vt:$addr, v8i32:$rsrc, i32:$dmask, i1:$glc, i1:$slc,
 439           i1:$lwe, i1:$da),
 440     (opcode $data, $addr, $rsrc,
 441           (as_i32imm $dmask), 1, (as_i1imm $glc), (as_i1imm $slc),
 442           0, 0, (as_i1imm $lwe), (as_i1imm $da))
 443   >;
 444 }
 445
 446 multiclass ImageStoreDataPatterns<SDPatternOperator name, string opcode, ValueType dt> {
 447   defm : ImageStorePattern<name, !cast<MIMG>(opcode # _V1), dt, i32>;
 448   defm : ImageStorePattern<name, !cast<MIMG>(opcode # _V2), dt, v2i32>;
 449   defm : ImageStorePattern<name, !cast<MIMG>(opcode # _V4), dt, v4i32>;
 450 }
 451
 452 // TODO: support v3f32.
 453 multiclass ImageStorePatterns<SDPatternOperator name, string opcode> {
 454   defm : ImageStoreDataPatterns<name, !cast<string>(opcode # _V1), f32>;
 455   defm : ImageStoreDataPatterns<name, !cast<string>(opcode # _V2), v2f32>;
 456   defm : ImageStoreDataPatterns<name, !cast<string>(opcode # _V4), v4f32>;
 457 }
 458
 459 class ImageAtomicPattern<SDPatternOperator name, MIMG opcode, ValueType vt> : Pat <
 460   (name i32:$vdata, vt:$addr, v8i32:$rsrc, imm:$r128, imm:$da, imm:$slc),
 461   (opcode $vdata, $addr, $rsrc, 1, 1, 1, (as_i1imm $slc), (as_i1imm $r128), 0, 0, (as_i1imm $da))
 462 >;
 463
 464 multiclass ImageAtomicPatterns<SDPatternOperator name, string opcode> {
 465   def : ImageAtomicPattern<name, !cast<MIMG>(opcode # _V1), i32>;
 466   def : ImageAtomicPattern<name, !cast<MIMG>(opcode # _V2), v2i32>;
 467   def : ImageAtomicPattern<name, !cast<MIMG>(opcode # _V4), v4i32>;
 468 }
 469
 470 class ImageAtomicCmpSwapPattern<MIMG opcode, ValueType vt> : Pat <
 471   (int_amdgcn_image_atomic_cmpswap i32:$vsrc, i32:$vcmp, vt:$addr, v8i32:$rsrc,
 472                                    imm:$r128, imm:$da, imm:$slc),
 473   (EXTRACT_SUBREG
 474     (opcode (REG_SEQUENCE VReg_64, $vsrc, sub0, $vcmp, sub1),
 475             $addr, $rsrc, 3, 1, 1, (as_i1imm $slc), (as_i1imm $r128), 0, 0, (as_i1imm $da)),
 476     sub0)
 477 >;
 478
 479 // ======= amdgcn Image Intrinsics ==============
 480
 481 // Image load
 482 defm : ImageLoadPatterns<int_amdgcn_image_load, "IMAGE_LOAD">;
 483 defm : ImageLoadPatterns<int_amdgcn_image_load_mip, "IMAGE_LOAD_MIP">;
 484 defm : ImageLoadPatterns<int_amdgcn_image_getresinfo, "IMAGE_GET_RESINFO">;
 485
 486 // Image store
 487 defm : ImageStorePatterns<int_amdgcn_image_store, "IMAGE_STORE">;
 488 defm : ImageStorePatterns<int_amdgcn_image_store_mip, "IMAGE_STORE_MIP">;
 489
 490 // Basic sample
 491 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample,           "IMAGE_SAMPLE">;
 492 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_cl,        "IMAGE_SAMPLE_CL">;
 493 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_d,         "IMAGE_SAMPLE_D">;
 494 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_d_cl,      "IMAGE_SAMPLE_D_CL">;
 495 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_l,         "IMAGE_SAMPLE_L">;
 496 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_b,         "IMAGE_SAMPLE_B">;
 497 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_b_cl,      "IMAGE_SAMPLE_B_CL">;
 498 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_lz,        "IMAGE_SAMPLE_LZ">;
 499 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_cd,        "IMAGE_SAMPLE_CD">;
 500 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_cd_cl,     "IMAGE_SAMPLE_CD_CL">;
 501
 502 // Sample with comparison
 503 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c,         "IMAGE_SAMPLE_C">;
 504 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_cl,      "IMAGE_SAMPLE_C_CL">;
 505 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_d,       "IMAGE_SAMPLE_C_D">;
 506 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_d_cl,    "IMAGE_SAMPLE_C_D_CL">;
 507 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_l,       "IMAGE_SAMPLE_C_L">;
 508 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_b,       "IMAGE_SAMPLE_C_B">;
 509 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_b_cl,    "IMAGE_SAMPLE_C_B_CL">;
 510 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_lz,      "IMAGE_SAMPLE_C_LZ">;
 511 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_cd,      "IMAGE_SAMPLE_C_CD">;
 512 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_cd_cl,   "IMAGE_SAMPLE_C_CD_CL">;
 513
 514 // Sample with offsets
 515 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_o,         "IMAGE_SAMPLE_O">;
 516 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_cl_o,      "IMAGE_SAMPLE_CL_O">;
 517 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_d_o,       "IMAGE_SAMPLE_D_O">;
 518 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_d_cl_o,    "IMAGE_SAMPLE_D_CL_O">;
 519 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_l_o,       "IMAGE_SAMPLE_L_O">;
 520 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_b_o,       "IMAGE_SAMPLE_B_O">;
 521 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_b_cl_o,    "IMAGE_SAMPLE_B_CL_O">;
 522 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_lz_o,      "IMAGE_SAMPLE_LZ_O">;
 523 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_cd_o,      "IMAGE_SAMPLE_CD_O">;
 524 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_cd_cl_o,   "IMAGE_SAMPLE_CD_CL_O">;
 525
 526 // Sample with comparison and offsets
 527 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_o,       "IMAGE_SAMPLE_C_O">;
 528 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_cl_o,    "IMAGE_SAMPLE_C_CL_O">;
 529 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_d_o,     "IMAGE_SAMPLE_C_D_O">;
 530 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_d_cl_o,  "IMAGE_SAMPLE_C_D_CL_O">;
 531 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_l_o,     "IMAGE_SAMPLE_C_L_O">;
 532 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_b_o,     "IMAGE_SAMPLE_C_B_O">;
 533 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_b_cl_o,  "IMAGE_SAMPLE_C_B_CL_O">;
 534 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_lz_o,    "IMAGE_SAMPLE_C_LZ_O">;
 535 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_cd_o,    "IMAGE_SAMPLE_C_CD_O">;
 536 defm : AMDGCNSamplePatterns<int_amdgcn_image_sample_c_cd_cl_o, "IMAGE_SAMPLE_C_CD_CL_O">;
 537
 538 // Gather opcodes
 539 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4,           "IMAGE_GATHER4">;
 540 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_cl,        "IMAGE_GATHER4_CL">;
 541 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_l,         "IMAGE_GATHER4_L">;
 542 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_b,         "IMAGE_GATHER4_B">;
 543 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_b_cl,      "IMAGE_GATHER4_B_CL">;
 544 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_lz,        "IMAGE_GATHER4_LZ">;
 545
 546 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c,         "IMAGE_GATHER4_C">;
 547 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_cl,      "IMAGE_GATHER4_C_CL">;
 548 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_l,       "IMAGE_GATHER4_C_L">;
 549 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_b,       "IMAGE_GATHER4_C_B">;
 550 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_b_cl,    "IMAGE_GATHER4_C_B_CL">;
 551 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_lz,      "IMAGE_GATHER4_C_LZ">;
 552
 553 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_o,         "IMAGE_GATHER4_O">;
 554 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_cl_o,      "IMAGE_GATHER4_CL_O">;
 555 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_l_o,       "IMAGE_GATHER4_L_O">;
 556 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_b_o,       "IMAGE_GATHER4_B_O">;
 557 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_b_cl_o,    "IMAGE_GATHER4_B_CL_O">;
 558 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_lz_o,      "IMAGE_GATHER4_LZ_O">;
 559
 560 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_o,       "IMAGE_GATHER4_C_O">;
 561 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_cl_o,    "IMAGE_GATHER4_C_CL_O">;
 562 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_l_o,     "IMAGE_GATHER4_C_L_O">;
 563 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_b_o,     "IMAGE_GATHER4_C_B_O">;
 564 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_b_cl_o,  "IMAGE_GATHER4_C_B_CL_O">;
 565 defm : AMDGCNSamplePatterns<int_amdgcn_image_gather4_c_lz_o,    "IMAGE_GATHER4_C_LZ_O">;
 566
 567 defm : AMDGCNSamplePatterns<int_amdgcn_image_getlod, "IMAGE_GET_LOD">;
 568
 569 // Image atomics
 570 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_swap, "IMAGE_ATOMIC_SWAP">;
 571 def : ImageAtomicCmpSwapPattern<IMAGE_ATOMIC_CMPSWAP_V1, i32>;
 572 def : ImageAtomicCmpSwapPattern<IMAGE_ATOMIC_CMPSWAP_V2, v2i32>;
 573 def : ImageAtomicCmpSwapPattern<IMAGE_ATOMIC_CMPSWAP_V4, v4i32>;
 574 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_add, "IMAGE_ATOMIC_ADD">;
 575 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_sub, "IMAGE_ATOMIC_SUB">;
 576 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_smin, "IMAGE_ATOMIC_SMIN">;
 577 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_umin, "IMAGE_ATOMIC_UMIN">;
 578 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_smax, "IMAGE_ATOMIC_SMAX">;
 579 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_umax, "IMAGE_ATOMIC_UMAX">;
 580 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_and, "IMAGE_ATOMIC_AND">;
 581 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_or, "IMAGE_ATOMIC_OR">;
 582 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_xor, "IMAGE_ATOMIC_XOR">;
 583 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_inc, "IMAGE_ATOMIC_INC">;
 584 defm : ImageAtomicPatterns<int_amdgcn_image_atomic_dec, "IMAGE_ATOMIC_DEC">;
 585
 586 /* SIsample for simple 1D texture lookup */
 587 def : Pat <
 588   (SIsample i32:$addr, v8i32:$rsrc, v4i32:$sampler, imm),
 589   (IMAGE_SAMPLE_V4_V1 $addr, $rsrc, $sampler, 0xf, 0, 0, 0, 0, 0, 0, 0)
 590 >;
 591
 592 class SamplePattern<SDNode name, MIMG opcode, ValueType vt> : Pat <
 593     (name vt:$addr, v8i32:$rsrc, v4i32:$sampler, imm),
 594     (opcode $addr, $rsrc, $sampler, 0xf, 0, 0, 0, 0, 0, 0, 0)
 595 >;
 596
 597 class SampleRectPattern<SDNode name, MIMG opcode, ValueType vt> : Pat <
 598     (name vt:$addr, v8i32:$rsrc, v4i32:$sampler, TEX_RECT),
 599     (opcode $addr, $rsrc, $sampler, 0xf, 1, 0, 0, 0, 0, 0, 0)
 600 >;
 601
 602 class SampleArrayPattern<SDNode name, MIMG opcode, ValueType vt> : Pat <
 603     (name vt:$addr, v8i32:$rsrc, v4i32:$sampler, TEX_ARRAY),
 604     (opcode $addr, $rsrc, $sampler, 0xf, 0, 0, 0, 0, 0, 0, 1)
 605 >;
 606
 607 class SampleShadowPattern<SDNode name, MIMG opcode,
 608                           ValueType vt> : Pat <
 609     (name vt:$addr, v8i32:$rsrc, v4i32:$sampler, TEX_SHADOW),
 610     (opcode $addr, $rsrc, $sampler, 0xf, 0, 0, 0, 0, 0, 0, 0)
 611 >;
 612
 613 class SampleShadowArrayPattern<SDNode name, MIMG opcode,
 614                                ValueType vt> : Pat <
 615     (name vt:$addr, v8i32:$rsrc, v4i32:$sampler, TEX_SHADOW_ARRAY),
 616     (opcode $addr, $rsrc, $sampler, 0xf, 0, 0, 0, 0, 0, 0, 1)
 617 >;
 618
 619 /* SIsample* for texture lookups consuming more address parameters */
 620 multiclass SamplePatterns<MIMG sample, MIMG sample_c, MIMG sample_l,
 621                           MIMG sample_c_l, MIMG sample_b, MIMG sample_c_b,
 622 MIMG sample_d, MIMG sample_c_d, ValueType addr_type> {
 623   def : SamplePattern <SIsample, sample, addr_type>;
 624   def : SampleRectPattern <SIsample, sample, addr_type>;
 625   def : SampleArrayPattern <SIsample, sample, addr_type>;
 626   def : SampleShadowPattern <SIsample, sample_c, addr_type>;
 627   def : SampleShadowArrayPattern <SIsample, sample_c, addr_type>;
 628
 629   def : SamplePattern <SIsamplel, sample_l, addr_type>;
 630   def : SampleArrayPattern <SIsamplel, sample_l, addr_type>;
 631   def : SampleShadowPattern <SIsamplel, sample_c_l, addr_type>;
 632   def : SampleShadowArrayPattern <SIsamplel, sample_c_l, addr_type>;
 633
 634   def : SamplePattern <SIsampleb, sample_b, addr_type>;
 635   def : SampleArrayPattern <SIsampleb, sample_b, addr_type>;
 636   def : SampleShadowPattern <SIsampleb, sample_c_b, addr_type>;
 637   def : SampleShadowArrayPattern <SIsampleb, sample_c_b, addr_type>;
 638
 639   def : SamplePattern <SIsampled, sample_d, addr_type>;
 640   def : SampleArrayPattern <SIsampled, sample_d, addr_type>;
 641   def : SampleShadowPattern <SIsampled, sample_c_d, addr_type>;
 642   def : SampleShadowArrayPattern <SIsampled, sample_c_d, addr_type>;
 643 }
 644
 645 defm : SamplePatterns<IMAGE_SAMPLE_V4_V2, IMAGE_SAMPLE_C_V4_V2,
 646                       IMAGE_SAMPLE_L_V4_V2, IMAGE_SAMPLE_C_L_V4_V2,
 647                       IMAGE_SAMPLE_B_V4_V2, IMAGE_SAMPLE_C_B_V4_V2,
 648                       IMAGE_SAMPLE_D_V4_V2, IMAGE_SAMPLE_C_D_V4_V2,
 649                       v2i32>;
 650 defm : SamplePatterns<IMAGE_SAMPLE_V4_V4, IMAGE_SAMPLE_C_V4_V4,
 651                       IMAGE_SAMPLE_L_V4_V4, IMAGE_SAMPLE_C_L_V4_V4,
 652                       IMAGE_SAMPLE_B_V4_V4, IMAGE_SAMPLE_C_B_V4_V4,
 653                       IMAGE_SAMPLE_D_V4_V4, IMAGE_SAMPLE_C_D_V4_V4,
 654                       v4i32>;
 655 defm : SamplePatterns<IMAGE_SAMPLE_V4_V8, IMAGE_SAMPLE_C_V4_V8,
 656                       IMAGE_SAMPLE_L_V4_V8, IMAGE_SAMPLE_C_L_V4_V8,
 657                       IMAGE_SAMPLE_B_V4_V8, IMAGE_SAMPLE_C_B_V4_V8,
 658                       IMAGE_SAMPLE_D_V4_V8, IMAGE_SAMPLE_C_D_V4_V8,
 659                       v8i32>;
 660 defm : SamplePatterns<IMAGE_SAMPLE_V4_V16, IMAGE_SAMPLE_C_V4_V16,
 661                       IMAGE_SAMPLE_L_V4_V16, IMAGE_SAMPLE_C_L_V4_V16,
 662                       IMAGE_SAMPLE_B_V4_V16, IMAGE_SAMPLE_C_B_V4_V16,
 663                       IMAGE_SAMPLE_D_V4_V16, IMAGE_SAMPLE_C_D_V4_V16,
 664                       v16i32>;