contrib/llvm/lib/Target/AMDGPU/Processors.td

   1 //===-- Processors.td - R600 Processor definitions ------------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 class Proc<string Name, ProcessorItineraries itin, list<SubtargetFeature> Features>
  11 : Processor<Name, itin, Features>;
  12
  13 //===----------------------------------------------------------------------===//
  14 // R600
  15 //===----------------------------------------------------------------------===//
  16 def : Proc<"r600",       R600_VLIW5_Itin,
  17     [FeatureR600, FeatureVertexCache, FeatureWavefrontSize64]>;
  18
  19 def : Proc<"r630",       R600_VLIW5_Itin,
  20     [FeatureR600, FeatureVertexCache, FeatureWavefrontSize32]>;
  21
  22 def : Proc<"rs880",      R600_VLIW5_Itin,
  23     [FeatureR600, FeatureWavefrontSize16]>;
  24
  25 def : Proc<"rv670",      R600_VLIW5_Itin,
  26     [FeatureR600, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
  27
  28 //===----------------------------------------------------------------------===//
  29 // R700
  30 //===----------------------------------------------------------------------===//
  31
  32 def : Proc<"rv710",      R600_VLIW5_Itin,
  33     [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
  34
  35 def : Proc<"rv730",      R600_VLIW5_Itin,
  36     [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
  37
  38 def : Proc<"rv770",      R600_VLIW5_Itin,
  39     [FeatureR700, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
  40
  41 //===----------------------------------------------------------------------===//
  42 // Evergreen
  43 //===----------------------------------------------------------------------===//
  44
  45 def : Proc<"cedar",      R600_VLIW5_Itin,
  46     [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize32,
  47      FeatureCFALUBug]>;
  48
  49 def : Proc<"redwood",    R600_VLIW5_Itin,
  50     [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64,
  51      FeatureCFALUBug]>;
  52
  53 def : Proc<"sumo",       R600_VLIW5_Itin,
  54     [FeatureEvergreen, FeatureWavefrontSize64, FeatureCFALUBug]>;
  55
  56 def : Proc<"juniper",    R600_VLIW5_Itin,
  57     [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64]>;
  58
  59 def : Proc<"cypress",    R600_VLIW5_Itin,
  60     [FeatureEvergreen, FeatureFP64, FeatureVertexCache,
  61      FeatureWavefrontSize64]>;
  62
  63 //===----------------------------------------------------------------------===//
  64 // Northern Islands
  65 //===----------------------------------------------------------------------===//
  66
  67 def : Proc<"barts",      R600_VLIW5_Itin,
  68     [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
  69
  70 def : Proc<"turks",      R600_VLIW5_Itin,
  71     [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
  72
  73 def : Proc<"caicos",     R600_VLIW5_Itin,
  74     [FeatureNorthernIslands, FeatureCFALUBug]>;
  75
  76 def : Proc<"cayman",     R600_VLIW4_Itin,
  77     [FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>;
  78
  79 //===----------------------------------------------------------------------===//
  80 // Southern Islands
  81 //===----------------------------------------------------------------------===//
  82
  83 def : ProcessorModel<"SI", SIFullSpeedModel,
  84   [FeatureSouthernIslands, FeatureFastFMAF32, HalfRate64Ops]
  85 >;
  86
  87 def : ProcessorModel<"tahiti", SIFullSpeedModel,
  88   [FeatureSouthernIslands, FeatureFastFMAF32, HalfRate64Ops]
  89 >;
  90
  91 def : ProcessorModel<"pitcairn", SIQuarterSpeedModel, [FeatureSouthernIslands]>;
  92
  93 def : ProcessorModel<"verde",    SIQuarterSpeedModel, [FeatureSouthernIslands]>;
  94
  95 def : ProcessorModel<"oland",    SIQuarterSpeedModel, [FeatureSouthernIslands]>;
  96
  97 def : ProcessorModel<"hainan",   SIQuarterSpeedModel, [FeatureSouthernIslands]>;
  98
  99 //===----------------------------------------------------------------------===//
 100 // Sea Islands
 101 //===----------------------------------------------------------------------===//
 102
 103 def : ProcessorModel<"bonaire",    SIQuarterSpeedModel,
 104   [FeatureISAVersion7_0_0]
 105 >;
 106
 107 def : ProcessorModel<"kabini",     SIQuarterSpeedModel,
 108   [FeatureISAVersion7_0_2]
 109 >;
 110
 111 def : ProcessorModel<"kaveri",     SIQuarterSpeedModel,
 112   [FeatureISAVersion7_0_0]
 113 >;
 114
 115 def : ProcessorModel<"hawaii",     SIFullSpeedModel,
 116   [FeatureISAVersion7_0_1]
 117 >;
 118
 119 def : ProcessorModel<"mullins",    SIQuarterSpeedModel,
 120   [FeatureISAVersion7_0_2]>;
 121
 122 def : ProcessorModel<"gfx700",     SIQuarterSpeedModel,
 123   [FeatureISAVersion7_0_0]
 124 >;
 125
 126 def : ProcessorModel<"gfx701",     SIFullSpeedModel,
 127   [FeatureISAVersion7_0_1]
 128 >;
 129
 130 def : ProcessorModel<"gfx702",     SIQuarterSpeedModel,
 131   [FeatureISAVersion7_0_2]
 132 >;
 133
 134 //===----------------------------------------------------------------------===//
 135 // Volcanic Islands
 136 //===----------------------------------------------------------------------===//
 137
 138 def : ProcessorModel<"tonga",   SIQuarterSpeedModel,
 139   [FeatureISAVersion8_0_2]
 140 >;
 141
 142 def : ProcessorModel<"iceland", SIQuarterSpeedModel,
 143   [FeatureISAVersion8_0_0]
 144 >;
 145
 146 def : ProcessorModel<"carrizo", SIQuarterSpeedModel,
 147   [FeatureISAVersion8_0_1]
 148 >;
 149
 150 def : ProcessorModel<"fiji",    SIQuarterSpeedModel,
 151   [FeatureISAVersion8_0_3]
 152 >;
 153
 154 def : ProcessorModel<"stoney",  SIQuarterSpeedModel,
 155   [FeatureISAVersion8_1_0]
 156 >;
 157
 158 def : ProcessorModel<"polaris10", SIQuarterSpeedModel,
 159   [FeatureISAVersion8_0_3]
 160 >;
 161
 162 def : ProcessorModel<"polaris11", SIQuarterSpeedModel,
 163   [FeatureISAVersion8_0_3]
 164 >;
 165
 166 def : ProcessorModel<"gfx800", SIQuarterSpeedModel,
 167   [FeatureISAVersion8_0_0]
 168 >;
 169
 170 def : ProcessorModel<"gfx801", SIQuarterSpeedModel,
 171   [FeatureISAVersion8_0_1]
 172 >;
 173
 174 def : ProcessorModel<"gfx802", SIQuarterSpeedModel,
 175   [FeatureISAVersion8_0_2]
 176 >;
 177
 178 def : ProcessorModel<"gfx803", SIQuarterSpeedModel,
 179   [FeatureISAVersion8_0_3]
 180 >;
 181
 182 def : ProcessorModel<"gfx804", SIQuarterSpeedModel,
 183   [FeatureISAVersion8_0_4]
 184 >;
 185
 186 def : ProcessorModel<"gfx810", SIQuarterSpeedModel,
 187   [FeatureISAVersion8_1_0]
 188 >;
 189