1 //===-- R600RegisterInfo.h - R600 Register Info Interface ------*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief Interface definition for R600RegisterInfo
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_AMDGPU_R600REGISTERINFO_H
16 #define LLVM_LIB_TARGET_AMDGPU_R600REGISTERINFO_H
18 #include "AMDGPURegisterInfo.h"
22 class AMDGPUSubtarget;
24 struct R600RegisterInfo final : public AMDGPURegisterInfo {
29 BitVector getReservedRegs(const MachineFunction &MF) const override;
31 /// \brief get the HW encoding for a register's channel.
32 unsigned getHWRegChan(unsigned reg) const;
34 unsigned getHWRegIndex(unsigned Reg) const;
36 /// \brief get the register class of the specified type to use in the
38 const TargetRegisterClass *getCFGStructurizerRegClass(MVT VT) const;
40 const RegClassWeight &
41 getRegClassWeight(const TargetRegisterClass *RC) const override;
43 // \returns true if \p Reg can be defined in one ALU clause and used in
45 bool isPhysRegLiveAcrossClauses(unsigned Reg) const;
47 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
48 unsigned FIOperandNum,
49 RegScavenger *RS = nullptr) const override;
52 } // End namespace llvm