1 //===-- VOPInstructions.td - Vector Instruction Defintions ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // dummies for outer let
13 bit isConvertibleToThreeAddress;
15 bit isReMaterializable;
17 bit VOPAsmPrefer32Bit;
18 Predicate SubtargetPredicate;
20 string DisableEncoding;
21 list<SchedReadWrite> SchedRW;
26 class VOP <string opName> {
27 string OpName = opName;
30 class VOPAnyCommon <dag outs, dag ins, string asm, list<dag> pattern> :
31 InstSI <outs, ins, asm, pattern> {
35 let hasSideEffects = 0;
36 let UseNamedOperandTable = 1;
41 class VOP3Common <dag outs, dag ins, string asm = "",
42 list<dag> pattern = [], bit HasMods = 0,
44 VOPAnyCommon <outs, ins, asm, pattern> {
46 // Using complex patterns gives VOP3 patterns a very high complexity rating,
47 // but standalone patterns are almost always preferred, so we need to adjust the
48 // priority lower. The goal is to use a high number to reduce complexity to
49 // zero (or less than zero).
50 let AddedComplexity = -1000;
54 let AsmVariantName = AMDGPUAsmVariants.VOP3;
55 let AsmMatchConverter = !if(!eq(HasMods,1), "cvtVOP3", "");
57 let isCodeGenOnly = 0;
61 // Because SGPRs may be allowed if there are multiple operands, we
62 // need a post-isel hook to insert copies in order to avoid
63 // violating constant bus requirements.
64 let hasPostISelHook = 1;
67 class VOP3_Pseudo <string opName, VOPProfile P, list<dag> pattern = [],
68 bit VOP3Only = 0, bit isVOP3P = 0> :
69 InstSI <P.Outs64, !if(!and(isVOP3P, P.IsPacked), P.InsVOP3P, P.Ins64), "", pattern>,
71 SIMCInstr<opName#"_e64", SIEncodingFamily.NONE>,
72 MnemonicAlias<opName#"_e64", opName> {
75 let isCodeGenOnly = 1;
76 let UseNamedOperandTable = 1;
78 string Mnemonic = opName;
79 string AsmOperands = !if(!and(isVOP3P, P.IsPacked), P.AsmVOP3P, P.Asm64);
84 let hasSideEffects = 0;
85 let SubtargetPredicate = isGCN;
87 // Because SGPRs may be allowed if there are multiple operands, we
88 // need a post-isel hook to insert copies in order to avoid
89 // violating constant bus requirements.
90 let hasPostISelHook = 1;
92 // Using complex patterns gives VOP3 patterns a very high complexity rating,
93 // but standalone patterns are almost always preferred, so we need to adjust the
94 // priority lower. The goal is to use a high number to reduce complexity to
95 // zero (or less than zero).
96 let AddedComplexity = -1000;
100 let FPClamp = P.HasFPClamp;
103 let AsmVariantName = AMDGPUAsmVariants.VOP3;
104 let AsmMatchConverter =
105 !if(!and(P.IsPacked, isVOP3P),
107 !if(!or(P.HasModifiers, P.HasOMod),
114 class VOP3P_Pseudo <string opName, VOPProfile P, list<dag> pattern = []> :
115 VOP3_Pseudo<opName, P, pattern, 1, 1> {
119 class VOP3_Real <VOP3_Pseudo ps, int EncodingFamily> :
120 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
121 SIMCInstr <ps.PseudoInstr, EncodingFamily> {
124 let isCodeGenOnly = 0;
125 let UseNamedOperandTable = 1;
127 let Constraints = ps.Constraints;
128 let DisableEncoding = ps.DisableEncoding;
130 // copy relevant pseudo op flags
131 let SubtargetPredicate = ps.SubtargetPredicate;
132 let AsmMatchConverter = ps.AsmMatchConverter;
133 let AsmVariantName = ps.AsmVariantName;
134 let Constraints = ps.Constraints;
135 let DisableEncoding = ps.DisableEncoding;
136 let TSFlags = ps.TSFlags;
137 let UseNamedOperandTable = ps.UseNamedOperandTable;
141 // XXX - Is there any reason to distingusih this from regular VOP3
143 class VOP3P_Real<VOP3P_Pseudo ps, int EncodingFamily> :
144 VOP3_Real<ps, EncodingFamily>;
146 class VOP3a<VOPProfile P> : Enc64 {
147 bits<2> src0_modifiers;
149 bits<2> src1_modifiers;
151 bits<2> src2_modifiers;
156 let Inst{8} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0);
157 let Inst{9} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0);
158 let Inst{10} = !if(P.HasSrc2Mods, src2_modifiers{1}, 0);
160 let Inst{31-26} = 0x34; //encoding
161 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
162 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
163 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
164 let Inst{60-59} = !if(P.HasOMod, omod, 0);
165 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
166 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
167 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
170 class VOP3a_si <bits<9> op, VOPProfile P> : VOP3a<P> {
171 let Inst{25-17} = op;
172 let Inst{11} = !if(P.HasClamp, clamp{0}, 0);
175 class VOP3a_vi <bits<10> op, VOPProfile P> : VOP3a<P> {
176 let Inst{25-16} = op;
177 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
180 class VOP3e_si <bits<9> op, VOPProfile P> : VOP3a_si <op, P> {
182 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
185 class VOP3e_vi <bits<10> op, VOPProfile P> : VOP3a_vi <op, P> {
187 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
190 class VOP3be <VOPProfile P> : Enc64 {
192 bits<2> src0_modifiers;
194 bits<2> src1_modifiers;
196 bits<2> src2_modifiers;
201 let Inst{7-0} = vdst;
202 let Inst{14-8} = sdst;
203 let Inst{31-26} = 0x34; //encoding
204 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
205 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
206 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
207 let Inst{60-59} = !if(P.HasOMod, omod, 0);
208 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
209 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
210 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
213 class VOP3Pe <bits<10> op, VOPProfile P> : Enc64 {
215 // neg, neg_hi, op_sel put in srcN_modifiers
216 bits<4> src0_modifiers;
218 bits<4> src1_modifiers;
220 bits<4> src2_modifiers;
224 let Inst{7-0} = vdst;
225 let Inst{8} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // neg_hi src0
226 let Inst{9} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // neg_hi src1
227 let Inst{10} = !if(P.HasSrc2Mods, src2_modifiers{1}, 0); // neg_hi src2
229 let Inst{11} = !if(!and(P.HasSrc0, P.HasOpSel), src0_modifiers{2}, 0); // op_sel(0)
230 let Inst{12} = !if(!and(P.HasSrc1, P.HasOpSel), src1_modifiers{2}, 0); // op_sel(1)
231 let Inst{13} = !if(!and(P.HasSrc2, P.HasOpSel), src2_modifiers{2}, 0); // op_sel(2)
233 let Inst{14} = !if(!and(P.HasSrc2, P.HasOpSel), src2_modifiers{3}, 0); // op_sel_hi(2)
235 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
237 let Inst{25-16} = op;
238 let Inst{31-26} = 0x34; //encoding
239 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
240 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
241 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
242 let Inst{59} = !if(!and(P.HasSrc0, P.HasOpSel), src0_modifiers{3}, 0); // op_sel_hi(0)
243 let Inst{60} = !if(!and(P.HasSrc1, P.HasOpSel), src1_modifiers{3}, 0); // op_sel_hi(1)
244 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // neg (lo)
245 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // neg (lo)
246 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0); // neg (lo)
249 class VOP3be_si <bits<9> op, VOPProfile P> : VOP3be<P> {
250 let Inst{25-17} = op;
253 class VOP3be_vi <bits<10> op, VOPProfile P> : VOP3be<P> {
255 let Inst{25-16} = op;
256 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
272 int UNUSED_PRESERVE = 2;
275 class VOP_SDWAe<VOPProfile P> : Enc64 {
278 bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
280 bits<2> src1_modifiers;
285 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
286 let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD);
287 let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE);
288 let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0);
289 let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD);
290 let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
291 let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
292 let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD);
293 let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
294 let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
297 // GFX9 adds two features to SDWA:
298 // 1. Add 3 fields to the SDWA microcode word: S0, S1 and OMOD.
299 // a. S0 and S1 indicate that source 0 and 1 respectively are SGPRs rather
300 // than VGPRs (at most 1 can be an SGPR);
301 // b. OMOD is the standard output modifier (result *2, *4, /2)
302 // 2. Add a new version of the SDWA microcode word for VOPC: SDWAB. This
303 // replaces OMOD and the dest fields with SD and SDST (SGPR destination)
305 // a. When SD=1, the SDST is used as the destination for the compare result;
306 // b. When SD=0, VCC is used.
308 // In GFX9, V_MAC_F16, V_MAC_F32 opcodes cannot be used with SDWA
310 // gfx9 SDWA basic encoding
311 class VOP_SDWA9e<VOPProfile P> : Enc64 {
312 bits<9> src0; // {src0_sgpr{0}, src0{7-0}}
314 bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
316 bits<2> src1_modifiers;
319 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
320 let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD);
321 let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
322 let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
323 let Inst{55} = !if(P.HasSrc0, src0{8}, 0);
324 let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD);
325 let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
326 let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
327 let Inst{63} = 0; // src1_sgpr - should be specified in subclass
331 class VOP_SDWA9Ae<VOPProfile P> : VOP_SDWA9e<P> {
337 let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD);
338 let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE);
339 let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0);
340 let Inst{47-46} = !if(P.HasSDWAOMod, omod{1-0}, 0);
344 class VOP_SDWA9Be<VOPProfile P> : VOP_SDWA9e<P> {
345 bits<8> sdst; // {vcc_sdst{0}, sdst{6-0}}
347 let Inst{46-40} = !if(P.EmitDst, sdst{6-0}, 0);
348 let Inst{47} = !if(P.EmitDst, sdst{7}, 0);
351 class VOP_SDWA_Pseudo <string opName, VOPProfile P, list<dag> pattern=[]> :
352 InstSI <P.OutsSDWA, P.InsSDWA, "", pattern>,
354 SIMCInstr <opName#"_sdwa", SIEncodingFamily.NONE>,
355 MnemonicAlias <opName#"_sdwa", opName> {
358 let isCodeGenOnly = 1;
359 let UseNamedOperandTable = 1;
361 string Mnemonic = opName;
362 string AsmOperands = P.AsmSDWA;
363 string AsmOperands9 = P.AsmSDWA9;
368 let hasSideEffects = 0;
374 let SubtargetPredicate = !if(P.HasExt, HasSDWA, DisableInst);
375 let AssemblerPredicate = !if(P.HasExt, HasSDWA, DisableInst);
376 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.SDWA,
377 AMDGPUAsmVariants.Disable);
378 let DecoderNamespace = "SDWA";
383 class VOP_SDWA_Real <VOP_SDWA_Pseudo ps> :
384 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
385 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA> {
388 let isCodeGenOnly = 0;
392 let SchedRW = ps.SchedRW;
393 let hasSideEffects = ps.hasSideEffects;
395 let Constraints = ps.Constraints;
396 let DisableEncoding = ps.DisableEncoding;
398 // Copy relevant pseudo op flags
399 let SubtargetPredicate = ps.SubtargetPredicate;
400 let AssemblerPredicate = ps.AssemblerPredicate;
401 let AsmMatchConverter = ps.AsmMatchConverter;
402 let AsmVariantName = ps.AsmVariantName;
403 let UseNamedOperandTable = ps.UseNamedOperandTable;
404 let DecoderNamespace = ps.DecoderNamespace;
405 let Constraints = ps.Constraints;
406 let DisableEncoding = ps.DisableEncoding;
407 let TSFlags = ps.TSFlags;
410 class VOP_SDWA9_Real <VOP_SDWA_Pseudo ps> :
411 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands9, []>,
412 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA9> {
415 let isCodeGenOnly = 0;
419 let SchedRW = ps.SchedRW;
420 let hasSideEffects = ps.hasSideEffects;
422 let Constraints = ps.Constraints;
423 let DisableEncoding = ps.DisableEncoding;
425 let SubtargetPredicate = !if(ps.Pfl.HasSDWA9, HasSDWA9, DisableInst);
426 let AssemblerPredicate = !if(ps.Pfl.HasSDWA9, HasSDWA9, DisableInst);
427 let AsmVariantName = !if(ps.Pfl.HasSDWA9, AMDGPUAsmVariants.SDWA9,
428 AMDGPUAsmVariants.Disable);
429 let DecoderNamespace = "SDWA9";
431 // Copy relevant pseudo op flags
432 let AsmMatchConverter = ps.AsmMatchConverter;
433 let UseNamedOperandTable = ps.UseNamedOperandTable;
434 let Constraints = ps.Constraints;
435 let DisableEncoding = ps.DisableEncoding;
436 let TSFlags = ps.TSFlags;
439 class VOP_DPPe<VOPProfile P> : Enc64 {
440 bits<2> src0_modifiers;
442 bits<2> src1_modifiers;
448 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
449 let Inst{48-40} = dpp_ctrl;
450 let Inst{51} = bound_ctrl;
451 let Inst{52} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // src0_neg
452 let Inst{53} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs
453 let Inst{54} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // src1_neg
454 let Inst{55} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs
455 let Inst{59-56} = bank_mask;
456 let Inst{63-60} = row_mask;
459 class VOP_DPP <string OpName, VOPProfile P> :
460 InstSI <P.OutsDPP, P.InsDPP, OpName#P.AsmDPP, []>,
465 let hasSideEffects = 0;
466 let UseNamedOperandTable = 1;
472 let AsmMatchConverter = !if(!eq(P.HasModifiers,1), "cvtDPP", "");
473 let SubtargetPredicate = HasDPP;
474 let AssemblerPredicate = !if(P.HasExt, HasDPP, DisableInst);
475 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.DPP,
476 AMDGPUAsmVariants.Disable);
477 let DecoderNamespace = "DPP";
480 include "VOPCInstructions.td"
481 include "VOP1Instructions.td"
482 include "VOP2Instructions.td"
483 include "VOP3Instructions.td"
484 include "VOP3PInstructions.td"