1 //===-- VOPInstructions.td - Vector Instruction Defintions ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // dummies for outer let
13 bit isConvertibleToThreeAddress;
15 bit isReMaterializable;
17 bit VOPAsmPrefer32Bit;
18 Predicate SubtargetPredicate;
20 string DisableEncoding;
21 list<SchedReadWrite> SchedRW;
26 class VOP <string opName> {
27 string OpName = opName;
30 class VOPAnyCommon <dag outs, dag ins, string asm, list<dag> pattern> :
31 InstSI <outs, ins, asm, pattern> {
35 let hasSideEffects = 0;
36 let UseNamedOperandTable = 1;
41 class VOP3Common <dag outs, dag ins, string asm = "",
42 list<dag> pattern = [], bit HasMods = 0,
44 VOPAnyCommon <outs, ins, asm, pattern> {
46 // Using complex patterns gives VOP3 patterns a very high complexity rating,
47 // but standalone patterns are almost always preferred, so we need to adjust the
48 // priority lower. The goal is to use a high number to reduce complexity to
49 // zero (or less than zero).
50 let AddedComplexity = -1000;
54 let AsmMatchConverter =
57 !if(!eq(HasMods,1), "cvtVOP3_2_mod", ""));
59 let AsmVariantName = AMDGPUAsmVariants.VOP3;
61 let isCodeGenOnly = 0;
65 // Because SGPRs may be allowed if there are multiple operands, we
66 // need a post-isel hook to insert copies in order to avoid
67 // violating constant bus requirements.
68 let hasPostISelHook = 1;
71 class VOP3_Pseudo <string opName, VOPProfile P, list<dag> pattern=[], bit VOP3Only = 0> :
72 InstSI <P.Outs64, P.Ins64, "", pattern>,
74 SIMCInstr<opName#"_e64", SIEncodingFamily.NONE>,
75 MnemonicAlias<opName#"_e64", opName> {
78 let isCodeGenOnly = 1;
79 let UseNamedOperandTable = 1;
81 string Mnemonic = opName;
82 string AsmOperands = P.Asm64;
87 let hasSideEffects = 0;
88 let SubtargetPredicate = isGCN;
90 // Because SGPRs may be allowed if there are multiple operands, we
91 // need a post-isel hook to insert copies in order to avoid
92 // violating constant bus requirements.
93 let hasPostISelHook = 1;
95 // Using complex patterns gives VOP3 patterns a very high complexity rating,
96 // but standalone patterns are almost always preferred, so we need to adjust the
97 // priority lower. The goal is to use a high number to reduce complexity to
98 // zero (or less than zero).
99 let AddedComplexity = -1000;
105 let AsmVariantName = AMDGPUAsmVariants.VOP3;
106 let AsmMatchConverter =
109 !if(!eq(P.HasModifiers, 1), "cvtVOP3_2_mod", ""));
114 class VOP3_Real <VOP3_Pseudo ps, int EncodingFamily> :
115 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
116 SIMCInstr <ps.PseudoInstr, EncodingFamily> {
119 let isCodeGenOnly = 0;
121 let Constraints = ps.Constraints;
122 let DisableEncoding = ps.DisableEncoding;
124 // copy relevant pseudo op flags
125 let SubtargetPredicate = ps.SubtargetPredicate;
126 let AsmMatchConverter = ps.AsmMatchConverter;
127 let AsmVariantName = ps.AsmVariantName;
128 let Constraints = ps.Constraints;
129 let DisableEncoding = ps.DisableEncoding;
130 let TSFlags = ps.TSFlags;
133 class VOP3a<VOPProfile P> : Enc64 {
134 bits<2> src0_modifiers;
136 bits<2> src1_modifiers;
138 bits<2> src2_modifiers;
143 let Inst{8} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0);
144 let Inst{9} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0);
145 let Inst{10} = !if(P.HasSrc2Mods, src2_modifiers{1}, 0);
147 let Inst{31-26} = 0x34; //encoding
148 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
149 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
150 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
151 let Inst{60-59} = !if(P.HasOMod, omod, 0);
152 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
153 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
154 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
157 class VOP3a_si <bits<9> op, VOPProfile P> : VOP3a<P> {
158 let Inst{25-17} = op;
159 let Inst{11} = !if(P.HasClamp, clamp{0}, 0);
162 class VOP3a_vi <bits<10> op, VOPProfile P> : VOP3a<P> {
163 let Inst{25-16} = op;
164 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
167 class VOP3e_si <bits<9> op, VOPProfile P> : VOP3a_si <op, P> {
169 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
172 class VOP3e_vi <bits<10> op, VOPProfile P> : VOP3a_vi <op, P> {
174 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
177 class VOP3be <VOPProfile P> : Enc64 {
179 bits<2> src0_modifiers;
181 bits<2> src1_modifiers;
183 bits<2> src2_modifiers;
188 let Inst{7-0} = vdst;
189 let Inst{14-8} = sdst;
190 let Inst{31-26} = 0x34; //encoding
191 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
192 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
193 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
194 let Inst{60-59} = !if(P.HasOMod, omod, 0);
195 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
196 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
197 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
200 class VOP3be_si <bits<9> op, VOPProfile P> : VOP3be<P> {
201 let Inst{25-17} = op;
204 class VOP3be_vi <bits<10> op, VOPProfile P> : VOP3be<P> {
206 let Inst{25-16} = op;
207 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
223 int UNUSED_PRESERVE = 2;
226 class VOP_SDWAe<VOPProfile P> : Enc64 {
229 bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
231 bits<2> src1_modifiers;
236 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
237 let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD);
238 let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE);
239 let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0);
240 let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD);
241 let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
242 let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
243 let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD);
244 let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
245 let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
248 class VOP_SDWA_Pseudo <string opName, VOPProfile P, list<dag> pattern=[]> :
249 InstSI <P.OutsSDWA, P.InsSDWA, "", pattern>,
251 SIMCInstr <opName#"_sdwa", SIEncodingFamily.NONE>,
252 MnemonicAlias <opName#"_sdwa", opName> {
255 let isCodeGenOnly = 1;
256 let UseNamedOperandTable = 1;
258 string Mnemonic = opName;
259 string AsmOperands = P.AsmSDWA;
264 let hasSideEffects = 0;
270 let SubtargetPredicate = isVI;
271 let AssemblerPredicate = !if(P.HasExt, isVI, DisableInst);
272 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.SDWA,
273 AMDGPUAsmVariants.Disable);
274 let DecoderNamespace = "SDWA";
279 class VOP_SDWA_Real <VOP_SDWA_Pseudo ps> :
280 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
281 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.VI> {
284 let isCodeGenOnly = 0;
288 let SchedRW = ps.SchedRW;
289 let hasSideEffects = ps.hasSideEffects;
291 let Constraints = ps.Constraints;
292 let DisableEncoding = ps.DisableEncoding;
294 // Copy relevant pseudo op flags
295 let SubtargetPredicate = ps.SubtargetPredicate;
296 let AssemblerPredicate = ps.AssemblerPredicate;
297 let AsmMatchConverter = ps.AsmMatchConverter;
298 let AsmVariantName = ps.AsmVariantName;
299 let UseNamedOperandTable = ps.UseNamedOperandTable;
300 let DecoderNamespace = ps.DecoderNamespace;
301 let Constraints = ps.Constraints;
302 let DisableEncoding = ps.DisableEncoding;
303 let TSFlags = ps.TSFlags;
306 class VOP_DPPe<VOPProfile P> : Enc64 {
307 bits<2> src0_modifiers;
309 bits<2> src1_modifiers;
315 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
316 let Inst{48-40} = dpp_ctrl;
317 let Inst{51} = bound_ctrl;
318 let Inst{52} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // src0_neg
319 let Inst{53} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs
320 let Inst{54} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // src1_neg
321 let Inst{55} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs
322 let Inst{59-56} = bank_mask;
323 let Inst{63-60} = row_mask;
326 class VOP_DPP <string OpName, VOPProfile P> :
327 InstSI <P.OutsDPP, P.InsDPP, OpName#P.AsmDPP, []>,
332 let hasSideEffects = 0;
333 let UseNamedOperandTable = 1;
339 let AsmMatchConverter = !if(!eq(P.HasModifiers,1), "cvtDPP", "");
340 let SubtargetPredicate = isVI;
341 let AssemblerPredicate = !if(P.HasExt, isVI, DisableInst);
342 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.DPP,
343 AMDGPUAsmVariants.Disable);
344 let DecoderNamespace = "DPP";
347 include "VOPCInstructions.td"
348 include "VOP1Instructions.td"
349 include "VOP2Instructions.td"
350 include "VOP3Instructions.td"