1 //===-- VOPInstructions.td - Vector Instruction Defintions ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // dummies for outer let
13 bit isConvertibleToThreeAddress;
15 bit isReMaterializable;
17 bit VOPAsmPrefer32Bit;
18 Predicate SubtargetPredicate;
20 string DisableEncoding;
21 list<SchedReadWrite> SchedRW;
26 class VOP <string opName> {
27 string OpName = opName;
30 class VOPAnyCommon <dag outs, dag ins, string asm, list<dag> pattern> :
31 InstSI <outs, ins, asm, pattern> {
35 let hasSideEffects = 0;
36 let UseNamedOperandTable = 1;
41 class VOP3Common <dag outs, dag ins, string asm = "",
42 list<dag> pattern = [], bit HasMods = 0,
44 VOPAnyCommon <outs, ins, asm, pattern> {
46 // Using complex patterns gives VOP3 patterns a very high complexity rating,
47 // but standalone patterns are almost always preferred, so we need to adjust the
48 // priority lower. The goal is to use a high number to reduce complexity to
49 // zero (or less than zero).
50 let AddedComplexity = -1000;
54 let AsmVariantName = AMDGPUAsmVariants.VOP3;
55 let AsmMatchConverter = !if(!eq(HasMods,1), "cvtVOP3", "");
57 let isCodeGenOnly = 0;
61 // Because SGPRs may be allowed if there are multiple operands, we
62 // need a post-isel hook to insert copies in order to avoid
63 // violating constant bus requirements.
64 let hasPostISelHook = 1;
67 class VOP3_Pseudo <string opName, VOPProfile P, list<dag> pattern = [],
68 bit VOP3Only = 0, bit isVOP3P = 0> :
69 InstSI <P.Outs64, !if(!and(isVOP3P, P.IsPacked), P.InsVOP3P, P.Ins64), "", pattern>,
71 SIMCInstr<opName#"_e64", SIEncodingFamily.NONE>,
72 MnemonicAlias<opName#"_e64", opName> {
75 let isCodeGenOnly = 1;
76 let UseNamedOperandTable = 1;
78 string Mnemonic = opName;
79 string AsmOperands = !if(!and(isVOP3P, P.IsPacked), P.AsmVOP3P, P.Asm64);
84 let hasSideEffects = 0;
85 let SubtargetPredicate = isGCN;
87 // Because SGPRs may be allowed if there are multiple operands, we
88 // need a post-isel hook to insert copies in order to avoid
89 // violating constant bus requirements.
90 let hasPostISelHook = 1;
92 // Using complex patterns gives VOP3 patterns a very high complexity rating,
93 // but standalone patterns are almost always preferred, so we need to adjust the
94 // priority lower. The goal is to use a high number to reduce complexity to
95 // zero (or less than zero).
96 let AddedComplexity = -1000;
100 let FPClamp = P.HasFPClamp;
103 let AsmVariantName = AMDGPUAsmVariants.VOP3;
104 let AsmMatchConverter =
105 !if(!and(P.IsPacked, isVOP3P),
107 !if(!or(P.HasModifiers, P.HasOMod),
114 class VOP3P_Pseudo <string opName, VOPProfile P, list<dag> pattern = []> :
115 VOP3_Pseudo<opName, P, pattern, 1, 1> {
119 class VOP3_Real <VOP3_Pseudo ps, int EncodingFamily> :
120 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
121 SIMCInstr <ps.PseudoInstr, EncodingFamily> {
124 let isCodeGenOnly = 0;
125 let UseNamedOperandTable = 1;
127 let Constraints = ps.Constraints;
128 let DisableEncoding = ps.DisableEncoding;
130 // copy relevant pseudo op flags
131 let SubtargetPredicate = ps.SubtargetPredicate;
132 let AsmMatchConverter = ps.AsmMatchConverter;
133 let AsmVariantName = ps.AsmVariantName;
134 let Constraints = ps.Constraints;
135 let DisableEncoding = ps.DisableEncoding;
136 let TSFlags = ps.TSFlags;
137 let UseNamedOperandTable = ps.UseNamedOperandTable;
140 VOPProfile Pfl = ps.Pfl;
143 // XXX - Is there any reason to distingusih this from regular VOP3
145 class VOP3P_Real<VOP3P_Pseudo ps, int EncodingFamily> :
146 VOP3_Real<ps, EncodingFamily>;
148 class VOP3a<VOPProfile P> : Enc64 {
149 bits<2> src0_modifiers;
151 bits<2> src1_modifiers;
153 bits<2> src2_modifiers;
158 let Inst{8} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0);
159 let Inst{9} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0);
160 let Inst{10} = !if(P.HasSrc2Mods, src2_modifiers{1}, 0);
162 let Inst{31-26} = 0x34; //encoding
163 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
164 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
165 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
166 let Inst{60-59} = !if(P.HasOMod, omod, 0);
167 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
168 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
169 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
172 class VOP3a_si <bits<9> op, VOPProfile P> : VOP3a<P> {
173 let Inst{25-17} = op;
174 let Inst{11} = !if(P.HasClamp, clamp{0}, 0);
177 class VOP3a_vi <bits<10> op, VOPProfile P> : VOP3a<P> {
178 let Inst{25-16} = op;
179 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
182 class VOP3e_si <bits<9> op, VOPProfile P> : VOP3a_si <op, P> {
184 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
187 class VOP3e_vi <bits<10> op, VOPProfile P> : VOP3a_vi <op, P> {
189 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
192 class VOP3be <VOPProfile P> : Enc64 {
194 bits<2> src0_modifiers;
196 bits<2> src1_modifiers;
198 bits<2> src2_modifiers;
203 let Inst{7-0} = vdst;
204 let Inst{14-8} = sdst;
205 let Inst{31-26} = 0x34; //encoding
206 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
207 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
208 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
209 let Inst{60-59} = !if(P.HasOMod, omod, 0);
210 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
211 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
212 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
215 class VOP3Pe <bits<10> op, VOPProfile P> : Enc64 {
217 // neg, neg_hi, op_sel put in srcN_modifiers
218 bits<4> src0_modifiers;
220 bits<4> src1_modifiers;
222 bits<4> src2_modifiers;
226 let Inst{7-0} = vdst;
227 let Inst{8} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // neg_hi src0
228 let Inst{9} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // neg_hi src1
229 let Inst{10} = !if(P.HasSrc2Mods, src2_modifiers{1}, 0); // neg_hi src2
231 let Inst{11} = !if(!and(P.HasSrc0, P.HasOpSel), src0_modifiers{2}, 0); // op_sel(0)
232 let Inst{12} = !if(!and(P.HasSrc1, P.HasOpSel), src1_modifiers{2}, 0); // op_sel(1)
233 let Inst{13} = !if(!and(P.HasSrc2, P.HasOpSel), src2_modifiers{2}, 0); // op_sel(2)
235 let Inst{14} = !if(!and(P.HasSrc2, P.HasOpSel), src2_modifiers{3}, 0); // op_sel_hi(2)
237 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
239 let Inst{25-16} = op;
240 let Inst{31-26} = 0x34; //encoding
241 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
242 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
243 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
244 let Inst{59} = !if(!and(P.HasSrc0, P.HasOpSel), src0_modifiers{3}, 0); // op_sel_hi(0)
245 let Inst{60} = !if(!and(P.HasSrc1, P.HasOpSel), src1_modifiers{3}, 0); // op_sel_hi(1)
246 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // neg (lo)
247 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // neg (lo)
248 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0); // neg (lo)
251 class VOP3be_si <bits<9> op, VOPProfile P> : VOP3be<P> {
252 let Inst{25-17} = op;
255 class VOP3be_vi <bits<10> op, VOPProfile P> : VOP3be<P> {
257 let Inst{25-16} = op;
258 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
274 int UNUSED_PRESERVE = 2;
277 class VOP_SDWAe<VOPProfile P> : Enc64 {
280 bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
282 bits<2> src1_modifiers;
287 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
288 let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD);
289 let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE);
290 let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0);
291 let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD);
292 let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
293 let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
294 let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD);
295 let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
296 let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
299 // GFX9 adds two features to SDWA:
300 // 1. Add 3 fields to the SDWA microcode word: S0, S1 and OMOD.
301 // a. S0 and S1 indicate that source 0 and 1 respectively are SGPRs rather
302 // than VGPRs (at most 1 can be an SGPR);
303 // b. OMOD is the standard output modifier (result *2, *4, /2)
304 // 2. Add a new version of the SDWA microcode word for VOPC: SDWAB. This
305 // replaces OMOD and the dest fields with SD and SDST (SGPR destination)
307 // a. When SD=1, the SDST is used as the destination for the compare result;
308 // b. When SD=0, VCC is used.
310 // In GFX9, V_MAC_F16, V_MAC_F32 opcodes cannot be used with SDWA
312 // gfx9 SDWA basic encoding
313 class VOP_SDWA9e<VOPProfile P> : Enc64 {
314 bits<9> src0; // {src0_sgpr{0}, src0{7-0}}
316 bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
318 bits<2> src1_modifiers;
321 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
322 let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD);
323 let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
324 let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
325 let Inst{55} = !if(P.HasSrc0, src0{8}, 0);
326 let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD);
327 let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
328 let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
329 let Inst{63} = 0; // src1_sgpr - should be specified in subclass
333 class VOP_SDWA9Ae<VOPProfile P> : VOP_SDWA9e<P> {
339 let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD);
340 let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE);
341 let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0);
342 let Inst{47-46} = !if(P.HasSDWAOMod, omod{1-0}, 0);
346 class VOP_SDWA9Be<VOPProfile P> : VOP_SDWA9e<P> {
347 bits<8> sdst; // {vcc_sdst{0}, sdst{6-0}}
349 let Inst{46-40} = !if(P.EmitDst, sdst{6-0}, 0);
350 let Inst{47} = !if(P.EmitDst, sdst{7}, 0);
353 class VOP_SDWA_Pseudo <string opName, VOPProfile P, list<dag> pattern=[]> :
354 InstSI <P.OutsSDWA, P.InsSDWA, "", pattern>,
356 SIMCInstr <opName#"_sdwa", SIEncodingFamily.NONE>,
357 MnemonicAlias <opName#"_sdwa", opName> {
360 let isCodeGenOnly = 1;
361 let UseNamedOperandTable = 1;
363 string Mnemonic = opName;
364 string AsmOperands = P.AsmSDWA;
365 string AsmOperands9 = P.AsmSDWA9;
370 let hasSideEffects = 0;
376 let SubtargetPredicate = !if(P.HasExt, HasSDWA, DisableInst);
377 let AssemblerPredicate = !if(P.HasExt, HasSDWA, DisableInst);
378 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.SDWA,
379 AMDGPUAsmVariants.Disable);
380 let DecoderNamespace = "SDWA";
385 class VOP_SDWA_Real <VOP_SDWA_Pseudo ps> :
386 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
387 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA> {
390 let isCodeGenOnly = 0;
394 let SchedRW = ps.SchedRW;
395 let hasSideEffects = ps.hasSideEffects;
397 let Constraints = ps.Constraints;
398 let DisableEncoding = ps.DisableEncoding;
400 // Copy relevant pseudo op flags
401 let SubtargetPredicate = ps.SubtargetPredicate;
402 let AssemblerPredicate = ps.AssemblerPredicate;
403 let AsmMatchConverter = ps.AsmMatchConverter;
404 let AsmVariantName = ps.AsmVariantName;
405 let UseNamedOperandTable = ps.UseNamedOperandTable;
406 let DecoderNamespace = ps.DecoderNamespace;
407 let Constraints = ps.Constraints;
408 let DisableEncoding = ps.DisableEncoding;
409 let TSFlags = ps.TSFlags;
412 class VOP_SDWA9_Real <VOP_SDWA_Pseudo ps> :
413 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands9, []>,
414 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA9> {
417 let isCodeGenOnly = 0;
421 let SchedRW = ps.SchedRW;
422 let hasSideEffects = ps.hasSideEffects;
424 let Constraints = ps.Constraints;
425 let DisableEncoding = ps.DisableEncoding;
427 let SubtargetPredicate = !if(ps.Pfl.HasSDWA9, HasSDWA9, DisableInst);
428 let AssemblerPredicate = !if(ps.Pfl.HasSDWA9, HasSDWA9, DisableInst);
429 let AsmVariantName = !if(ps.Pfl.HasSDWA9, AMDGPUAsmVariants.SDWA9,
430 AMDGPUAsmVariants.Disable);
431 let DecoderNamespace = "SDWA9";
433 // Copy relevant pseudo op flags
434 let AsmMatchConverter = ps.AsmMatchConverter;
435 let UseNamedOperandTable = ps.UseNamedOperandTable;
436 let Constraints = ps.Constraints;
437 let DisableEncoding = ps.DisableEncoding;
438 let TSFlags = ps.TSFlags;
441 class VOP_DPPe<VOPProfile P> : Enc64 {
442 bits<2> src0_modifiers;
444 bits<2> src1_modifiers;
450 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
451 let Inst{48-40} = dpp_ctrl;
452 let Inst{51} = bound_ctrl;
453 let Inst{52} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // src0_neg
454 let Inst{53} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs
455 let Inst{54} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // src1_neg
456 let Inst{55} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs
457 let Inst{59-56} = bank_mask;
458 let Inst{63-60} = row_mask;
461 class VOP_DPP <string OpName, VOPProfile P> :
462 InstSI <P.OutsDPP, P.InsDPP, OpName#P.AsmDPP, []>,
467 let hasSideEffects = 0;
468 let UseNamedOperandTable = 1;
474 let AsmMatchConverter = !if(!eq(P.HasModifiers,1), "cvtDPP", "");
475 let SubtargetPredicate = HasDPP;
476 let AssemblerPredicate = !if(P.HasExt, HasDPP, DisableInst);
477 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.DPP,
478 AMDGPUAsmVariants.Disable);
479 let DecoderNamespace = "DPP";
482 include "VOPCInstructions.td"
483 include "VOP1Instructions.td"
484 include "VOP2Instructions.td"
485 include "VOP3Instructions.td"
486 include "VOP3PInstructions.td"