1 //===-- VOPInstructions.td - Vector Instruction Defintions ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // dummies for outer let
13 bit isConvertibleToThreeAddress;
15 bit isReMaterializable;
17 bit VOPAsmPrefer32Bit;
18 Predicate SubtargetPredicate;
20 string DisableEncoding;
21 list<SchedReadWrite> SchedRW;
26 class VOP <string opName> {
27 string OpName = opName;
30 class VOPAnyCommon <dag outs, dag ins, string asm, list<dag> pattern> :
31 InstSI <outs, ins, asm, pattern> {
35 let hasSideEffects = 0;
36 let UseNamedOperandTable = 1;
41 class VOP3Common <dag outs, dag ins, string asm = "",
42 list<dag> pattern = [], bit HasMods = 0,
44 VOPAnyCommon <outs, ins, asm, pattern> {
46 // Using complex patterns gives VOP3 patterns a very high complexity rating,
47 // but standalone patterns are almost always preferred, so we need to adjust the
48 // priority lower. The goal is to use a high number to reduce complexity to
49 // zero (or less than zero).
50 let AddedComplexity = -1000;
54 let AsmMatchConverter =
57 !if(!eq(HasMods,1), "cvtVOP3_2_mod", ""));
59 let AsmVariantName = AMDGPUAsmVariants.VOP3;
61 let isCodeGenOnly = 0;
65 // Because SGPRs may be allowed if there are multiple operands, we
66 // need a post-isel hook to insert copies in order to avoid
67 // violating constant bus requirements.
68 let hasPostISelHook = 1;
71 class VOP3_Pseudo <string opName, VOPProfile P, list<dag> pattern = [],
72 bit VOP3Only = 0, bit isVOP3P = 0> :
73 InstSI <P.Outs64, !if(!and(isVOP3P, P.IsPacked), P.InsVOP3P, P.Ins64), "", pattern>,
75 SIMCInstr<opName#"_e64", SIEncodingFamily.NONE>,
76 MnemonicAlias<opName#"_e64", opName> {
79 let isCodeGenOnly = 1;
80 let UseNamedOperandTable = 1;
82 string Mnemonic = opName;
83 string AsmOperands = !if(!and(isVOP3P, P.IsPacked), P.AsmVOP3P, P.Asm64);
88 let hasSideEffects = 0;
89 let SubtargetPredicate = isGCN;
91 // Because SGPRs may be allowed if there are multiple operands, we
92 // need a post-isel hook to insert copies in order to avoid
93 // violating constant bus requirements.
94 let hasPostISelHook = 1;
96 // Using complex patterns gives VOP3 patterns a very high complexity rating,
97 // but standalone patterns are almost always preferred, so we need to adjust the
98 // priority lower. The goal is to use a high number to reduce complexity to
99 // zero (or less than zero).
100 let AddedComplexity = -1000;
104 let FPClamp = P.HasFPClamp;
107 let AsmVariantName = AMDGPUAsmVariants.VOP3;
108 let AsmMatchConverter =
110 !if(!and(P.IsPacked, isVOP3P), "cvtVOP3P", "cvtVOP3"),
111 !if(!eq(P.HasModifiers, 1),
113 !if(!eq(P.HasOMod, 1), "cvtVOP3OMod", "")
120 class VOP3P_Pseudo <string opName, VOPProfile P, list<dag> pattern = []> :
121 VOP3_Pseudo<opName, P, pattern, 1, 1> {
125 class VOP3_Real <VOP3_Pseudo ps, int EncodingFamily> :
126 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
127 SIMCInstr <ps.PseudoInstr, EncodingFamily> {
130 let isCodeGenOnly = 0;
131 let UseNamedOperandTable = 1;
133 let Constraints = ps.Constraints;
134 let DisableEncoding = ps.DisableEncoding;
136 // copy relevant pseudo op flags
137 let SubtargetPredicate = ps.SubtargetPredicate;
138 let AsmMatchConverter = ps.AsmMatchConverter;
139 let AsmVariantName = ps.AsmVariantName;
140 let Constraints = ps.Constraints;
141 let DisableEncoding = ps.DisableEncoding;
142 let TSFlags = ps.TSFlags;
143 let UseNamedOperandTable = ps.UseNamedOperandTable;
147 // XXX - Is there any reason to distingusih this from regular VOP3
149 class VOP3P_Real<VOP3P_Pseudo ps, int EncodingFamily> :
150 VOP3_Real<ps, EncodingFamily>;
152 class VOP3a<VOPProfile P> : Enc64 {
153 bits<2> src0_modifiers;
155 bits<2> src1_modifiers;
157 bits<2> src2_modifiers;
162 let Inst{8} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0);
163 let Inst{9} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0);
164 let Inst{10} = !if(P.HasSrc2Mods, src2_modifiers{1}, 0);
166 let Inst{31-26} = 0x34; //encoding
167 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
168 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
169 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
170 let Inst{60-59} = !if(P.HasOMod, omod, 0);
171 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
172 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
173 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
176 class VOP3a_si <bits<9> op, VOPProfile P> : VOP3a<P> {
177 let Inst{25-17} = op;
178 let Inst{11} = !if(P.HasClamp, clamp{0}, 0);
181 class VOP3a_vi <bits<10> op, VOPProfile P> : VOP3a<P> {
182 let Inst{25-16} = op;
183 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
186 class VOP3e_si <bits<9> op, VOPProfile P> : VOP3a_si <op, P> {
188 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
191 class VOP3e_vi <bits<10> op, VOPProfile P> : VOP3a_vi <op, P> {
193 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
196 class VOP3be <VOPProfile P> : Enc64 {
198 bits<2> src0_modifiers;
200 bits<2> src1_modifiers;
202 bits<2> src2_modifiers;
207 let Inst{7-0} = vdst;
208 let Inst{14-8} = sdst;
209 let Inst{31-26} = 0x34; //encoding
210 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
211 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
212 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
213 let Inst{60-59} = !if(P.HasOMod, omod, 0);
214 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
215 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
216 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
219 class VOP3Pe <bits<10> op, VOPProfile P> : Enc64 {
221 // neg, neg_hi, op_sel put in srcN_modifiers
222 bits<4> src0_modifiers;
224 bits<4> src1_modifiers;
226 bits<4> src2_modifiers;
230 let Inst{7-0} = vdst;
231 let Inst{8} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // neg_hi src0
232 let Inst{9} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // neg_hi src1
233 let Inst{10} = !if(P.HasSrc2Mods, src2_modifiers{1}, 0); // neg_hi src2
235 let Inst{11} = !if(P.HasOpSel, src0_modifiers{2}, 0); // op_sel(0)
236 let Inst{12} = !if(P.HasOpSel, src1_modifiers{2}, 0); // op_sel(1)
237 let Inst{13} = !if(P.HasOpSel, src2_modifiers{2}, 0); // op_sel(2)
239 let Inst{14} = !if(P.HasOpSel, src2_modifiers{3}, 0); // op_sel_hi(2)
241 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
243 let Inst{25-16} = op;
244 let Inst{31-26} = 0x34; //encoding
245 let Inst{40-32} = !if(P.HasSrc0, src0, 0);
246 let Inst{49-41} = !if(P.HasSrc1, src1, 0);
247 let Inst{58-50} = !if(P.HasSrc2, src2, 0);
248 let Inst{59} = !if(P.HasOpSel, src0_modifiers{3}, 0); // op_sel_hi(0)
249 let Inst{60} = !if(P.HasOpSel, src1_modifiers{3}, 0); // op_sel_hi(1)
250 let Inst{61} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // neg (lo)
251 let Inst{62} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // neg (lo)
252 let Inst{63} = !if(P.HasSrc2Mods, src2_modifiers{0}, 0); // neg (lo)
255 class VOP3be_si <bits<9> op, VOPProfile P> : VOP3be<P> {
256 let Inst{25-17} = op;
259 class VOP3be_vi <bits<10> op, VOPProfile P> : VOP3be<P> {
261 let Inst{25-16} = op;
262 let Inst{15} = !if(P.HasClamp, clamp{0}, 0);
278 int UNUSED_PRESERVE = 2;
281 class VOP_SDWAe<VOPProfile P> : Enc64 {
284 bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
286 bits<2> src1_modifiers;
291 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
292 let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD);
293 let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE);
294 let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0);
295 let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD);
296 let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
297 let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
298 let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD);
299 let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
300 let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
303 // gfx9 SDWA basic encoding
304 class VOP_SDWA9e<VOPProfile P> : Enc64 {
305 bits<9> src0; // {src0_sgpr{0}, src0{7-0}}
307 bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
309 bits<2> src1_modifiers;
312 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
313 let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD);
314 let Inst{51} = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
315 let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
316 let Inst{55} = !if(P.HasSrc0, src0{8}, 0);
317 let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD);
318 let Inst{59} = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
319 let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
320 let Inst{63} = 0; // src1_sgpr - should be specified in subclass
324 class VOP_SDWA9Ae<VOPProfile P> : VOP_SDWA9e<P> {
330 let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD);
331 let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE);
332 let Inst{45} = !if(P.HasSDWAClamp, clamp{0}, 0);
333 let Inst{47-46} = !if(P.HasSDWAOMod, omod{1-0}, 0);
337 class VOP_SDWA9Be<VOPProfile P> : VOP_SDWA9e<P> {
338 bits<8> sdst; // {vcc_sdst{0}, sdst{6-0}}
340 let Inst{46-40} = !if(P.EmitDst, sdst{6-0}, 0);
341 let Inst{47} = !if(P.EmitDst, sdst{7}, 0);
344 class VOP_SDWA_Pseudo <string opName, VOPProfile P, list<dag> pattern=[]> :
345 InstSI <P.OutsSDWA, P.InsSDWA, "", pattern>,
347 SIMCInstr <opName#"_sdwa", SIEncodingFamily.NONE>,
348 MnemonicAlias <opName#"_sdwa", opName> {
351 let isCodeGenOnly = 1;
352 let UseNamedOperandTable = 1;
354 string Mnemonic = opName;
355 string AsmOperands = P.AsmSDWA;
360 let hasSideEffects = 0;
366 let SubtargetPredicate = !if(P.HasExt, HasSDWA, DisableInst);
367 let AssemblerPredicate = !if(P.HasExt, HasSDWA, DisableInst);
368 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.SDWA,
369 AMDGPUAsmVariants.Disable);
370 let DecoderNamespace = "SDWA";
375 // GFX9 adds two features to SDWA:
376 // 1. Add 3 fields to the SDWA microcode word: S0, S1 and OMOD.
377 // a. S0 and S1 indicate that source 0 and 1 respectively are SGPRs rather
378 // than VGPRs (at most 1 can be an SGPR);
379 // b. OMOD is the standard output modifier (result *2, *4, /2)
380 // 2. Add a new version of the SDWA microcode word for VOPC: SDWAB. This
381 // replaces OMOD and the dest fields with SD and SDST (SGPR destination)
383 // a. When SD=1, the SDST is used as the destination for the compare result;
384 // b.when SD=0, VCC is used.
386 // In GFX9, V_MAC_F16, V_MAC_F32 opcodes cannot be used with SDWA
388 class VOP_SDWA9_Pseudo <string opName, VOPProfile P, list<dag> pattern=[]> :
389 InstSI <P.OutsSDWA9, P.InsSDWA9, "", pattern>,
391 SIMCInstr <opName#"_sdwa9", SIEncodingFamily.NONE>,
392 MnemonicAlias <opName#"_sdwa9", opName> {
395 let isCodeGenOnly = 1;
396 let UseNamedOperandTable = 1;
398 string Mnemonic = opName;
399 string AsmOperands = P.AsmSDWA9;
404 let hasSideEffects = 0;
410 let SubtargetPredicate = !if(P.HasSDWA9, HasSDWA9, DisableInst);
411 let AssemblerPredicate = !if(P.HasSDWA9, HasSDWA9, DisableInst);
412 let AsmVariantName = !if(P.HasSDWA9, AMDGPUAsmVariants.SDWA9,
413 AMDGPUAsmVariants.Disable);
414 let DecoderNamespace = "SDWA9";
419 class VOP_SDWA_Real <VOP_SDWA_Pseudo ps> :
420 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
421 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.VI> {
424 let isCodeGenOnly = 0;
428 let SchedRW = ps.SchedRW;
429 let hasSideEffects = ps.hasSideEffects;
431 let Constraints = ps.Constraints;
432 let DisableEncoding = ps.DisableEncoding;
434 // Copy relevant pseudo op flags
435 let SubtargetPredicate = ps.SubtargetPredicate;
436 let AssemblerPredicate = ps.AssemblerPredicate;
437 let AsmMatchConverter = ps.AsmMatchConverter;
438 let AsmVariantName = ps.AsmVariantName;
439 let UseNamedOperandTable = ps.UseNamedOperandTable;
440 let DecoderNamespace = ps.DecoderNamespace;
441 let Constraints = ps.Constraints;
442 let DisableEncoding = ps.DisableEncoding;
443 let TSFlags = ps.TSFlags;
446 class VOP_SDWA9_Real <VOP_SDWA9_Pseudo ps> :
447 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
448 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.VI> {
451 let isCodeGenOnly = 0;
455 let SchedRW = ps.SchedRW;
456 let hasSideEffects = ps.hasSideEffects;
458 let Constraints = ps.Constraints;
459 let DisableEncoding = ps.DisableEncoding;
461 // Copy relevant pseudo op flags
462 let SubtargetPredicate = ps.SubtargetPredicate;
463 let AssemblerPredicate = ps.AssemblerPredicate;
464 let AsmMatchConverter = ps.AsmMatchConverter;
465 let AsmVariantName = ps.AsmVariantName;
466 let UseNamedOperandTable = ps.UseNamedOperandTable;
467 let DecoderNamespace = ps.DecoderNamespace;
468 let Constraints = ps.Constraints;
469 let DisableEncoding = ps.DisableEncoding;
470 let TSFlags = ps.TSFlags;
473 class VOP_DPPe<VOPProfile P> : Enc64 {
474 bits<2> src0_modifiers;
476 bits<2> src1_modifiers;
482 let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
483 let Inst{48-40} = dpp_ctrl;
484 let Inst{51} = bound_ctrl;
485 let Inst{52} = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // src0_neg
486 let Inst{53} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs
487 let Inst{54} = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // src1_neg
488 let Inst{55} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs
489 let Inst{59-56} = bank_mask;
490 let Inst{63-60} = row_mask;
493 class VOP_DPP <string OpName, VOPProfile P> :
494 InstSI <P.OutsDPP, P.InsDPP, OpName#P.AsmDPP, []>,
499 let hasSideEffects = 0;
500 let UseNamedOperandTable = 1;
506 let AsmMatchConverter = !if(!eq(P.HasModifiers,1), "cvtDPP", "");
507 let SubtargetPredicate = HasDPP;
508 let AssemblerPredicate = !if(P.HasExt, HasDPP, DisableInst);
509 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.DPP,
510 AMDGPUAsmVariants.Disable);
511 let DecoderNamespace = "DPP";
514 include "VOPCInstructions.td"
515 include "VOP1Instructions.td"
516 include "VOP2Instructions.td"
517 include "VOP3Instructions.td"
518 include "VOP3PInstructions.td"