1 //===- ARCExpandPseudosPass - ARC expand pseudo loads -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass expands stores with large offsets into an appropriate sequence.
11 //===----------------------------------------------------------------------===//
14 #include "ARCInstrInfo.h"
15 #include "ARCRegisterInfo.h"
16 #include "ARCSubtarget.h"
17 #include "llvm/ADT/Statistic.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #define DEBUG_TYPE "arc-expand-pseudos"
28 class ARCExpandPseudos : public MachineFunctionPass {
31 ARCExpandPseudos() : MachineFunctionPass(ID) {}
33 bool runOnMachineFunction(MachineFunction &Fn) override;
35 StringRef getPassName() const override { return "ARC Expand Pseudos"; }
38 void ExpandStore(MachineFunction &, MachineBasicBlock::iterator);
40 const ARCInstrInfo *TII;
43 char ARCExpandPseudos::ID = 0;
45 } // end anonymous namespace
47 static unsigned getMappedOp(unsigned PseudoOp) {
56 llvm_unreachable("Unhandled pseudo op.");
60 void ARCExpandPseudos::ExpandStore(MachineFunction &MF,
61 MachineBasicBlock::iterator SII) {
62 MachineInstr &SI = *SII;
63 unsigned AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass);
65 isUInt<6>(SI.getOperand(2).getImm()) ? ARC::ADD_rru6 : ARC::ADD_rrlimm;
66 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(), TII->get(AddOpc), AddrReg)
67 .addReg(SI.getOperand(1).getReg())
68 .addImm(SI.getOperand(2).getImm());
69 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(),
70 TII->get(getMappedOp(SI.getOpcode())))
71 .addReg(SI.getOperand(0).getReg())
77 bool ARCExpandPseudos::runOnMachineFunction(MachineFunction &MF) {
78 const ARCSubtarget *STI = &MF.getSubtarget<ARCSubtarget>();
79 TII = STI->getInstrInfo();
80 bool ExpandedStore = false;
81 for (auto &MBB : MF) {
82 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
84 MachineBasicBlock::iterator NMBBI = std::next(MBBI);
85 switch (MBBI->getOpcode()) {
89 ExpandStore(MF, MBBI);
101 FunctionPass *llvm::createARCExpandPseudosPass() {
102 return new ARCExpandPseudos();