1 //===-- ARMMCInstLower.cpp - Convert ARM MachineInstr to an MCInst --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains code to lower ARM MachineInstrs to their corresponding
13 //===----------------------------------------------------------------------===//
16 #include "ARMAsmPrinter.h"
17 #include "MCTargetDesc/ARMBaseInfo.h"
18 #include "MCTargetDesc/ARMMCExpr.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/IR/Constants.h"
21 #include "llvm/IR/Mangler.h"
22 #include "llvm/MC/MCExpr.h"
23 #include "llvm/MC/MCInst.h"
27 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
28 const MCSymbol *Symbol) {
30 MCSymbolRefExpr::create(Symbol, MCSymbolRefExpr::VK_None, OutContext);
31 switch (MO.getTargetFlags() & ARMII::MO_OPTION_MASK) {
33 llvm_unreachable("Unknown target flag on symbol operand");
34 case ARMII::MO_NO_FLAG:
38 MCSymbolRefExpr::create(Symbol, MCSymbolRefExpr::VK_None, OutContext);
39 Expr = ARMMCExpr::createLower16(Expr, OutContext);
43 MCSymbolRefExpr::create(Symbol, MCSymbolRefExpr::VK_None, OutContext);
44 Expr = ARMMCExpr::createUpper16(Expr, OutContext);
48 if (!MO.isJTI() && MO.getOffset())
49 Expr = MCBinaryExpr::createAdd(Expr,
50 MCConstantExpr::create(MO.getOffset(),
53 return MCOperand::createExpr(Expr);
57 bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
59 switch (MO.getType()) {
60 default: llvm_unreachable("unknown operand type");
61 case MachineOperand::MO_Register:
62 // Ignore all non-CPSR implicit register operands.
63 if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
65 assert(!MO.getSubReg() && "Subregs should be eliminated!");
66 MCOp = MCOperand::createReg(MO.getReg());
68 case MachineOperand::MO_Immediate:
69 MCOp = MCOperand::createImm(MO.getImm());
71 case MachineOperand::MO_MachineBasicBlock:
72 MCOp = MCOperand::createExpr(MCSymbolRefExpr::create(
73 MO.getMBB()->getSymbol(), OutContext));
75 case MachineOperand::MO_GlobalAddress: {
76 MCOp = GetSymbolRef(MO,
77 GetARMGVSymbol(MO.getGlobal(), MO.getTargetFlags()));
80 case MachineOperand::MO_ExternalSymbol:
81 MCOp = GetSymbolRef(MO,
82 GetExternalSymbolSymbol(MO.getSymbolName()));
84 case MachineOperand::MO_JumpTableIndex:
85 MCOp = GetSymbolRef(MO, GetJTISymbol(MO.getIndex()));
87 case MachineOperand::MO_ConstantPoolIndex:
88 MCOp = GetSymbolRef(MO, GetCPISymbol(MO.getIndex()));
90 case MachineOperand::MO_BlockAddress:
91 MCOp = GetSymbolRef(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
93 case MachineOperand::MO_FPImmediate: {
94 APFloat Val = MO.getFPImm()->getValueAPF();
96 Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored);
97 MCOp = MCOperand::createFPImm(Val.convertToDouble());
100 case MachineOperand::MO_RegisterMask:
101 // Ignore call clobbers.
107 void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
109 OutMI.setOpcode(MI->getOpcode());
111 // In the MC layer, we keep modified immediates in their encoded form
112 bool EncodeImms = false;
113 switch (MI->getOpcode()) {
139 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
140 const MachineOperand &MO = MI->getOperand(i);
143 if (AP.lowerOperand(MO, MCOp)) {
144 if (MCOp.isImm() && EncodeImms) {
145 int32_t Enc = ARM_AM::getSOImmVal(MCOp.getImm());
149 OutMI.addOperand(MCOp);