1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
17 #include "ARMSubtarget.h"
18 #include "llvm/ADT/Optional.h"
19 #include "llvm/ADT/StringMap.h"
20 #include "llvm/ADT/StringRef.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/Support/CodeGen.h"
23 #include "llvm/Target/TargetMachine.h"
28 class ARMBaseTargetMachine : public LLVMTargetMachine {
33 ARM_ABI_AAPCS, // ARM EABI
38 std::unique_ptr<TargetLoweringObjectFile> TLOF;
40 mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
43 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
44 StringRef FS, const TargetOptions &Options,
45 Optional<Reloc::Model> RM, CodeModel::Model CM,
46 CodeGenOpt::Level OL, bool isLittle);
47 ~ARMBaseTargetMachine() override;
49 const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
50 // The no argument getSubtargetImpl, while it exists on some targets, is
51 // deprecated and should not be used.
52 const ARMSubtarget *getSubtargetImpl() const = delete;
53 bool isLittleEndian() const { return isLittle; }
55 /// \brief Get the TargetIRAnalysis for this target.
56 TargetIRAnalysis getTargetIRAnalysis() override;
58 // Pass Pipeline Configuration
59 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
61 TargetLoweringObjectFile *getObjFileLowering() const override {
65 bool isMachineVerifierClean() const override {
70 /// ARM/Thumb little endian target machine.
72 class ARMLETargetMachine : public ARMBaseTargetMachine {
74 ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
75 StringRef FS, const TargetOptions &Options,
76 Optional<Reloc::Model> RM, CodeModel::Model CM,
77 CodeGenOpt::Level OL);
80 /// ARM/Thumb big endian target machine.
82 class ARMBETargetMachine : public ARMBaseTargetMachine {
84 ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
85 StringRef FS, const TargetOptions &Options,
86 Optional<Reloc::Model> RM, CodeModel::Model CM,
87 CodeGenOpt::Level OL);
90 } // end namespace llvm
92 #endif // LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H