1 //===-- ARMWinCOFFObjectWriter.cpp - ARM Windows COFF Object Writer -- C++ -==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/ARMFixupKinds.h"
11 #include "llvm/ADT/Twine.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCExpr.h"
14 #include "llvm/MC/MCFixup.h"
15 #include "llvm/MC/MCFixupKindInfo.h"
16 #include "llvm/MC/MCValue.h"
17 #include "llvm/MC/MCWinCOFFObjectWriter.h"
18 #include "llvm/Support/COFF.h"
19 #include "llvm/Support/ErrorHandling.h"
20 #include "llvm/Support/raw_ostream.h"
27 class ARMWinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
29 ARMWinCOFFObjectWriter(bool Is64Bit)
30 : MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_ARMNT) {
31 assert(!Is64Bit && "AArch64 support not yet implemented");
34 ~ARMWinCOFFObjectWriter() override = default;
36 unsigned getRelocType(const MCValue &Target, const MCFixup &Fixup,
38 const MCAsmBackend &MAB) const override;
40 bool recordRelocation(const MCFixup &) const override;
43 } // end anonymous namespace
45 unsigned ARMWinCOFFObjectWriter::getRelocType(const MCValue &Target,
48 const MCAsmBackend &MAB) const {
49 assert(getMachine() == COFF::IMAGE_FILE_MACHINE_ARMNT &&
50 "AArch64 support not yet implemented");
52 MCSymbolRefExpr::VariantKind Modifier =
53 Target.isAbsolute() ? MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
55 switch (static_cast<unsigned>(Fixup.getKind())) {
57 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
58 report_fatal_error(Twine("unsupported relocation type: ") + Info.Name);
62 case MCSymbolRefExpr::VK_COFF_IMGREL32:
63 return COFF::IMAGE_REL_ARM_ADDR32NB;
64 case MCSymbolRefExpr::VK_SECREL:
65 return COFF::IMAGE_REL_ARM_SECREL;
67 return COFF::IMAGE_REL_ARM_ADDR32;
70 return COFF::IMAGE_REL_ARM_SECTION;
72 return COFF::IMAGE_REL_ARM_SECREL;
73 case ARM::fixup_t2_condbranch:
74 return COFF::IMAGE_REL_ARM_BRANCH20T;
75 case ARM::fixup_t2_uncondbranch:
76 return COFF::IMAGE_REL_ARM_BRANCH24T;
77 case ARM::fixup_arm_thumb_bl:
78 case ARM::fixup_arm_thumb_blx:
79 return COFF::IMAGE_REL_ARM_BLX23T;
80 case ARM::fixup_t2_movw_lo16:
81 case ARM::fixup_t2_movt_hi16:
82 return COFF::IMAGE_REL_ARM_MOV32T;
86 bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
87 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16;
92 MCObjectWriter *createARMWinCOFFObjectWriter(raw_pwrite_stream &OS,
94 MCWinCOFFObjectTargetWriter *MOTW = new ARMWinCOFFObjectWriter(Is64Bit);
95 return createWinCOFFObjectWriter(MOTW, OS);
98 } // end namespace llvm