1 //===-- ARMWinCOFFObjectWriter.cpp - ARM Windows COFF Object Writer -- C++ -==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/ARMFixupKinds.h"
11 #include "llvm/ADT/Twine.h"
12 #include "llvm/BinaryFormat/COFF.h"
13 #include "llvm/MC/MCAsmBackend.h"
14 #include "llvm/MC/MCExpr.h"
15 #include "llvm/MC/MCFixup.h"
16 #include "llvm/MC/MCFixupKindInfo.h"
17 #include "llvm/MC/MCValue.h"
18 #include "llvm/MC/MCWinCOFFObjectWriter.h"
19 #include "llvm/Support/ErrorHandling.h"
20 #include "llvm/Support/raw_ostream.h"
27 class ARMWinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
29 ARMWinCOFFObjectWriter(bool Is64Bit)
30 : MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_ARMNT) {
31 assert(!Is64Bit && "AArch64 support not yet implemented");
34 ~ARMWinCOFFObjectWriter() override = default;
36 unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
37 const MCFixup &Fixup, bool IsCrossSection,
38 const MCAsmBackend &MAB) const override;
40 bool recordRelocation(const MCFixup &) const override;
43 } // end anonymous namespace
45 unsigned ARMWinCOFFObjectWriter::getRelocType(MCContext &Ctx,
46 const MCValue &Target,
49 const MCAsmBackend &MAB) const {
50 assert(getMachine() == COFF::IMAGE_FILE_MACHINE_ARMNT &&
51 "AArch64 support not yet implemented");
53 MCSymbolRefExpr::VariantKind Modifier =
54 Target.isAbsolute() ? MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
56 switch (static_cast<unsigned>(Fixup.getKind())) {
58 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
59 report_fatal_error(Twine("unsupported relocation type: ") + Info.Name);
63 case MCSymbolRefExpr::VK_COFF_IMGREL32:
64 return COFF::IMAGE_REL_ARM_ADDR32NB;
65 case MCSymbolRefExpr::VK_SECREL:
66 return COFF::IMAGE_REL_ARM_SECREL;
68 return COFF::IMAGE_REL_ARM_ADDR32;
71 return COFF::IMAGE_REL_ARM_SECTION;
73 return COFF::IMAGE_REL_ARM_SECREL;
74 case ARM::fixup_t2_condbranch:
75 return COFF::IMAGE_REL_ARM_BRANCH20T;
76 case ARM::fixup_t2_uncondbranch:
77 return COFF::IMAGE_REL_ARM_BRANCH24T;
78 case ARM::fixup_arm_thumb_bl:
79 case ARM::fixup_arm_thumb_blx:
80 return COFF::IMAGE_REL_ARM_BLX23T;
81 case ARM::fixup_t2_movw_lo16:
82 case ARM::fixup_t2_movt_hi16:
83 return COFF::IMAGE_REL_ARM_MOV32T;
87 bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
88 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16;
93 MCObjectWriter *createARMWinCOFFObjectWriter(raw_pwrite_stream &OS,
95 MCWinCOFFObjectTargetWriter *MOTW = new ARMWinCOFFObjectWriter(Is64Bit);
96 return createWinCOFFObjectWriter(MOTW, OS);
99 } // end namespace llvm