1 //===-- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "Thumb1InstrInfo.h"
15 #include "ARMSubtarget.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineInstrBuilder.h"
18 #include "llvm/CodeGen/MachineMemOperand.h"
19 #include "llvm/CodeGen/MachineRegisterInfo.h"
20 #include "llvm/MC/MCInst.h"
24 Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
25 : ARMBaseInstrInfo(STI), RI() {}
27 /// Return the noop instruction to use for a noop.
28 void Thumb1InstrInfo::getNoop(MCInst &NopInst) const {
29 NopInst.setOpcode(ARM::tMOVr);
30 NopInst.addOperand(MCOperand::createReg(ARM::R8));
31 NopInst.addOperand(MCOperand::createReg(ARM::R8));
32 NopInst.addOperand(MCOperand::createImm(ARMCC::AL));
33 NopInst.addOperand(MCOperand::createReg(0));
36 unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {
40 void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
41 MachineBasicBlock::iterator I,
42 const DebugLoc &DL, unsigned DestReg,
43 unsigned SrcReg, bool KillSrc) const {
44 // Need to check the arch.
45 MachineFunction &MF = *MBB.getParent();
46 const ARMSubtarget &st = MF.getSubtarget<ARMSubtarget>();
48 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
49 "Thumb1 can only copy GPR registers");
51 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg)
52 || !ARM::tGPRRegClass.contains(DestReg))
53 BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
54 .addReg(SrcReg, getKillRegState(KillSrc))
55 .add(predOps(ARMCC::AL));
57 // FIXME: Can also use 'mov hi, $src; mov $dst, hi',
58 // with hi as either r10 or r11.
60 const TargetRegisterInfo *RegInfo = st.getRegisterInfo();
61 if (MBB.computeRegisterLiveness(RegInfo, ARM::CPSR, I)
62 == MachineBasicBlock::LQR_Dead) {
63 BuildMI(MBB, I, DL, get(ARM::tMOVSr), DestReg)
64 .addReg(SrcReg, getKillRegState(KillSrc))
65 ->addRegisterDead(ARM::CPSR, RegInfo);
69 // 'MOV lo, lo' is unpredictable on < v6, so use the stack to do it
70 BuildMI(MBB, I, DL, get(ARM::tPUSH))
71 .add(predOps(ARMCC::AL))
72 .addReg(SrcReg, getKillRegState(KillSrc));
73 BuildMI(MBB, I, DL, get(ARM::tPOP))
74 .add(predOps(ARMCC::AL))
75 .addReg(DestReg, getDefRegState(true));
79 void Thumb1InstrInfo::
80 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
81 unsigned SrcReg, bool isKill, int FI,
82 const TargetRegisterClass *RC,
83 const TargetRegisterInfo *TRI) const {
84 assert((RC == &ARM::tGPRRegClass ||
85 (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
86 isARMLowRegister(SrcReg))) && "Unknown regclass!");
88 if (RC == &ARM::tGPRRegClass ||
89 (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
90 isARMLowRegister(SrcReg))) {
92 if (I != MBB.end()) DL = I->getDebugLoc();
94 MachineFunction &MF = *MBB.getParent();
95 MachineFrameInfo &MFI = MF.getFrameInfo();
96 MachineMemOperand *MMO = MF.getMachineMemOperand(
97 MachinePointerInfo::getFixedStack(MF, FI), MachineMemOperand::MOStore,
98 MFI.getObjectSize(FI), MFI.getObjectAlignment(FI));
99 BuildMI(MBB, I, DL, get(ARM::tSTRspi))
100 .addReg(SrcReg, getKillRegState(isKill))
104 .add(predOps(ARMCC::AL));
108 void Thumb1InstrInfo::
109 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
110 unsigned DestReg, int FI,
111 const TargetRegisterClass *RC,
112 const TargetRegisterInfo *TRI) const {
113 assert((RC == &ARM::tGPRRegClass ||
114 (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
115 isARMLowRegister(DestReg))) && "Unknown regclass!");
117 if (RC == &ARM::tGPRRegClass ||
118 (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
119 isARMLowRegister(DestReg))) {
121 if (I != MBB.end()) DL = I->getDebugLoc();
123 MachineFunction &MF = *MBB.getParent();
124 MachineFrameInfo &MFI = MF.getFrameInfo();
125 MachineMemOperand *MMO = MF.getMachineMemOperand(
126 MachinePointerInfo::getFixedStack(MF, FI), MachineMemOperand::MOLoad,
127 MFI.getObjectSize(FI), MFI.getObjectAlignment(FI));
128 BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg)
132 .add(predOps(ARMCC::AL));
136 void Thumb1InstrInfo::expandLoadStackGuard(
137 MachineBasicBlock::iterator MI) const {
138 MachineFunction &MF = *MI->getParent()->getParent();
139 const TargetMachine &TM = MF.getTarget();
140 if (TM.isPositionIndependent())
141 expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_pcrel, ARM::tLDRi);
143 expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_abs, ARM::tLDRi);