1 //===--- HexagonDepInstrFormats.td ----------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 class Enc_890909 : OpcodeHexagon {
12 let Inst{20-16} = Rs32{4-0};
14 let Inst{4-0} = Rd32{4-0};
16 let Inst{6-5} = Pe4{1-0};
18 class Enc_527412 : OpcodeHexagon {
20 let Inst{17-16} = Ps4{1-0};
22 let Inst{9-8} = Pt4{1-0};
24 let Inst{4-0} = Rd32{4-0};
26 class Enc_efaed8 : OpcodeHexagon {
28 let Inst{8-8} = Ii{0-0};
30 class Enc_a568d4 : OpcodeHexagon {
32 let Inst{12-8} = Rt32{4-0};
34 let Inst{20-16} = Rs32{4-0};
36 let Inst{4-0} = Rx32{4-0};
38 class Enc_27b757 : OpcodeHexagon {
40 let Inst{13-13} = Ii{3-3};
41 let Inst{10-8} = Ii{2-0};
43 let Inst{12-11} = Pv4{1-0};
45 let Inst{20-16} = Rt32{4-0};
47 let Inst{4-0} = Vs32{4-0};
49 class Enc_5de85f : OpcodeHexagon {
51 let Inst{21-20} = Ii{10-9};
52 let Inst{7-1} = Ii{8-2};
54 let Inst{12-8} = Rt32{4-0};
56 let Inst{18-16} = Ns8{2-0};
58 class Enc_0e41fa : OpcodeHexagon {
60 let Inst{12-8} = Vuu32{4-0};
62 let Inst{20-16} = Rt32{4-0};
64 let Inst{4-0} = Vd32{4-0};
66 class Enc_802dc0 : OpcodeHexagon {
68 let Inst{8-8} = Ii{0-0};
70 let Inst{23-22} = Qv4{1-0};
72 class Enc_6b197f : OpcodeHexagon {
74 let Inst{8-5} = Ii{3-0};
76 let Inst{4-0} = Ryy32{4-0};
78 let Inst{20-16} = Rx32{4-0};
80 class Enc_1f5d8f : OpcodeHexagon {
82 let Inst{13-13} = Mu2{0-0};
84 let Inst{4-0} = Ryy32{4-0};
86 let Inst{20-16} = Rx32{4-0};
88 class Enc_51436c : OpcodeHexagon {
90 let Inst{23-22} = Ii{15-14};
91 let Inst{13-0} = Ii{13-0};
93 let Inst{20-16} = Rx32{4-0};
95 class Enc_c7a204 : OpcodeHexagon {
97 let Inst{5-0} = II{5-0};
99 let Inst{12-8} = Rtt32{4-0};
101 let Inst{20-16} = Re32{4-0};
103 class Enc_db40cd : OpcodeHexagon {
105 let Inst{6-3} = Ii{5-2};
107 let Inst{12-8} = Rt32{4-0};
109 let Inst{20-16} = Rx32{4-0};
111 class Enc_a1e29d : OpcodeHexagon {
113 let Inst{12-8} = Ii{4-0};
115 let Inst{22-21} = II{4-3};
116 let Inst{7-5} = II{2-0};
118 let Inst{20-16} = Rs32{4-0};
120 let Inst{4-0} = Rx32{4-0};
122 class Enc_d15d19 : OpcodeHexagon {
124 let Inst{13-13} = Mu2{0-0};
126 let Inst{4-0} = Vs32{4-0};
128 let Inst{20-16} = Rx32{4-0};
130 class Enc_e90a15 : OpcodeHexagon {
132 let Inst{21-20} = Ii{10-9};
133 let Inst{7-1} = Ii{8-2};
135 let Inst{18-16} = Ns8{2-0};
137 let Inst{29-29} = n1{3-3};
138 let Inst{26-25} = n1{2-1};
139 let Inst{22-22} = n1{0-0};
141 class Enc_e0a47a : OpcodeHexagon {
143 let Inst{8-5} = Ii{3-0};
145 let Inst{13-13} = Mu2{0-0};
147 let Inst{4-0} = Rd32{4-0};
149 let Inst{20-16} = Rx32{4-0};
151 class Enc_140c83 : OpcodeHexagon {
153 let Inst{21-21} = Ii{9-9};
154 let Inst{13-5} = Ii{8-0};
156 let Inst{20-16} = Rs32{4-0};
158 let Inst{4-0} = Rd32{4-0};
160 class Enc_7eee72 : OpcodeHexagon {
162 let Inst{13-13} = Mu2{0-0};
164 let Inst{4-0} = Rdd32{4-0};
166 let Inst{20-16} = Rx32{4-0};
168 class Enc_d7dc10 : OpcodeHexagon {
170 let Inst{20-16} = Rs32{4-0};
172 let Inst{12-8} = Rtt32{4-0};
174 let Inst{1-0} = Pd4{1-0};
176 class Enc_736575 : OpcodeHexagon {
178 let Inst{21-20} = Ii{10-9};
179 let Inst{7-1} = Ii{8-2};
181 let Inst{19-16} = Rs16{3-0};
183 let Inst{28-28} = n1{3-3};
184 let Inst{25-23} = n1{2-0};
186 class Enc_8dec2e : OpcodeHexagon {
188 let Inst{12-8} = Ii{4-0};
190 let Inst{20-16} = Rss32{4-0};
192 let Inst{4-0} = Rd32{4-0};
194 class Enc_eaa9f8 : OpcodeHexagon {
196 let Inst{12-8} = Vu32{4-0};
198 let Inst{20-16} = Vv32{4-0};
200 let Inst{1-0} = Qx4{1-0};
202 class Enc_509701 : OpcodeHexagon {
204 let Inst{26-25} = Ii{18-17};
205 let Inst{20-16} = Ii{16-12};
206 let Inst{13-5} = Ii{11-3};
208 let Inst{4-0} = Rdd32{4-0};
210 class Enc_830e5d : OpcodeHexagon {
212 let Inst{12-5} = Ii{7-0};
214 let Inst{22-16} = II{7-1};
215 let Inst{13-13} = II{0-0};
217 let Inst{24-23} = Pu4{1-0};
219 let Inst{4-0} = Rd32{4-0};
221 class Enc_79b8c8 : OpcodeHexagon {
223 let Inst{6-3} = Ii{5-2};
225 let Inst{13-13} = Mu2{0-0};
227 let Inst{12-8} = Rt32{4-0};
229 let Inst{20-16} = Rx32{4-0};
231 class Enc_58a8bf : OpcodeHexagon {
233 let Inst{10-8} = Ii{2-0};
235 let Inst{12-11} = Pv4{1-0};
237 let Inst{4-0} = Vd32{4-0};
239 let Inst{20-16} = Rx32{4-0};
241 class Enc_041d7b : OpcodeHexagon {
243 let Inst{21-20} = Ii{10-9};
244 let Inst{7-1} = Ii{8-2};
246 let Inst{19-16} = Rs16{3-0};
248 let Inst{28-28} = n1{4-4};
249 let Inst{24-23} = n1{3-2};
250 let Inst{13-13} = n1{1-1};
251 let Inst{8-8} = n1{0-0};
253 class Enc_f44229 : OpcodeHexagon {
255 let Inst{13-13} = Ii{6-6};
256 let Inst{7-3} = Ii{5-1};
258 let Inst{1-0} = Pv4{1-0};
260 let Inst{20-16} = Rs32{4-0};
262 let Inst{10-8} = Nt8{2-0};
264 class Enc_aad80c : OpcodeHexagon {
266 let Inst{12-8} = Vuu32{4-0};
268 let Inst{20-16} = Rt32{4-0};
270 let Inst{4-0} = Vdd32{4-0};
272 class Enc_87c142 : OpcodeHexagon {
274 let Inst{8-4} = Ii{6-2};
276 let Inst{3-0} = Rt16{3-0};
278 class Enc_86a14b : OpcodeHexagon {
280 let Inst{7-3} = Ii{7-3};
282 let Inst{2-0} = Rdd8{2-0};
284 class Enc_9a33d5 : OpcodeHexagon {
286 let Inst{6-3} = Ii{6-3};
288 let Inst{1-0} = Pv4{1-0};
290 let Inst{12-8} = Rtt32{4-0};
292 let Inst{20-16} = Rx32{4-0};
294 class Enc_a56825 : OpcodeHexagon {
296 let Inst{20-16} = Rss32{4-0};
298 let Inst{12-8} = Rtt32{4-0};
300 let Inst{4-0} = Rdd32{4-0};
302 class Enc_9ea4cf : OpcodeHexagon {
304 let Inst{13-13} = Ii{1-1};
305 let Inst{6-6} = Ii{0-0};
307 let Inst{5-0} = II{5-0};
309 let Inst{20-16} = Ru32{4-0};
311 let Inst{12-8} = Rt32{4-0};
313 class Enc_ee5ed0 : OpcodeHexagon {
315 let Inst{7-4} = Rs16{3-0};
317 let Inst{3-0} = Rd16{3-0};
319 let Inst{9-8} = n1{1-0};
321 class Enc_935d9b : OpcodeHexagon {
323 let Inst{6-3} = Ii{4-1};
325 let Inst{13-13} = Mu2{0-0};
327 let Inst{12-8} = Rt32{4-0};
329 let Inst{20-16} = Rx32{4-0};
331 class Enc_61f0b0 : OpcodeHexagon {
333 let Inst{20-16} = Rs32{4-0};
335 let Inst{12-8} = Rt32{4-0};
337 let Inst{4-0} = Rxx32{4-0};
339 class Enc_bd6011 : OpcodeHexagon {
341 let Inst{12-8} = Rt32{4-0};
343 let Inst{20-16} = Rs32{4-0};
345 let Inst{4-0} = Rd32{4-0};
347 class Enc_65d691 : OpcodeHexagon {
349 let Inst{17-16} = Ps4{1-0};
351 let Inst{1-0} = Pd4{1-0};
353 class Enc_e8c45e : OpcodeHexagon {
355 let Inst{13-13} = Ii{6-6};
356 let Inst{7-3} = Ii{5-1};
358 let Inst{1-0} = Pv4{1-0};
360 let Inst{20-16} = Rs32{4-0};
362 let Inst{12-8} = Rt32{4-0};
364 class Enc_ca3887 : OpcodeHexagon {
366 let Inst{20-16} = Rs32{4-0};
368 let Inst{12-8} = Rt32{4-0};
370 class Enc_a94f3b : OpcodeHexagon {
372 let Inst{20-16} = Rs32{4-0};
374 let Inst{12-8} = Rt32{4-0};
376 let Inst{4-0} = Rd32{4-0};
378 let Inst{6-5} = Pe4{1-0};
380 class Enc_625deb : OpcodeHexagon {
382 let Inst{10-8} = Ii{3-1};
384 let Inst{7-4} = Rs16{3-0};
386 let Inst{3-0} = Rt16{3-0};
388 class Enc_1f5ba6 : OpcodeHexagon {
390 let Inst{3-0} = Rd16{3-0};
392 class Enc_cd82bc : OpcodeHexagon {
394 let Inst{21-21} = Ii{3-3};
395 let Inst{7-5} = Ii{2-0};
397 let Inst{13-8} = II{5-0};
399 let Inst{20-16} = Rs32{4-0};
401 let Inst{4-0} = Rx32{4-0};
403 class Enc_399e12 : OpcodeHexagon {
405 let Inst{7-4} = Rs16{3-0};
407 let Inst{2-0} = Rdd8{2-0};
409 class Enc_d7a65e : OpcodeHexagon {
411 let Inst{12-7} = Ii{5-0};
413 let Inst{13-13} = II{5-5};
414 let Inst{4-0} = II{4-0};
416 let Inst{6-5} = Pv4{1-0};
418 let Inst{20-16} = Rs32{4-0};
420 class Enc_607661 : OpcodeHexagon {
422 let Inst{12-7} = Ii{5-0};
424 let Inst{4-0} = Rd32{4-0};
426 class Enc_6a5972 : OpcodeHexagon {
428 let Inst{21-20} = Ii{10-9};
429 let Inst{7-1} = Ii{8-2};
431 let Inst{19-16} = Rs16{3-0};
433 let Inst{11-8} = Rt16{3-0};
435 class Enc_53dca9 : OpcodeHexagon {
437 let Inst{11-8} = Ii{5-2};
439 let Inst{7-4} = Rs16{3-0};
441 let Inst{3-0} = Rd16{3-0};
443 class Enc_27fd0e : OpcodeHexagon {
445 let Inst{8-5} = Ii{5-2};
447 let Inst{13-13} = Mu2{0-0};
449 let Inst{4-0} = Rd32{4-0};
451 let Inst{20-16} = Rx32{4-0};
453 class Enc_93af4c : OpcodeHexagon {
455 let Inst{10-4} = Ii{6-0};
457 let Inst{3-0} = Rx16{3-0};
459 class Enc_5bdd42 : OpcodeHexagon {
461 let Inst{8-5} = Ii{6-3};
463 let Inst{4-0} = Rdd32{4-0};
465 let Inst{20-16} = Rx32{4-0};
467 class Enc_71f1b4 : OpcodeHexagon {
469 let Inst{8-5} = Ii{5-2};
471 let Inst{4-0} = Rdd32{4-0};
473 let Inst{20-16} = Rx32{4-0};
475 class Enc_14640c : OpcodeHexagon {
477 let Inst{21-20} = Ii{10-9};
478 let Inst{7-1} = Ii{8-2};
480 let Inst{19-16} = Rs16{3-0};
482 let Inst{28-28} = n1{4-4};
483 let Inst{24-22} = n1{3-1};
484 let Inst{13-13} = n1{0-0};
486 class Enc_31db33 : OpcodeHexagon {
488 let Inst{6-5} = Qt4{1-0};
490 let Inst{12-8} = Vu32{4-0};
492 let Inst{20-16} = Vv32{4-0};
494 let Inst{4-0} = Vd32{4-0};
496 class Enc_65f095 : OpcodeHexagon {
498 let Inst{6-3} = Ii{5-2};
500 let Inst{1-0} = Pv4{1-0};
502 let Inst{10-8} = Nt8{2-0};
504 let Inst{20-16} = Rx32{4-0};
506 class Enc_784502 : OpcodeHexagon {
508 let Inst{10-8} = Ii{2-0};
510 let Inst{12-11} = Pv4{1-0};
512 let Inst{2-0} = Os8{2-0};
514 let Inst{20-16} = Rx32{4-0};
516 class Enc_6413b6 : OpcodeHexagon {
518 let Inst{21-20} = Ii{10-9};
519 let Inst{7-1} = Ii{8-2};
521 let Inst{18-16} = Ns8{2-0};
523 let Inst{29-29} = n1{4-4};
524 let Inst{26-25} = n1{3-2};
525 let Inst{23-23} = n1{1-1};
526 let Inst{13-13} = n1{0-0};
528 class Enc_7a0ea6 : OpcodeHexagon {
530 let Inst{3-0} = Rd16{3-0};
532 let Inst{9-9} = n1{0-0};
534 class Enc_84bff1 : OpcodeHexagon {
536 let Inst{13-13} = Ii{1-1};
537 let Inst{7-7} = Ii{0-0};
539 let Inst{20-16} = Rs32{4-0};
541 let Inst{12-8} = Rt32{4-0};
543 let Inst{4-0} = Rdd32{4-0};
545 class Enc_74aef2 : OpcodeHexagon {
547 let Inst{8-5} = Ii{3-0};
549 let Inst{13-13} = Mu2{0-0};
551 let Inst{4-0} = Ryy32{4-0};
553 let Inst{20-16} = Rx32{4-0};
555 class Enc_78e566 : OpcodeHexagon {
557 let Inst{9-8} = Pt4{1-0};
559 let Inst{4-0} = Rdd32{4-0};
561 class Enc_437f33 : OpcodeHexagon {
563 let Inst{20-16} = Rs32{4-0};
565 let Inst{12-8} = Rt32{4-0};
567 let Inst{6-5} = Pu4{1-0};
569 let Inst{4-0} = Rx32{4-0};
571 class Enc_0527db : OpcodeHexagon {
573 let Inst{7-4} = Rs16{3-0};
575 let Inst{3-0} = Rx16{3-0};
577 class Enc_420cf3 : OpcodeHexagon {
579 let Inst{22-21} = Ii{5-4};
580 let Inst{13-13} = Ii{3-3};
581 let Inst{7-5} = Ii{2-0};
583 let Inst{4-0} = Ru32{4-0};
585 let Inst{20-16} = Rs32{4-0};
587 let Inst{12-8} = Rd32{4-0};
589 class Enc_e39bb2 : OpcodeHexagon {
591 let Inst{9-4} = Ii{5-0};
593 let Inst{3-0} = Rd16{3-0};
595 class Enc_1b64fb : OpcodeHexagon {
597 let Inst{26-25} = Ii{15-14};
598 let Inst{20-16} = Ii{13-9};
599 let Inst{13-13} = Ii{8-8};
600 let Inst{7-0} = Ii{7-0};
602 let Inst{12-8} = Rt32{4-0};
604 class Enc_c6220b : OpcodeHexagon {
606 let Inst{13-13} = Ii{1-1};
607 let Inst{7-7} = Ii{0-0};
609 let Inst{20-16} = Rs32{4-0};
611 let Inst{12-8} = Ru32{4-0};
613 let Inst{2-0} = Nt8{2-0};
615 class Enc_322e1b : OpcodeHexagon {
617 let Inst{22-21} = Ii{5-4};
618 let Inst{13-13} = Ii{3-3};
619 let Inst{7-5} = Ii{2-0};
621 let Inst{23-23} = II{5-5};
622 let Inst{4-0} = II{4-0};
624 let Inst{20-16} = Rs32{4-0};
626 let Inst{12-8} = Rd32{4-0};
628 class Enc_989021 : OpcodeHexagon {
630 let Inst{20-16} = Rt32{4-0};
632 let Inst{12-8} = Vy32{4-0};
634 let Inst{4-0} = Vx32{4-0};
636 class Enc_178717 : OpcodeHexagon {
638 let Inst{21-20} = Ii{10-9};
639 let Inst{7-1} = Ii{8-2};
641 let Inst{19-16} = Rs16{3-0};
643 let Inst{28-28} = n1{5-5};
644 let Inst{25-23} = n1{4-2};
645 let Inst{13-13} = n1{1-1};
646 let Inst{8-8} = n1{0-0};
648 class Enc_78cbf0 : OpcodeHexagon {
650 let Inst{26-25} = Ii{17-16};
651 let Inst{20-16} = Ii{15-11};
652 let Inst{13-13} = Ii{10-10};
653 let Inst{7-0} = Ii{9-2};
655 let Inst{10-8} = Nt8{2-0};
657 class Enc_052c7d : OpcodeHexagon {
659 let Inst{6-3} = Ii{4-1};
661 let Inst{12-8} = Rt32{4-0};
663 let Inst{20-16} = Rx32{4-0};
665 class Enc_fcf7a7 : OpcodeHexagon {
667 let Inst{20-16} = Rss32{4-0};
669 let Inst{12-8} = Rtt32{4-0};
671 let Inst{1-0} = Pd4{1-0};
673 class Enc_55355c : OpcodeHexagon {
675 let Inst{13-13} = Ii{1-1};
676 let Inst{7-7} = Ii{0-0};
678 let Inst{20-16} = Rs32{4-0};
680 let Inst{12-8} = Ru32{4-0};
682 let Inst{4-0} = Rtt32{4-0};
684 class Enc_211aaa : OpcodeHexagon {
686 let Inst{26-25} = Ii{10-9};
687 let Inst{13-5} = Ii{8-0};
689 let Inst{20-16} = Rs32{4-0};
691 let Inst{4-0} = Rd32{4-0};
693 class Enc_6185fe : OpcodeHexagon {
695 let Inst{13-13} = Ii{1-1};
696 let Inst{7-7} = Ii{0-0};
698 let Inst{11-8} = II{5-2};
699 let Inst{6-5} = II{1-0};
701 let Inst{20-16} = Rt32{4-0};
703 let Inst{4-0} = Rdd32{4-0};
705 class Enc_cd4705 : OpcodeHexagon {
707 let Inst{7-5} = Ii{2-0};
709 let Inst{12-8} = Vu32{4-0};
711 let Inst{20-16} = Vv32{4-0};
713 let Inst{4-0} = Vx32{4-0};
715 class Enc_2ebe3b : OpcodeHexagon {
717 let Inst{13-13} = Mu2{0-0};
719 let Inst{4-0} = Vd32{4-0};
721 let Inst{20-16} = Rx32{4-0};
723 class Enc_3d5b28 : OpcodeHexagon {
725 let Inst{20-16} = Rss32{4-0};
727 let Inst{12-8} = Rt32{4-0};
729 let Inst{4-0} = Rd32{4-0};
731 class Enc_5ab2be : OpcodeHexagon {
733 let Inst{20-16} = Rs32{4-0};
735 let Inst{12-8} = Rt32{4-0};
737 let Inst{4-0} = Rd32{4-0};
739 class Enc_fef969 : OpcodeHexagon {
741 let Inst{20-16} = Ii{5-1};
742 let Inst{5-5} = Ii{0-0};
744 let Inst{12-8} = Rt32{4-0};
746 let Inst{4-0} = Rd32{4-0};
748 class Enc_63eaeb : OpcodeHexagon {
750 let Inst{1-0} = Ii{1-0};
752 let Inst{7-4} = Rs16{3-0};
754 class Enc_95441f : OpcodeHexagon {
756 let Inst{12-8} = Vu32{4-0};
758 let Inst{20-16} = Vv32{4-0};
760 let Inst{1-0} = Qd4{1-0};
762 class Enc_372c9d : OpcodeHexagon {
764 let Inst{12-11} = Pv4{1-0};
766 let Inst{13-13} = Mu2{0-0};
768 let Inst{2-0} = Os8{2-0};
770 let Inst{20-16} = Rx32{4-0};
772 class Enc_4dff07 : OpcodeHexagon {
774 let Inst{12-11} = Qv4{1-0};
776 let Inst{13-13} = Mu2{0-0};
778 let Inst{4-0} = Vs32{4-0};
780 let Inst{20-16} = Rx32{4-0};
782 class Enc_04c959 : OpcodeHexagon {
784 let Inst{13-13} = Ii{1-1};
785 let Inst{7-7} = Ii{0-0};
787 let Inst{11-8} = II{5-2};
788 let Inst{6-5} = II{1-0};
790 let Inst{20-16} = Rt32{4-0};
792 let Inst{4-0} = Ryy32{4-0};
794 class Enc_b62ef7 : OpcodeHexagon {
796 let Inst{10-8} = Ii{2-0};
798 let Inst{4-0} = Vs32{4-0};
800 let Inst{20-16} = Rx32{4-0};
802 class Enc_2b518f : OpcodeHexagon {
804 let Inst{27-16} = Ii{31-20};
805 let Inst{13-0} = Ii{19-6};
807 class Enc_b388cf : OpcodeHexagon {
809 let Inst{12-8} = Ii{4-0};
811 let Inst{22-21} = II{4-3};
812 let Inst{7-5} = II{2-0};
814 let Inst{20-16} = Rs32{4-0};
816 let Inst{4-0} = Rd32{4-0};
818 class Enc_ad1c74 : OpcodeHexagon {
820 let Inst{21-20} = Ii{10-9};
821 let Inst{7-1} = Ii{8-2};
823 let Inst{19-16} = Rs16{3-0};
825 class Enc_74d4e5 : OpcodeHexagon {
827 let Inst{13-13} = Mu2{0-0};
829 let Inst{4-0} = Rd32{4-0};
831 let Inst{20-16} = Rx32{4-0};
833 class Enc_c90aca : OpcodeHexagon {
835 let Inst{12-5} = Ii{7-0};
837 let Inst{20-16} = Rs32{4-0};
839 let Inst{4-0} = Rx32{4-0};
841 class Enc_222336 : OpcodeHexagon {
843 let Inst{8-5} = Ii{3-0};
845 let Inst{4-0} = Rd32{4-0};
847 let Inst{20-16} = Rx32{4-0};
849 class Enc_5e87ce : OpcodeHexagon {
851 let Inst{23-22} = Ii{15-14};
852 let Inst{20-16} = Ii{13-9};
853 let Inst{13-5} = Ii{8-0};
855 let Inst{4-0} = Rd32{4-0};
857 class Enc_f7ea77 : OpcodeHexagon {
859 let Inst{21-20} = Ii{10-9};
860 let Inst{7-1} = Ii{8-2};
862 let Inst{18-16} = Ns8{2-0};
864 let Inst{29-29} = n1{3-3};
865 let Inst{26-25} = n1{2-1};
866 let Inst{13-13} = n1{0-0};
868 class Enc_245865 : OpcodeHexagon {
870 let Inst{12-8} = Vu32{4-0};
872 let Inst{23-19} = Vv32{4-0};
874 let Inst{18-16} = Rt8{2-0};
876 let Inst{4-0} = Vx32{4-0};
878 class Enc_88d4d9 : OpcodeHexagon {
880 let Inst{9-8} = Pu4{1-0};
882 let Inst{20-16} = Rs32{4-0};
884 class Enc_c0cdde : OpcodeHexagon {
886 let Inst{13-5} = Ii{8-0};
888 let Inst{20-16} = Rs32{4-0};
890 let Inst{1-0} = Pd4{1-0};
892 class Enc_226535 : OpcodeHexagon {
894 let Inst{12-7} = Ii{7-2};
896 let Inst{20-16} = Rs32{4-0};
898 let Inst{4-0} = Rt32{4-0};
900 class Enc_31aa6a : OpcodeHexagon {
902 let Inst{6-3} = Ii{4-1};
904 let Inst{1-0} = Pv4{1-0};
906 let Inst{10-8} = Nt8{2-0};
908 let Inst{20-16} = Rx32{4-0};
910 class Enc_397f23 : OpcodeHexagon {
912 let Inst{13-13} = Ii{7-7};
913 let Inst{7-3} = Ii{6-2};
915 let Inst{1-0} = Pv4{1-0};
917 let Inst{20-16} = Rs32{4-0};
919 let Inst{12-8} = Rt32{4-0};
921 class Enc_865390 : OpcodeHexagon {
923 let Inst{10-8} = Ii{2-0};
925 let Inst{12-11} = Pv4{1-0};
927 let Inst{4-0} = Vs32{4-0};
929 let Inst{20-16} = Rx32{4-0};
931 class Enc_98c0b8 : OpcodeHexagon {
933 let Inst{13-13} = Ii{1-1};
934 let Inst{7-7} = Ii{0-0};
936 let Inst{6-5} = Pv4{1-0};
938 let Inst{20-16} = Rs32{4-0};
940 let Inst{12-8} = Rt32{4-0};
942 let Inst{4-0} = Rdd32{4-0};
944 class Enc_bfbf03 : OpcodeHexagon {
946 let Inst{9-8} = Qs4{1-0};
948 let Inst{1-0} = Qd4{1-0};
950 class Enc_ecbcc8 : OpcodeHexagon {
952 let Inst{20-16} = Rs32{4-0};
954 class Enc_f5e933 : OpcodeHexagon {
956 let Inst{17-16} = Ps4{1-0};
958 let Inst{4-0} = Rd32{4-0};
960 class Enc_3fc427 : OpcodeHexagon {
962 let Inst{12-8} = Vu32{4-0};
964 let Inst{20-16} = Vv32{4-0};
966 let Inst{4-0} = Vxx32{4-0};
968 class Enc_01d3d0 : OpcodeHexagon {
970 let Inst{12-8} = Vu32{4-0};
972 let Inst{20-16} = Rt32{4-0};
974 let Inst{4-0} = Vdd32{4-0};
976 class Enc_b0e9d8 : OpcodeHexagon {
978 let Inst{21-21} = Ii{9-9};
979 let Inst{13-5} = Ii{8-0};
981 let Inst{20-16} = Rs32{4-0};
983 let Inst{4-0} = Rx32{4-0};
985 class Enc_3694bd : OpcodeHexagon {
987 let Inst{21-20} = Ii{10-9};
988 let Inst{7-1} = Ii{8-2};
990 let Inst{18-16} = Ns8{2-0};
992 let Inst{29-29} = n1{4-4};
993 let Inst{26-25} = n1{3-2};
994 let Inst{23-22} = n1{1-0};
996 class Enc_a42857 : OpcodeHexagon {
998 let Inst{21-20} = Ii{10-9};
999 let Inst{7-1} = Ii{8-2};
1001 let Inst{19-16} = Rs16{3-0};
1003 let Inst{28-28} = n1{4-4};
1004 let Inst{24-22} = n1{3-1};
1005 let Inst{8-8} = n1{0-0};
1007 class Enc_b7fad3 : OpcodeHexagon {
1009 let Inst{9-8} = Pv4{1-0};
1011 let Inst{20-16} = Rs32{4-0};
1013 let Inst{4-0} = Rdd32{4-0};
1015 class Enc_223005 : OpcodeHexagon {
1017 let Inst{6-3} = Ii{5-2};
1019 let Inst{10-8} = Nt8{2-0};
1021 let Inst{20-16} = Rx32{4-0};
1023 class Enc_9e4c3f : OpcodeHexagon {
1025 let Inst{13-8} = II{5-0};
1027 let Inst{21-20} = Ii{10-9};
1028 let Inst{7-1} = Ii{8-2};
1030 let Inst{19-16} = Rd16{3-0};
1032 class Enc_8b8d61 : OpcodeHexagon {
1034 let Inst{22-21} = Ii{5-4};
1035 let Inst{13-13} = Ii{3-3};
1036 let Inst{7-5} = Ii{2-0};
1038 let Inst{20-16} = Rs32{4-0};
1040 let Inst{4-0} = Ru32{4-0};
1042 let Inst{12-8} = Rd32{4-0};
1044 class Enc_88c16c : OpcodeHexagon {
1046 let Inst{20-16} = Rss32{4-0};
1048 let Inst{12-8} = Rtt32{4-0};
1050 let Inst{4-0} = Rxx32{4-0};
1052 class Enc_770858 : OpcodeHexagon {
1054 let Inst{6-5} = Ps4{1-0};
1056 let Inst{12-8} = Vu32{4-0};
1058 let Inst{4-0} = Vd32{4-0};
1060 class Enc_bd811a : OpcodeHexagon {
1062 let Inst{20-16} = Rs32{4-0};
1064 let Inst{4-0} = Cd32{4-0};
1066 class Enc_b05839 : OpcodeHexagon {
1068 let Inst{8-5} = Ii{6-3};
1070 let Inst{13-13} = Mu2{0-0};
1072 let Inst{4-0} = Rdd32{4-0};
1074 let Inst{20-16} = Rx32{4-0};
1076 class Enc_bc03e5 : OpcodeHexagon {
1078 let Inst{26-25} = Ii{16-15};
1079 let Inst{20-16} = Ii{14-10};
1080 let Inst{13-13} = Ii{9-9};
1081 let Inst{7-0} = Ii{8-1};
1083 let Inst{10-8} = Nt8{2-0};
1085 class Enc_412ff0 : OpcodeHexagon {
1087 let Inst{20-16} = Rss32{4-0};
1089 let Inst{4-0} = Ru32{4-0};
1091 let Inst{12-8} = Rxx32{4-0};
1093 class Enc_c9a18e : OpcodeHexagon {
1095 let Inst{21-20} = Ii{10-9};
1096 let Inst{7-1} = Ii{8-2};
1098 let Inst{18-16} = Ns8{2-0};
1100 let Inst{12-8} = Rt32{4-0};
1102 class Enc_be32a5 : OpcodeHexagon {
1104 let Inst{20-16} = Rs32{4-0};
1106 let Inst{12-8} = Rt32{4-0};
1108 let Inst{4-0} = Rdd32{4-0};
1110 class Enc_e6abcf : OpcodeHexagon {
1112 let Inst{20-16} = Rs32{4-0};
1114 let Inst{12-8} = Rtt32{4-0};
1116 class Enc_6339d5 : OpcodeHexagon {
1118 let Inst{13-13} = Ii{1-1};
1119 let Inst{7-7} = Ii{0-0};
1121 let Inst{6-5} = Pv4{1-0};
1123 let Inst{20-16} = Rs32{4-0};
1125 let Inst{12-8} = Ru32{4-0};
1127 let Inst{4-0} = Rt32{4-0};
1129 class Enc_d6990d : OpcodeHexagon {
1131 let Inst{12-8} = Vuu32{4-0};
1133 let Inst{20-16} = Rt32{4-0};
1135 let Inst{4-0} = Vxx32{4-0};
1137 class Enc_6c9440 : OpcodeHexagon {
1139 let Inst{21-21} = Ii{9-9};
1140 let Inst{13-5} = Ii{8-0};
1142 let Inst{4-0} = Rd32{4-0};
1144 class Enc_0d8adb : OpcodeHexagon {
1146 let Inst{12-5} = Ii{7-0};
1148 let Inst{20-16} = Rss32{4-0};
1150 let Inst{1-0} = Pd4{1-0};
1152 class Enc_50e578 : OpcodeHexagon {
1154 let Inst{12-8} = Vu32{4-0};
1156 let Inst{20-16} = Rs32{4-0};
1158 let Inst{4-0} = Rd32{4-0};
1160 class Enc_1cf4ca : OpcodeHexagon {
1162 let Inst{17-16} = Ii{5-4};
1163 let Inst{6-3} = Ii{3-0};
1165 let Inst{1-0} = Pv4{1-0};
1167 let Inst{12-8} = Rt32{4-0};
1169 class Enc_48b75f : OpcodeHexagon {
1171 let Inst{20-16} = Rs32{4-0};
1173 let Inst{1-0} = Pd4{1-0};
1175 class Enc_b97f71 : OpcodeHexagon {
1177 let Inst{8-5} = Ii{5-2};
1179 let Inst{10-9} = Pt4{1-0};
1181 let Inst{4-0} = Rd32{4-0};
1183 let Inst{20-16} = Rx32{4-0};
1185 class Enc_9d1247 : OpcodeHexagon {
1187 let Inst{8-5} = Ii{6-3};
1189 let Inst{10-9} = Pt4{1-0};
1191 let Inst{4-0} = Rdd32{4-0};
1193 let Inst{20-16} = Rx32{4-0};
1195 class Enc_f4413a : OpcodeHexagon {
1197 let Inst{8-5} = Ii{3-0};
1199 let Inst{10-9} = Pt4{1-0};
1201 let Inst{4-0} = Rd32{4-0};
1203 let Inst{20-16} = Rx32{4-0};
1205 class Enc_f7430e : OpcodeHexagon {
1207 let Inst{13-13} = Ii{3-3};
1208 let Inst{10-8} = Ii{2-0};
1210 let Inst{12-11} = Pv4{1-0};
1212 let Inst{20-16} = Rt32{4-0};
1214 let Inst{2-0} = Os8{2-0};
1216 class Enc_e7581c : OpcodeHexagon {
1218 let Inst{12-8} = Vu32{4-0};
1220 let Inst{4-0} = Vd32{4-0};
1222 class Enc_2301d6 : OpcodeHexagon {
1224 let Inst{20-16} = Ii{5-1};
1225 let Inst{8-8} = Ii{0-0};
1227 let Inst{10-9} = Pt4{1-0};
1229 let Inst{4-0} = Rd32{4-0};
1231 class Enc_c31910 : OpcodeHexagon {
1233 let Inst{23-21} = Ii{7-5};
1234 let Inst{13-13} = Ii{4-4};
1235 let Inst{7-5} = Ii{3-1};
1236 let Inst{3-3} = Ii{0-0};
1238 let Inst{12-8} = II{4-0};
1240 let Inst{20-16} = Rx32{4-0};
1242 class Enc_2f2f04 : OpcodeHexagon {
1244 let Inst{5-5} = Ii{0-0};
1246 let Inst{12-8} = Vuu32{4-0};
1248 let Inst{20-16} = Rt32{4-0};
1250 let Inst{4-0} = Vdd32{4-0};
1252 class Enc_8d8a30 : OpcodeHexagon {
1254 let Inst{13-13} = Ii{3-3};
1255 let Inst{10-8} = Ii{2-0};
1257 let Inst{12-11} = Pv4{1-0};
1259 let Inst{20-16} = Rt32{4-0};
1261 let Inst{4-0} = Vd32{4-0};
1263 class Enc_2d7491 : OpcodeHexagon {
1265 let Inst{26-25} = Ii{12-11};
1266 let Inst{13-5} = Ii{10-2};
1268 let Inst{20-16} = Rs32{4-0};
1270 let Inst{4-0} = Rdd32{4-0};
1272 class Enc_a803e0 : OpcodeHexagon {
1274 let Inst{12-7} = Ii{6-1};
1276 let Inst{13-13} = II{7-7};
1277 let Inst{6-0} = II{6-0};
1279 let Inst{20-16} = Rs32{4-0};
1281 class Enc_45364e : OpcodeHexagon {
1283 let Inst{12-8} = Vu32{4-0};
1285 let Inst{20-16} = Vv32{4-0};
1287 let Inst{4-0} = Vd32{4-0};
1289 class Enc_b909d2 : OpcodeHexagon {
1291 let Inst{21-20} = Ii{10-9};
1292 let Inst{7-1} = Ii{8-2};
1294 let Inst{19-16} = Rs16{3-0};
1296 let Inst{28-28} = n1{6-6};
1297 let Inst{25-22} = n1{5-2};
1298 let Inst{13-13} = n1{1-1};
1299 let Inst{8-8} = n1{0-0};
1301 class Enc_e6c957 : OpcodeHexagon {
1303 let Inst{21-21} = Ii{9-9};
1304 let Inst{13-5} = Ii{8-0};
1306 let Inst{4-0} = Rdd32{4-0};
1308 class Enc_fa3ba4 : OpcodeHexagon {
1310 let Inst{26-25} = Ii{13-12};
1311 let Inst{13-5} = Ii{11-3};
1313 let Inst{20-16} = Rs32{4-0};
1315 let Inst{4-0} = Rdd32{4-0};
1317 class Enc_0d8870 : OpcodeHexagon {
1319 let Inst{26-25} = Ii{11-10};
1320 let Inst{13-13} = Ii{9-9};
1321 let Inst{7-0} = Ii{8-1};
1323 let Inst{20-16} = Rs32{4-0};
1325 let Inst{10-8} = Nt8{2-0};
1327 class Enc_9fae8a : OpcodeHexagon {
1329 let Inst{13-8} = Ii{5-0};
1331 let Inst{20-16} = Rs32{4-0};
1333 let Inst{4-0} = Rd32{4-0};
1335 class Enc_18c338 : OpcodeHexagon {
1337 let Inst{12-5} = Ii{7-0};
1339 let Inst{22-16} = II{7-1};
1340 let Inst{13-13} = II{0-0};
1342 let Inst{4-0} = Rdd32{4-0};
1344 class Enc_5ccba9 : OpcodeHexagon {
1346 let Inst{12-7} = Ii{7-2};
1348 let Inst{13-13} = II{5-5};
1349 let Inst{4-0} = II{4-0};
1351 let Inst{6-5} = Pv4{1-0};
1353 let Inst{20-16} = Rs32{4-0};
1355 class Enc_0ed752 : OpcodeHexagon {
1357 let Inst{20-16} = Rss32{4-0};
1359 let Inst{4-0} = Cdd32{4-0};
1361 class Enc_143445 : OpcodeHexagon {
1363 let Inst{26-25} = Ii{12-11};
1364 let Inst{13-13} = Ii{10-10};
1365 let Inst{7-0} = Ii{9-2};
1367 let Inst{20-16} = Rs32{4-0};
1369 let Inst{12-8} = Rt32{4-0};
1371 class Enc_3a3d62 : OpcodeHexagon {
1373 let Inst{20-16} = Rs32{4-0};
1375 let Inst{4-0} = Rdd32{4-0};
1377 class Enc_3e3989 : OpcodeHexagon {
1379 let Inst{21-20} = Ii{10-9};
1380 let Inst{7-1} = Ii{8-2};
1382 let Inst{19-16} = Rs16{3-0};
1384 let Inst{28-28} = n1{5-5};
1385 let Inst{25-22} = n1{4-1};
1386 let Inst{8-8} = n1{0-0};
1388 class Enc_152467 : OpcodeHexagon {
1390 let Inst{8-5} = Ii{4-1};
1392 let Inst{4-0} = Rd32{4-0};
1394 let Inst{20-16} = Rx32{4-0};
1396 class Enc_daea09 : OpcodeHexagon {
1398 let Inst{23-22} = Ii{16-15};
1399 let Inst{20-16} = Ii{14-10};
1400 let Inst{13-13} = Ii{9-9};
1401 let Inst{7-1} = Ii{8-2};
1403 let Inst{9-8} = Pu4{1-0};
1405 class Enc_f37377 : OpcodeHexagon {
1407 let Inst{12-7} = Ii{7-2};
1409 let Inst{13-13} = II{7-7};
1410 let Inst{6-0} = II{6-0};
1412 let Inst{20-16} = Rs32{4-0};
1414 class Enc_a198f6 : OpcodeHexagon {
1416 let Inst{10-5} = Ii{6-1};
1418 let Inst{12-11} = Pt4{1-0};
1420 let Inst{20-16} = Rs32{4-0};
1422 let Inst{4-0} = Rd32{4-0};
1424 class Enc_3dac0b : OpcodeHexagon {
1426 let Inst{6-5} = Qt4{1-0};
1428 let Inst{12-8} = Vu32{4-0};
1430 let Inst{20-16} = Vv32{4-0};
1432 let Inst{4-0} = Vdd32{4-0};
1434 class Enc_e38e1f : OpcodeHexagon {
1436 let Inst{12-5} = Ii{7-0};
1438 let Inst{22-21} = Pu4{1-0};
1440 let Inst{20-16} = Rs32{4-0};
1442 let Inst{4-0} = Rd32{4-0};
1444 class Enc_f8ecf9 : OpcodeHexagon {
1446 let Inst{12-8} = Vuu32{4-0};
1448 let Inst{20-16} = Vvv32{4-0};
1450 let Inst{4-0} = Vdd32{4-0};
1452 class Enc_7f1a05 : OpcodeHexagon {
1454 let Inst{4-0} = Ru32{4-0};
1456 let Inst{20-16} = Rs32{4-0};
1458 let Inst{12-8} = Ry32{4-0};
1460 class Enc_2df31d : OpcodeHexagon {
1462 let Inst{9-4} = Ii{7-2};
1464 let Inst{3-0} = Rd16{3-0};
1466 class Enc_25bef0 : OpcodeHexagon {
1468 let Inst{26-25} = Ii{15-14};
1469 let Inst{20-16} = Ii{13-9};
1470 let Inst{13-5} = Ii{8-0};
1472 let Inst{4-0} = Rd32{4-0};
1474 class Enc_f82302 : OpcodeHexagon {
1476 let Inst{21-20} = Ii{10-9};
1477 let Inst{7-1} = Ii{8-2};
1479 let Inst{18-16} = Ns8{2-0};
1481 let Inst{29-29} = n1{3-3};
1482 let Inst{26-25} = n1{2-1};
1483 let Inst{23-23} = n1{0-0};
1485 class Enc_83ee64 : OpcodeHexagon {
1487 let Inst{12-8} = Ii{4-0};
1489 let Inst{20-16} = Rs32{4-0};
1491 let Inst{1-0} = Pd4{1-0};
1493 class Enc_adf111 : OpcodeHexagon {
1495 let Inst{12-8} = Vu32{4-0};
1497 let Inst{20-16} = Rt32{4-0};
1499 let Inst{1-0} = Qx4{1-0};
1501 class Enc_46c951 : OpcodeHexagon {
1503 let Inst{12-7} = Ii{5-0};
1505 let Inst{4-0} = II{4-0};
1507 let Inst{20-16} = Rs32{4-0};
1509 class Enc_5d6c34 : OpcodeHexagon {
1511 let Inst{13-8} = Ii{5-0};
1513 let Inst{20-16} = Rs32{4-0};
1515 let Inst{1-0} = Pd4{1-0};
1517 class Enc_4df4e9 : OpcodeHexagon {
1519 let Inst{26-25} = Ii{10-9};
1520 let Inst{13-13} = Ii{8-8};
1521 let Inst{7-0} = Ii{7-0};
1523 let Inst{20-16} = Rs32{4-0};
1525 let Inst{10-8} = Nt8{2-0};
1527 class Enc_91b9fe : OpcodeHexagon {
1529 let Inst{6-3} = Ii{4-1};
1531 let Inst{13-13} = Mu2{0-0};
1533 let Inst{10-8} = Nt8{2-0};
1535 let Inst{20-16} = Rx32{4-0};
1537 class Enc_a7b8e8 : OpcodeHexagon {
1539 let Inst{22-21} = Ii{5-4};
1540 let Inst{13-13} = Ii{3-3};
1541 let Inst{7-5} = Ii{2-0};
1543 let Inst{20-16} = Rs32{4-0};
1545 let Inst{12-8} = Rt32{4-0};
1547 let Inst{4-0} = Rd32{4-0};
1549 class Enc_2b3f60 : OpcodeHexagon {
1551 let Inst{20-16} = Rss32{4-0};
1553 let Inst{12-8} = Rtt32{4-0};
1555 let Inst{4-0} = Rdd32{4-0};
1557 let Inst{6-5} = Px4{1-0};
1559 class Enc_bd1cbc : OpcodeHexagon {
1561 let Inst{8-5} = Ii{4-1};
1563 let Inst{4-0} = Ryy32{4-0};
1565 let Inst{20-16} = Rx32{4-0};
1567 class Enc_a30110 : OpcodeHexagon {
1569 let Inst{12-8} = Vu32{4-0};
1571 let Inst{23-19} = Vv32{4-0};
1573 let Inst{18-16} = Rt8{2-0};
1575 let Inst{4-0} = Vd32{4-0};
1577 class Enc_f3f408 : OpcodeHexagon {
1579 let Inst{13-13} = Ii{3-3};
1580 let Inst{10-8} = Ii{2-0};
1582 let Inst{20-16} = Rt32{4-0};
1584 let Inst{4-0} = Vd32{4-0};
1586 class Enc_690862 : OpcodeHexagon {
1588 let Inst{26-25} = Ii{12-11};
1589 let Inst{13-13} = Ii{10-10};
1590 let Inst{7-0} = Ii{9-2};
1592 let Inst{20-16} = Rs32{4-0};
1594 let Inst{10-8} = Nt8{2-0};
1596 class Enc_2a3787 : OpcodeHexagon {
1598 let Inst{26-25} = Ii{12-11};
1599 let Inst{13-5} = Ii{10-2};
1601 let Inst{20-16} = Rs32{4-0};
1603 let Inst{4-0} = Rd32{4-0};
1605 class Enc_d5c73f : OpcodeHexagon {
1607 let Inst{13-13} = Mu2{0-0};
1609 let Inst{12-8} = Rt32{4-0};
1611 let Inst{20-16} = Rx32{4-0};
1613 class Enc_3f97c8 : OpcodeHexagon {
1615 let Inst{6-3} = Ii{5-2};
1617 let Inst{13-13} = Mu2{0-0};
1619 let Inst{10-8} = Nt8{2-0};
1621 let Inst{20-16} = Rx32{4-0};
1623 class Enc_d50cd3 : OpcodeHexagon {
1625 let Inst{7-5} = Ii{2-0};
1627 let Inst{20-16} = Rss32{4-0};
1629 let Inst{12-8} = Rtt32{4-0};
1631 let Inst{4-0} = Rdd32{4-0};
1633 class Enc_729ff7 : OpcodeHexagon {
1635 let Inst{7-5} = Ii{2-0};
1637 let Inst{12-8} = Rtt32{4-0};
1639 let Inst{20-16} = Rss32{4-0};
1641 let Inst{4-0} = Rdd32{4-0};
1643 class Enc_217147 : OpcodeHexagon {
1645 let Inst{23-22} = Qv4{1-0};
1647 class Enc_b9c5fb : OpcodeHexagon {
1649 let Inst{20-16} = Rss32{4-0};
1651 let Inst{4-0} = Rdd32{4-0};
1653 class Enc_f394d3 : OpcodeHexagon {
1655 let Inst{11-8} = II{5-2};
1656 let Inst{6-5} = II{1-0};
1658 let Inst{4-0} = Ryy32{4-0};
1660 let Inst{20-16} = Re32{4-0};
1662 class Enc_0cb018 : OpcodeHexagon {
1664 let Inst{20-16} = Cs32{4-0};
1666 let Inst{4-0} = Rd32{4-0};
1668 class Enc_541f26 : OpcodeHexagon {
1670 let Inst{26-25} = Ii{17-16};
1671 let Inst{20-16} = Ii{15-11};
1672 let Inst{13-13} = Ii{10-10};
1673 let Inst{7-0} = Ii{9-2};
1675 let Inst{12-8} = Rt32{4-0};
1677 class Enc_724154 : OpcodeHexagon {
1679 let Inst{5-0} = II{5-0};
1681 let Inst{10-8} = Nt8{2-0};
1683 let Inst{20-16} = Re32{4-0};
1685 class Enc_179b35 : OpcodeHexagon {
1687 let Inst{20-16} = Rs32{4-0};
1689 let Inst{12-8} = Rtt32{4-0};
1691 let Inst{4-0} = Rx32{4-0};
1693 class Enc_585242 : OpcodeHexagon {
1695 let Inst{13-13} = Ii{5-5};
1696 let Inst{7-3} = Ii{4-0};
1698 let Inst{1-0} = Pv4{1-0};
1700 let Inst{20-16} = Rs32{4-0};
1702 let Inst{10-8} = Nt8{2-0};
1704 class Enc_cf1927 : OpcodeHexagon {
1706 let Inst{13-13} = Mu2{0-0};
1708 let Inst{2-0} = Os8{2-0};
1710 let Inst{20-16} = Rx32{4-0};
1712 class Enc_b84c4c : OpcodeHexagon {
1714 let Inst{13-8} = Ii{5-0};
1716 let Inst{23-21} = II{5-3};
1717 let Inst{7-5} = II{2-0};
1719 let Inst{20-16} = Rss32{4-0};
1721 let Inst{4-0} = Rdd32{4-0};
1723 class Enc_9ac432 : OpcodeHexagon {
1725 let Inst{17-16} = Ps4{1-0};
1727 let Inst{9-8} = Pt4{1-0};
1729 let Inst{7-6} = Pu4{1-0};
1731 let Inst{1-0} = Pd4{1-0};
1733 class Enc_8203bb : OpcodeHexagon {
1735 let Inst{12-7} = Ii{5-0};
1737 let Inst{13-13} = II{7-7};
1738 let Inst{6-0} = II{6-0};
1740 let Inst{20-16} = Rs32{4-0};
1742 class Enc_e66a97 : OpcodeHexagon {
1744 let Inst{12-7} = Ii{6-1};
1746 let Inst{4-0} = II{4-0};
1748 let Inst{20-16} = Rs32{4-0};
1750 class Enc_8c2412 : OpcodeHexagon {
1752 let Inst{6-5} = Ps4{1-0};
1754 let Inst{12-8} = Vu32{4-0};
1756 let Inst{20-16} = Vv32{4-0};
1758 let Inst{4-0} = Vdd32{4-0};
1760 class Enc_284ebb : OpcodeHexagon {
1762 let Inst{17-16} = Ps4{1-0};
1764 let Inst{9-8} = Pt4{1-0};
1766 let Inst{1-0} = Pd4{1-0};
1768 class Enc_733b27 : OpcodeHexagon {
1770 let Inst{8-5} = Ii{4-1};
1772 let Inst{10-9} = Pt4{1-0};
1774 let Inst{4-0} = Rd32{4-0};
1776 let Inst{20-16} = Rx32{4-0};
1778 class Enc_22c845 : OpcodeHexagon {
1780 let Inst{10-0} = Ii{13-3};
1782 let Inst{20-16} = Rx32{4-0};
1784 class Enc_9b0bc1 : OpcodeHexagon {
1786 let Inst{6-5} = Pu4{1-0};
1788 let Inst{12-8} = Rt32{4-0};
1790 let Inst{20-16} = Rs32{4-0};
1792 let Inst{4-0} = Rd32{4-0};
1794 class Enc_ea4c54 : OpcodeHexagon {
1796 let Inst{6-5} = Pu4{1-0};
1798 let Inst{20-16} = Rs32{4-0};
1800 let Inst{12-8} = Rt32{4-0};
1802 let Inst{4-0} = Rd32{4-0};
1804 class Enc_b72622 : OpcodeHexagon {
1806 let Inst{13-13} = Ii{1-1};
1807 let Inst{5-5} = Ii{0-0};
1809 let Inst{20-16} = Rss32{4-0};
1811 let Inst{12-8} = Rt32{4-0};
1813 let Inst{4-0} = Rxx32{4-0};
1815 class Enc_569cfe : OpcodeHexagon {
1817 let Inst{20-16} = Rt32{4-0};
1819 let Inst{4-0} = Vx32{4-0};
1821 class Enc_96ce4f : OpcodeHexagon {
1823 let Inst{6-3} = Ii{3-0};
1825 let Inst{13-13} = Mu2{0-0};
1827 let Inst{10-8} = Nt8{2-0};
1829 let Inst{20-16} = Rx32{4-0};
1831 class Enc_143a3c : OpcodeHexagon {
1833 let Inst{13-8} = Ii{5-0};
1835 let Inst{23-21} = II{5-3};
1836 let Inst{7-5} = II{2-0};
1838 let Inst{20-16} = Rss32{4-0};
1840 let Inst{4-0} = Rxx32{4-0};
1842 class Enc_57a33e : OpcodeHexagon {
1844 let Inst{13-13} = Ii{8-8};
1845 let Inst{7-3} = Ii{7-3};
1847 let Inst{1-0} = Pv4{1-0};
1849 let Inst{20-16} = Rs32{4-0};
1851 let Inst{12-8} = Rtt32{4-0};
1853 class Enc_311abd : OpcodeHexagon {
1855 let Inst{12-8} = Ii{4-0};
1857 let Inst{20-16} = Rs32{4-0};
1859 let Inst{4-0} = Rdd32{4-0};
1861 class Enc_a1640c : OpcodeHexagon {
1863 let Inst{13-8} = Ii{5-0};
1865 let Inst{20-16} = Rss32{4-0};
1867 let Inst{4-0} = Rd32{4-0};
1869 class Enc_de0214 : OpcodeHexagon {
1871 let Inst{26-25} = Ii{11-10};
1872 let Inst{13-5} = Ii{9-1};
1874 let Inst{20-16} = Rs32{4-0};
1876 let Inst{4-0} = Rd32{4-0};
1878 class Enc_a90628 : OpcodeHexagon {
1880 let Inst{23-22} = Qv4{1-0};
1882 let Inst{12-8} = Vu32{4-0};
1884 let Inst{4-0} = Vx32{4-0};
1886 class Enc_fda92c : OpcodeHexagon {
1888 let Inst{26-25} = Ii{16-15};
1889 let Inst{20-16} = Ii{14-10};
1890 let Inst{13-13} = Ii{9-9};
1891 let Inst{7-0} = Ii{8-1};
1893 let Inst{12-8} = Rt32{4-0};
1895 class Enc_831a7d : OpcodeHexagon {
1897 let Inst{20-16} = Rss32{4-0};
1899 let Inst{12-8} = Rtt32{4-0};
1901 let Inst{4-0} = Rxx32{4-0};
1903 let Inst{6-5} = Pe4{1-0};
1905 class Enc_11a146 : OpcodeHexagon {
1907 let Inst{11-8} = Ii{3-0};
1909 let Inst{20-16} = Rss32{4-0};
1911 let Inst{4-0} = Rd32{4-0};
1913 class Enc_b15941 : OpcodeHexagon {
1915 let Inst{6-3} = Ii{3-0};
1917 let Inst{13-13} = Mu2{0-0};
1919 let Inst{12-8} = Rt32{4-0};
1921 let Inst{20-16} = Rx32{4-0};
1923 class Enc_b78edd : OpcodeHexagon {
1925 let Inst{21-20} = Ii{10-9};
1926 let Inst{7-1} = Ii{8-2};
1928 let Inst{19-16} = Rs16{3-0};
1930 let Inst{28-28} = n1{3-3};
1931 let Inst{24-23} = n1{2-1};
1932 let Inst{8-8} = n1{0-0};
1934 class Enc_a27588 : OpcodeHexagon {
1936 let Inst{26-25} = Ii{10-9};
1937 let Inst{13-5} = Ii{8-0};
1939 let Inst{20-16} = Rs32{4-0};
1941 let Inst{4-0} = Ryy32{4-0};
1943 class Enc_2a7b91 : OpcodeHexagon {
1945 let Inst{20-16} = Ii{5-1};
1946 let Inst{8-8} = Ii{0-0};
1948 let Inst{10-9} = Pt4{1-0};
1950 let Inst{4-0} = Rdd32{4-0};
1952 class Enc_b43b67 : OpcodeHexagon {
1954 let Inst{12-8} = Vu32{4-0};
1956 let Inst{20-16} = Vv32{4-0};
1958 let Inst{4-0} = Vd32{4-0};
1960 let Inst{6-5} = Qx4{1-0};
1962 class Enc_4aca3a : OpcodeHexagon {
1964 let Inst{21-20} = Ii{10-9};
1965 let Inst{7-1} = Ii{8-2};
1967 let Inst{18-16} = Ns8{2-0};
1969 let Inst{29-29} = n1{2-2};
1970 let Inst{26-25} = n1{1-0};
1972 class Enc_b38ffc : OpcodeHexagon {
1974 let Inst{11-8} = Ii{3-0};
1976 let Inst{7-4} = Rs16{3-0};
1978 let Inst{3-0} = Rt16{3-0};
1980 class Enc_cda00a : OpcodeHexagon {
1982 let Inst{19-16} = Ii{11-8};
1983 let Inst{12-5} = Ii{7-0};
1985 let Inst{22-21} = Pu4{1-0};
1987 let Inst{4-0} = Rd32{4-0};
1989 class Enc_2fbf3c : OpcodeHexagon {
1991 let Inst{10-8} = Ii{2-0};
1993 let Inst{7-4} = Rs16{3-0};
1995 let Inst{3-0} = Rd16{3-0};
1997 class Enc_70b24b : OpcodeHexagon {
1999 let Inst{8-5} = Ii{5-2};
2001 let Inst{13-13} = Mu2{0-0};
2003 let Inst{4-0} = Rdd32{4-0};
2005 let Inst{20-16} = Rx32{4-0};
2007 class Enc_2ae154 : OpcodeHexagon {
2009 let Inst{20-16} = Rs32{4-0};
2011 let Inst{12-8} = Rt32{4-0};
2013 let Inst{4-0} = Rx32{4-0};
2015 class Enc_50b5ac : OpcodeHexagon {
2017 let Inst{17-16} = Ii{5-4};
2018 let Inst{6-3} = Ii{3-0};
2020 let Inst{1-0} = Pv4{1-0};
2022 let Inst{12-8} = Rtt32{4-0};
2024 class Enc_2ea740 : OpcodeHexagon {
2026 let Inst{13-13} = Ii{3-3};
2027 let Inst{10-8} = Ii{2-0};
2029 let Inst{12-11} = Qv4{1-0};
2031 let Inst{20-16} = Rt32{4-0};
2033 let Inst{4-0} = Vs32{4-0};
2035 class Enc_08d755 : OpcodeHexagon {
2037 let Inst{12-5} = Ii{7-0};
2039 let Inst{20-16} = Rs32{4-0};
2041 let Inst{1-0} = Pd4{1-0};
2043 class Enc_1178da : OpcodeHexagon {
2045 let Inst{7-5} = Ii{2-0};
2047 let Inst{12-8} = Vu32{4-0};
2049 let Inst{20-16} = Vv32{4-0};
2051 let Inst{4-0} = Vxx32{4-0};
2053 class Enc_8dbe85 : OpcodeHexagon {
2055 let Inst{13-13} = Mu2{0-0};
2057 let Inst{10-8} = Nt8{2-0};
2059 let Inst{20-16} = Rx32{4-0};
2061 class Enc_5a18b3 : OpcodeHexagon {
2063 let Inst{21-20} = Ii{10-9};
2064 let Inst{7-1} = Ii{8-2};
2066 let Inst{18-16} = Ns8{2-0};
2068 let Inst{29-29} = n1{4-4};
2069 let Inst{26-25} = n1{3-2};
2070 let Inst{22-22} = n1{1-1};
2071 let Inst{13-13} = n1{0-0};
2073 class Enc_14d27a : OpcodeHexagon {
2075 let Inst{12-8} = II{4-0};
2077 let Inst{21-20} = Ii{10-9};
2078 let Inst{7-1} = Ii{8-2};
2080 let Inst{19-16} = Rs16{3-0};
2082 class Enc_a05677 : OpcodeHexagon {
2084 let Inst{12-8} = Ii{4-0};
2086 let Inst{20-16} = Rs32{4-0};
2088 let Inst{4-0} = Rd32{4-0};
2090 class Enc_f0cca7 : OpcodeHexagon {
2092 let Inst{12-5} = Ii{7-0};
2094 let Inst{20-16} = II{5-1};
2095 let Inst{13-13} = II{0-0};
2097 let Inst{4-0} = Rdd32{4-0};
2099 class Enc_500cb0 : OpcodeHexagon {
2101 let Inst{12-8} = Vu32{4-0};
2103 let Inst{4-0} = Vxx32{4-0};
2105 class Enc_7e5a82 : OpcodeHexagon {
2107 let Inst{12-8} = Ii{4-0};
2109 let Inst{20-16} = Rss32{4-0};
2111 let Inst{4-0} = Rdd32{4-0};
2113 class Enc_12b6e9 : OpcodeHexagon {
2115 let Inst{11-8} = Ii{3-0};
2117 let Inst{20-16} = Rss32{4-0};
2119 let Inst{4-0} = Rdd32{4-0};
2121 class Enc_6f70ca : OpcodeHexagon {
2123 let Inst{8-4} = Ii{7-3};
2125 class Enc_7222b7 : OpcodeHexagon {
2127 let Inst{20-16} = Rt32{4-0};
2129 let Inst{1-0} = Qd4{1-0};
2131 class Enc_e3b0c4 : OpcodeHexagon {
2133 class Enc_a255dc : OpcodeHexagon {
2135 let Inst{10-8} = Ii{2-0};
2137 let Inst{4-0} = Vd32{4-0};
2139 let Inst{20-16} = Rx32{4-0};
2141 class Enc_cb4b4e : OpcodeHexagon {
2143 let Inst{6-5} = Pu4{1-0};
2145 let Inst{20-16} = Rs32{4-0};
2147 let Inst{12-8} = Rt32{4-0};
2149 let Inst{4-0} = Rdd32{4-0};
2151 class Enc_9cdba7 : OpcodeHexagon {
2153 let Inst{12-5} = Ii{7-0};
2155 let Inst{20-16} = Rs32{4-0};
2157 let Inst{4-0} = Rdd32{4-0};
2159 class Enc_5cd7e9 : OpcodeHexagon {
2161 let Inst{26-25} = Ii{11-10};
2162 let Inst{13-5} = Ii{9-1};
2164 let Inst{20-16} = Rs32{4-0};
2166 let Inst{4-0} = Ryy32{4-0};
2168 class Enc_454a26 : OpcodeHexagon {
2170 let Inst{9-8} = Pt4{1-0};
2172 let Inst{17-16} = Ps4{1-0};
2174 let Inst{1-0} = Pd4{1-0};
2176 class Enc_a6853f : OpcodeHexagon {
2178 let Inst{21-20} = Ii{10-9};
2179 let Inst{7-1} = Ii{8-2};
2181 let Inst{18-16} = Ns8{2-0};
2183 let Inst{29-29} = n1{5-5};
2184 let Inst{26-25} = n1{4-3};
2185 let Inst{23-22} = n1{2-1};
2186 let Inst{13-13} = n1{0-0};
2188 class Enc_c175d0 : OpcodeHexagon {
2190 let Inst{11-8} = Ii{3-0};
2192 let Inst{7-4} = Rs16{3-0};
2194 let Inst{3-0} = Rd16{3-0};
2196 class Enc_895bd9 : OpcodeHexagon {
2198 let Inst{9-8} = Qu4{1-0};
2200 let Inst{20-16} = Rt32{4-0};
2202 let Inst{4-0} = Vx32{4-0};
2204 class Enc_ea23e4 : OpcodeHexagon {
2206 let Inst{12-8} = Rtt32{4-0};
2208 let Inst{20-16} = Rss32{4-0};
2210 let Inst{4-0} = Rdd32{4-0};
2212 class Enc_4dc228 : OpcodeHexagon {
2214 let Inst{12-8} = Ii{8-4};
2215 let Inst{4-3} = Ii{3-2};
2217 let Inst{20-16} = II{9-5};
2218 let Inst{7-5} = II{4-2};
2219 let Inst{1-0} = II{1-0};
2221 class Enc_10bc21 : OpcodeHexagon {
2223 let Inst{6-3} = Ii{3-0};
2225 let Inst{12-8} = Rt32{4-0};
2227 let Inst{20-16} = Rx32{4-0};
2229 class Enc_1aaec1 : OpcodeHexagon {
2231 let Inst{10-8} = Ii{2-0};
2233 let Inst{2-0} = Os8{2-0};
2235 let Inst{20-16} = Rx32{4-0};
2237 class Enc_329361 : OpcodeHexagon {
2239 let Inst{6-5} = Pu4{1-0};
2241 let Inst{20-16} = Rss32{4-0};
2243 let Inst{12-8} = Rtt32{4-0};
2245 let Inst{4-0} = Rdd32{4-0};
2247 class Enc_d2c7f1 : OpcodeHexagon {
2249 let Inst{12-8} = Rtt32{4-0};
2251 let Inst{20-16} = Rss32{4-0};
2253 let Inst{4-0} = Rdd32{4-0};
2255 let Inst{6-5} = Pe4{1-0};
2257 class Enc_3680c2 : OpcodeHexagon {
2259 let Inst{11-5} = Ii{6-0};
2261 let Inst{20-16} = Rss32{4-0};
2263 let Inst{1-0} = Pd4{1-0};
2265 class Enc_1ef990 : OpcodeHexagon {
2267 let Inst{12-11} = Pv4{1-0};
2269 let Inst{13-13} = Mu2{0-0};
2271 let Inst{4-0} = Vs32{4-0};
2273 let Inst{20-16} = Rx32{4-0};
2275 class Enc_e957fb : OpcodeHexagon {
2277 let Inst{26-25} = Ii{11-10};
2278 let Inst{13-13} = Ii{9-9};
2279 let Inst{7-0} = Ii{8-1};
2281 let Inst{20-16} = Rs32{4-0};
2283 let Inst{12-8} = Rt32{4-0};
2285 class Enc_c9e3bc : OpcodeHexagon {
2287 let Inst{13-13} = Ii{3-3};
2288 let Inst{10-8} = Ii{2-0};
2290 let Inst{20-16} = Rt32{4-0};
2292 let Inst{4-0} = Vs32{4-0};
2294 class Enc_2e1979 : OpcodeHexagon {
2296 let Inst{13-13} = Ii{1-1};
2297 let Inst{7-7} = Ii{0-0};
2299 let Inst{6-5} = Pv4{1-0};
2301 let Inst{20-16} = Rs32{4-0};
2303 let Inst{12-8} = Rt32{4-0};
2305 let Inst{4-0} = Rd32{4-0};
2307 class Enc_0b2e5b : OpcodeHexagon {
2309 let Inst{7-5} = Ii{2-0};
2311 let Inst{12-8} = Vu32{4-0};
2313 let Inst{20-16} = Vv32{4-0};
2315 let Inst{4-0} = Vd32{4-0};
2317 class Enc_d483b9 : OpcodeHexagon {
2319 let Inst{5-5} = Ii{0-0};
2321 let Inst{12-8} = Vuu32{4-0};
2323 let Inst{20-16} = Rt32{4-0};
2325 let Inst{4-0} = Vxx32{4-0};
2327 class Enc_51635c : OpcodeHexagon {
2329 let Inst{8-4} = Ii{6-2};
2331 let Inst{3-0} = Rd16{3-0};
2333 class Enc_e26546 : OpcodeHexagon {
2335 let Inst{6-3} = Ii{4-1};
2337 let Inst{10-8} = Nt8{2-0};
2339 let Inst{20-16} = Rx32{4-0};
2341 class Enc_70fb07 : OpcodeHexagon {
2343 let Inst{13-8} = Ii{5-0};
2345 let Inst{20-16} = Rss32{4-0};
2347 let Inst{4-0} = Rxx32{4-0};
2349 class Enc_277737 : OpcodeHexagon {
2351 let Inst{22-21} = Ii{7-6};
2352 let Inst{13-13} = Ii{5-5};
2353 let Inst{7-5} = Ii{4-2};
2355 let Inst{4-0} = Ru32{4-0};
2357 let Inst{20-16} = Rs32{4-0};
2359 let Inst{12-8} = Rd32{4-0};
2361 class Enc_5c124a : OpcodeHexagon {
2363 let Inst{26-25} = Ii{18-17};
2364 let Inst{20-16} = Ii{16-12};
2365 let Inst{13-13} = Ii{11-11};
2366 let Inst{7-0} = Ii{10-3};
2368 let Inst{12-8} = Rtt32{4-0};
2370 class Enc_928ca1 : OpcodeHexagon {
2372 let Inst{13-13} = Mu2{0-0};
2374 let Inst{12-8} = Rtt32{4-0};
2376 let Inst{20-16} = Rx32{4-0};
2378 class Enc_da664b : OpcodeHexagon {
2380 let Inst{13-13} = Ii{1-1};
2381 let Inst{7-7} = Ii{0-0};
2383 let Inst{20-16} = Rs32{4-0};
2385 let Inst{12-8} = Rt32{4-0};
2387 let Inst{4-0} = Rd32{4-0};
2389 class Enc_7b7ba8 : OpcodeHexagon {
2391 let Inst{9-8} = Qu4{1-0};
2393 let Inst{20-16} = Rt32{4-0};
2395 let Inst{4-0} = Vd32{4-0};
2397 class Enc_47ee5e : OpcodeHexagon {
2399 let Inst{13-13} = Ii{1-1};
2400 let Inst{7-7} = Ii{0-0};
2402 let Inst{6-5} = Pv4{1-0};
2404 let Inst{20-16} = Rs32{4-0};
2406 let Inst{12-8} = Ru32{4-0};
2408 let Inst{2-0} = Nt8{2-0};
2410 class Enc_8bcba4 : OpcodeHexagon {
2412 let Inst{5-0} = II{5-0};
2414 let Inst{12-8} = Rt32{4-0};
2416 let Inst{20-16} = Re32{4-0};
2418 class Enc_3a2484 : OpcodeHexagon {
2420 let Inst{21-20} = Ii{10-9};
2421 let Inst{7-1} = Ii{8-2};
2423 let Inst{19-16} = Rs16{3-0};
2425 let Inst{28-28} = n1{3-3};
2426 let Inst{24-23} = n1{2-1};
2427 let Inst{13-13} = n1{0-0};
2429 class Enc_a5ed8a : OpcodeHexagon {
2431 let Inst{20-16} = Rt32{4-0};
2433 let Inst{4-0} = Vd32{4-0};
2435 class Enc_cb9321 : OpcodeHexagon {
2437 let Inst{27-21} = Ii{15-9};
2438 let Inst{13-5} = Ii{8-0};
2440 let Inst{20-16} = Rs32{4-0};
2442 let Inst{4-0} = Rd32{4-0};
2444 class Enc_668704 : OpcodeHexagon {
2446 let Inst{21-20} = Ii{10-9};
2447 let Inst{7-1} = Ii{8-2};
2449 let Inst{19-16} = Rs16{3-0};
2451 let Inst{28-28} = n1{4-4};
2452 let Inst{25-22} = n1{3-0};
2454 class Enc_a7341a : OpcodeHexagon {
2456 let Inst{12-8} = Vu32{4-0};
2458 let Inst{20-16} = Vv32{4-0};
2460 let Inst{4-0} = Vx32{4-0};
2462 class Enc_5eac98 : OpcodeHexagon {
2464 let Inst{13-8} = Ii{5-0};
2466 let Inst{20-16} = Rss32{4-0};
2468 let Inst{4-0} = Rdd32{4-0};
2470 class Enc_02553a : OpcodeHexagon {
2472 let Inst{11-5} = Ii{6-0};
2474 let Inst{20-16} = Rs32{4-0};
2476 let Inst{1-0} = Pd4{1-0};
2478 class Enc_acd6ed : OpcodeHexagon {
2480 let Inst{10-5} = Ii{8-3};
2482 let Inst{12-11} = Pt4{1-0};
2484 let Inst{20-16} = Rs32{4-0};
2486 let Inst{4-0} = Rdd32{4-0};
2488 class Enc_8e583a : OpcodeHexagon {
2490 let Inst{21-20} = Ii{10-9};
2491 let Inst{7-1} = Ii{8-2};
2493 let Inst{19-16} = Rs16{3-0};
2495 let Inst{28-28} = n1{4-4};
2496 let Inst{25-23} = n1{3-1};
2497 let Inst{13-13} = n1{0-0};
2499 class Enc_b886fd : OpcodeHexagon {
2501 let Inst{6-3} = Ii{4-1};
2503 let Inst{1-0} = Pv4{1-0};
2505 let Inst{12-8} = Rt32{4-0};
2507 let Inst{20-16} = Rx32{4-0};
2509 class Enc_24a7dc : OpcodeHexagon {
2511 let Inst{12-8} = Vu32{4-0};
2513 let Inst{23-19} = Vv32{4-0};
2515 let Inst{18-16} = Rt8{2-0};
2517 let Inst{4-0} = Vdd32{4-0};
2519 class Enc_2d829e : OpcodeHexagon {
2521 let Inst{10-0} = Ii{13-3};
2523 let Inst{20-16} = Rs32{4-0};
2525 class Enc_4f4ed7 : OpcodeHexagon {
2527 let Inst{26-25} = Ii{17-16};
2528 let Inst{20-16} = Ii{15-11};
2529 let Inst{13-5} = Ii{10-2};
2531 let Inst{4-0} = Rd32{4-0};
2533 class Enc_84b2cd : OpcodeHexagon {
2535 let Inst{12-7} = Ii{7-2};
2537 let Inst{4-0} = II{4-0};
2539 let Inst{20-16} = Rs32{4-0};
2541 class Enc_8dbdfe : OpcodeHexagon {
2543 let Inst{13-13} = Ii{7-7};
2544 let Inst{7-3} = Ii{6-2};
2546 let Inst{1-0} = Pv4{1-0};
2548 let Inst{20-16} = Rs32{4-0};
2550 let Inst{10-8} = Nt8{2-0};
2552 class Enc_90cd8b : OpcodeHexagon {
2554 let Inst{20-16} = Rss32{4-0};
2556 let Inst{4-0} = Rd32{4-0};
2558 class Enc_bd0b33 : OpcodeHexagon {
2560 let Inst{21-21} = Ii{9-9};
2561 let Inst{13-5} = Ii{8-0};
2563 let Inst{20-16} = Rs32{4-0};
2565 let Inst{1-0} = Pd4{1-0};
2567 class Enc_c7cd90 : OpcodeHexagon {
2569 let Inst{6-3} = Ii{3-0};
2571 let Inst{10-8} = Nt8{2-0};
2573 let Inst{20-16} = Rx32{4-0};
2575 class Enc_405228 : OpcodeHexagon {
2577 let Inst{21-20} = Ii{10-9};
2578 let Inst{7-1} = Ii{8-2};
2580 let Inst{19-16} = Rs16{3-0};
2582 let Inst{28-28} = n1{2-2};
2583 let Inst{24-23} = n1{1-0};
2585 class Enc_81ac1d : OpcodeHexagon {
2587 let Inst{24-16} = Ii{23-15};
2588 let Inst{13-1} = Ii{14-2};
2590 class Enc_395cc4 : OpcodeHexagon {
2592 let Inst{6-3} = Ii{6-3};
2594 let Inst{13-13} = Mu2{0-0};
2596 let Inst{12-8} = Rtt32{4-0};
2598 let Inst{20-16} = Rx32{4-0};
2600 class Enc_a51a9a : OpcodeHexagon {
2602 let Inst{12-8} = Ii{7-3};
2603 let Inst{4-2} = Ii{2-0};
2605 class Enc_d44e31 : OpcodeHexagon {
2607 let Inst{12-7} = Ii{5-0};
2609 let Inst{20-16} = Rs32{4-0};
2611 let Inst{4-0} = Rt32{4-0};
2613 class Enc_f77fbc : OpcodeHexagon {
2615 let Inst{13-13} = Ii{3-3};
2616 let Inst{10-8} = Ii{2-0};
2618 let Inst{20-16} = Rt32{4-0};
2620 let Inst{2-0} = Os8{2-0};
2622 class Enc_d2216a : OpcodeHexagon {
2624 let Inst{20-16} = Rss32{4-0};
2626 let Inst{12-8} = Rtt32{4-0};
2628 let Inst{4-0} = Rd32{4-0};
2630 class Enc_85bf58 : OpcodeHexagon {
2632 let Inst{6-3} = Ii{6-3};
2634 let Inst{12-8} = Rtt32{4-0};
2636 let Inst{20-16} = Rx32{4-0};
2638 class Enc_71bb9b : OpcodeHexagon {
2640 let Inst{12-8} = Vu32{4-0};
2642 let Inst{20-16} = Vv32{4-0};
2644 let Inst{4-0} = Vdd32{4-0};
2646 class Enc_52a5dd : OpcodeHexagon {
2648 let Inst{6-3} = Ii{3-0};
2650 let Inst{1-0} = Pv4{1-0};
2652 let Inst{10-8} = Nt8{2-0};
2654 let Inst{20-16} = Rx32{4-0};
2656 class Enc_5e2823 : OpcodeHexagon {
2658 let Inst{20-16} = Rs32{4-0};
2660 let Inst{4-0} = Rd32{4-0};
2662 class Enc_28a2dc : OpcodeHexagon {
2664 let Inst{12-8} = Ii{4-0};
2666 let Inst{20-16} = Rs32{4-0};
2668 let Inst{4-0} = Rx32{4-0};
2670 class Enc_5138b3 : OpcodeHexagon {
2672 let Inst{12-8} = Vu32{4-0};
2674 let Inst{20-16} = Rt32{4-0};
2676 let Inst{4-0} = Vx32{4-0};
2678 class Enc_84d359 : OpcodeHexagon {
2680 let Inst{3-0} = Ii{3-0};
2682 let Inst{7-4} = Rs16{3-0};
2684 class Enc_e07374 : OpcodeHexagon {
2686 let Inst{20-16} = Rs32{4-0};
2688 let Inst{12-8} = Rtt32{4-0};
2690 let Inst{4-0} = Rd32{4-0};
2692 class Enc_323f2d : OpcodeHexagon {
2694 let Inst{11-8} = II{5-2};
2695 let Inst{6-5} = II{1-0};
2697 let Inst{4-0} = Rd32{4-0};
2699 let Inst{20-16} = Re32{4-0};
2701 class Enc_1a9974 : OpcodeHexagon {
2703 let Inst{13-13} = Ii{1-1};
2704 let Inst{7-7} = Ii{0-0};
2706 let Inst{6-5} = Pv4{1-0};
2708 let Inst{20-16} = Rs32{4-0};
2710 let Inst{12-8} = Ru32{4-0};
2712 let Inst{4-0} = Rtt32{4-0};
2714 class Enc_1de724 : OpcodeHexagon {
2716 let Inst{21-20} = Ii{10-9};
2717 let Inst{7-1} = Ii{8-2};
2719 let Inst{19-16} = Rs16{3-0};
2721 let Inst{28-28} = n1{3-3};
2722 let Inst{24-22} = n1{2-0};
2724 class Enc_dd766a : OpcodeHexagon {
2726 let Inst{12-8} = Vu32{4-0};
2728 let Inst{4-0} = Vdd32{4-0};
2730 class Enc_0b51ce : OpcodeHexagon {
2732 let Inst{10-8} = Ii{2-0};
2734 let Inst{12-11} = Qv4{1-0};
2736 let Inst{4-0} = Vs32{4-0};
2738 let Inst{20-16} = Rx32{4-0};
2740 class Enc_b4e6cf : OpcodeHexagon {
2742 let Inst{21-21} = Ii{9-9};
2743 let Inst{13-5} = Ii{8-0};
2745 let Inst{4-0} = Ru32{4-0};
2747 let Inst{20-16} = Rx32{4-0};
2749 class Enc_44215c : OpcodeHexagon {
2751 let Inst{17-16} = Ii{5-4};
2752 let Inst{6-3} = Ii{3-0};
2754 let Inst{1-0} = Pv4{1-0};
2756 let Inst{10-8} = Nt8{2-0};
2758 class Enc_a21d47 : OpcodeHexagon {
2760 let Inst{10-5} = Ii{5-0};
2762 let Inst{12-11} = Pt4{1-0};
2764 let Inst{20-16} = Rs32{4-0};
2766 let Inst{4-0} = Rd32{4-0};
2768 class Enc_cc449f : OpcodeHexagon {
2770 let Inst{6-3} = Ii{3-0};
2772 let Inst{1-0} = Pv4{1-0};
2774 let Inst{12-8} = Rt32{4-0};
2776 let Inst{20-16} = Rx32{4-0};
2778 class Enc_645d54 : OpcodeHexagon {
2780 let Inst{13-13} = Ii{1-1};
2781 let Inst{5-5} = Ii{0-0};
2783 let Inst{20-16} = Rss32{4-0};
2785 let Inst{12-8} = Rt32{4-0};
2787 let Inst{4-0} = Rdd32{4-0};
2789 class Enc_667b39 : OpcodeHexagon {
2791 let Inst{20-16} = Css32{4-0};
2793 let Inst{4-0} = Rdd32{4-0};
2795 class Enc_927852 : OpcodeHexagon {
2797 let Inst{20-16} = Rss32{4-0};
2799 let Inst{12-8} = Rt32{4-0};
2801 let Inst{4-0} = Rdd32{4-0};
2803 class Enc_163a3c : OpcodeHexagon {
2805 let Inst{12-7} = Ii{6-1};
2807 let Inst{20-16} = Rs32{4-0};
2809 let Inst{4-0} = Rt32{4-0};
2811 class Enc_b087ac : OpcodeHexagon {
2813 let Inst{12-8} = Vu32{4-0};
2815 let Inst{20-16} = Rt32{4-0};
2817 let Inst{4-0} = Vd32{4-0};
2819 class Enc_b1e1fb : OpcodeHexagon {
2821 let Inst{21-20} = Ii{10-9};
2822 let Inst{7-1} = Ii{8-2};
2824 let Inst{19-16} = Rs16{3-0};
2826 let Inst{28-28} = n1{4-4};
2827 let Inst{25-23} = n1{3-1};
2828 let Inst{8-8} = n1{0-0};
2830 class Enc_1f19b5 : OpcodeHexagon {
2832 let Inst{9-5} = Ii{4-0};
2834 let Inst{20-16} = Rss32{4-0};
2836 let Inst{1-0} = Pd4{1-0};
2838 class Enc_b8c967 : OpcodeHexagon {
2840 let Inst{12-5} = Ii{7-0};
2842 let Inst{20-16} = Rs32{4-0};
2844 let Inst{4-0} = Rd32{4-0};
2846 class Enc_fb6577 : OpcodeHexagon {
2848 let Inst{9-8} = Pu4{1-0};
2850 let Inst{20-16} = Rs32{4-0};
2852 let Inst{4-0} = Rd32{4-0};
2854 class Enc_2bae10 : OpcodeHexagon {
2856 let Inst{10-8} = Ii{3-1};
2858 let Inst{7-4} = Rs16{3-0};
2860 let Inst{3-0} = Rd16{3-0};
2862 class Enc_c4dc92 : OpcodeHexagon {
2864 let Inst{23-22} = Qv4{1-0};
2866 let Inst{12-8} = Vu32{4-0};
2868 let Inst{4-0} = Vd32{4-0};
2870 class Enc_03833b : OpcodeHexagon {
2872 let Inst{20-16} = Rss32{4-0};
2874 let Inst{12-8} = Rt32{4-0};
2876 let Inst{1-0} = Pd4{1-0};
2878 class Enc_dbd70c : OpcodeHexagon {
2880 let Inst{20-16} = Rss32{4-0};
2882 let Inst{12-8} = Rtt32{4-0};
2884 let Inst{6-5} = Pu4{1-0};
2886 let Inst{4-0} = Rdd32{4-0};
2888 class Enc_f6fe0b : OpcodeHexagon {
2890 let Inst{21-20} = Ii{10-9};
2891 let Inst{7-1} = Ii{8-2};
2893 let Inst{19-16} = Rs16{3-0};
2895 let Inst{28-28} = n1{5-5};
2896 let Inst{24-22} = n1{4-2};
2897 let Inst{13-13} = n1{1-1};
2898 let Inst{8-8} = n1{0-0};
2900 class Enc_9e2e1c : OpcodeHexagon {
2902 let Inst{8-5} = Ii{4-1};
2904 let Inst{13-13} = Mu2{0-0};
2906 let Inst{4-0} = Ryy32{4-0};
2908 let Inst{20-16} = Rx32{4-0};
2910 class Enc_8df4be : OpcodeHexagon {
2912 let Inst{26-25} = Ii{16-15};
2913 let Inst{20-16} = Ii{14-10};
2914 let Inst{13-5} = Ii{9-1};
2916 let Inst{4-0} = Rd32{4-0};
2918 class Enc_66bce1 : OpcodeHexagon {
2920 let Inst{21-20} = Ii{10-9};
2921 let Inst{7-1} = Ii{8-2};
2923 let Inst{19-16} = Rs16{3-0};
2925 let Inst{11-8} = Rd16{3-0};
2927 class Enc_b8309d : OpcodeHexagon {
2929 let Inst{8-3} = Ii{8-3};
2931 let Inst{2-0} = Rtt8{2-0};
2933 class Enc_5e8512 : OpcodeHexagon {
2935 let Inst{12-8} = Vu32{4-0};
2937 let Inst{20-16} = Rt32{4-0};
2939 let Inst{4-0} = Vxx32{4-0};
2941 class Enc_4f677b : OpcodeHexagon {
2943 let Inst{13-13} = Ii{1-1};
2944 let Inst{7-7} = Ii{0-0};
2946 let Inst{11-8} = II{5-2};
2947 let Inst{6-5} = II{1-0};
2949 let Inst{20-16} = Rt32{4-0};
2951 let Inst{4-0} = Rd32{4-0};
2953 class Enc_3d920a : OpcodeHexagon {
2955 let Inst{8-5} = Ii{5-2};
2957 let Inst{4-0} = Rd32{4-0};
2959 let Inst{20-16} = Rx32{4-0};
2961 class Enc_e83554 : OpcodeHexagon {
2963 let Inst{8-5} = Ii{4-1};
2965 let Inst{13-13} = Mu2{0-0};
2967 let Inst{4-0} = Rd32{4-0};
2969 let Inst{20-16} = Rx32{4-0};
2971 class Enc_ed48be : OpcodeHexagon {
2973 let Inst{6-5} = Ii{1-0};
2975 let Inst{2-0} = Rdd8{2-0};
2977 class Enc_f8c1c4 : OpcodeHexagon {
2979 let Inst{12-11} = Pv4{1-0};
2981 let Inst{13-13} = Mu2{0-0};
2983 let Inst{4-0} = Vd32{4-0};
2985 let Inst{20-16} = Rx32{4-0};
2987 class Enc_1aa186 : OpcodeHexagon {
2989 let Inst{20-16} = Rss32{4-0};
2991 let Inst{12-8} = Rt32{4-0};
2993 let Inst{4-0} = Rxx32{4-0};
2995 class Enc_134437 : OpcodeHexagon {
2997 let Inst{9-8} = Qs4{1-0};
2999 let Inst{23-22} = Qt4{1-0};
3001 let Inst{1-0} = Qd4{1-0};
3003 class Enc_97d666 : OpcodeHexagon {
3005 let Inst{7-4} = Rs16{3-0};
3007 let Inst{3-0} = Rd16{3-0};
3009 class Enc_f82eaf : OpcodeHexagon {
3011 let Inst{10-5} = Ii{7-2};
3013 let Inst{12-11} = Pt4{1-0};
3015 let Inst{20-16} = Rs32{4-0};
3017 let Inst{4-0} = Rd32{4-0};
3019 class Enc_69d63b : OpcodeHexagon {
3021 let Inst{21-20} = Ii{10-9};
3022 let Inst{7-1} = Ii{8-2};
3024 let Inst{18-16} = Ns8{2-0};
3026 class Enc_f79415 : OpcodeHexagon {
3028 let Inst{13-13} = Ii{1-1};
3029 let Inst{6-6} = Ii{0-0};
3031 let Inst{5-0} = II{5-0};
3033 let Inst{20-16} = Ru32{4-0};
3035 let Inst{12-8} = Rtt32{4-0};
3037 class Enc_ce6828 : OpcodeHexagon {
3039 let Inst{26-25} = Ii{13-12};
3040 let Inst{13-13} = Ii{11-11};
3041 let Inst{7-0} = Ii{10-3};
3043 let Inst{20-16} = Rs32{4-0};
3045 let Inst{12-8} = Rtt32{4-0};
3047 class Enc_800e04 : OpcodeHexagon {
3049 let Inst{21-20} = Ii{10-9};
3050 let Inst{7-1} = Ii{8-2};
3052 let Inst{19-16} = Rs16{3-0};
3054 let Inst{28-28} = n1{5-5};
3055 let Inst{25-22} = n1{4-1};
3056 let Inst{13-13} = n1{0-0};
3058 class Enc_ad1831 : OpcodeHexagon {
3060 let Inst{26-25} = Ii{15-14};
3061 let Inst{20-16} = Ii{13-9};
3062 let Inst{13-13} = Ii{8-8};
3063 let Inst{7-0} = Ii{7-0};
3065 let Inst{10-8} = Nt8{2-0};
3067 class Enc_0fa531 : OpcodeHexagon {
3069 let Inst{21-21} = Ii{14-14};
3070 let Inst{13-13} = Ii{13-13};
3071 let Inst{11-1} = Ii{12-2};
3073 let Inst{20-16} = Rs32{4-0};
3075 class Enc_7eaeb6 : OpcodeHexagon {
3077 let Inst{6-3} = Ii{5-2};
3079 let Inst{1-0} = Pv4{1-0};
3081 let Inst{12-8} = Rt32{4-0};
3083 let Inst{20-16} = Rx32{4-0};
3085 class Enc_f55a0c : OpcodeHexagon {
3087 let Inst{11-8} = Ii{5-2};
3089 let Inst{7-4} = Rs16{3-0};
3091 let Inst{3-0} = Rt16{3-0};
3093 class Enc_f20719 : OpcodeHexagon {
3095 let Inst{12-7} = Ii{6-1};
3097 let Inst{13-13} = II{5-5};
3098 let Inst{4-0} = II{4-0};
3100 let Inst{6-5} = Pv4{1-0};
3102 let Inst{20-16} = Rs32{4-0};
3104 class Enc_eafd18 : OpcodeHexagon {
3106 let Inst{12-8} = II{4-0};
3108 let Inst{21-20} = Ii{10-9};
3109 let Inst{7-1} = Ii{8-2};
3111 let Inst{18-16} = Ns8{2-0};
3113 class Enc_7b523d : OpcodeHexagon {
3115 let Inst{12-8} = Vu32{4-0};
3117 let Inst{23-19} = Vv32{4-0};
3119 let Inst{18-16} = Rt8{2-0};
3121 let Inst{4-0} = Vxx32{4-0};
3123 class Enc_47ef61 : OpcodeHexagon {
3125 let Inst{7-5} = Ii{2-0};
3127 let Inst{12-8} = Rt32{4-0};
3129 let Inst{20-16} = Rs32{4-0};
3131 let Inst{4-0} = Rd32{4-0};
3133 class Enc_cc857d : OpcodeHexagon {
3135 let Inst{12-8} = Vuu32{4-0};
3137 let Inst{20-16} = Rt32{4-0};
3139 let Inst{4-0} = Vx32{4-0};
3141 class Enc_7fa7f6 : OpcodeHexagon {
3143 let Inst{11-8} = II{5-2};
3144 let Inst{6-5} = II{1-0};
3146 let Inst{4-0} = Rdd32{4-0};
3148 let Inst{20-16} = Re32{4-0};
3150 class Enc_0f8bab : OpcodeHexagon {
3152 let Inst{12-8} = Vu32{4-0};
3154 let Inst{20-16} = Rt32{4-0};
3156 let Inst{1-0} = Qd4{1-0};
3158 class Enc_7eb485 : OpcodeHexagon {
3160 let Inst{13-13} = Ii{1-1};
3161 let Inst{6-6} = Ii{0-0};
3163 let Inst{5-0} = II{5-0};
3165 let Inst{20-16} = Ru32{4-0};
3167 let Inst{10-8} = Nt8{2-0};
3169 class Enc_864a5a : OpcodeHexagon {
3171 let Inst{12-8} = Ii{8-4};
3172 let Inst{4-3} = Ii{3-2};
3174 let Inst{20-16} = Rs32{4-0};
3176 class Enc_c2b48e : OpcodeHexagon {
3178 let Inst{20-16} = Rs32{4-0};
3180 let Inst{12-8} = Rt32{4-0};
3182 let Inst{1-0} = Pd4{1-0};
3184 class Enc_8c6530 : OpcodeHexagon {
3186 let Inst{12-8} = Rtt32{4-0};
3188 let Inst{20-16} = Rss32{4-0};
3190 let Inst{6-5} = Pu4{1-0};
3192 let Inst{4-0} = Rdd32{4-0};
3194 class Enc_448f7f : OpcodeHexagon {
3196 let Inst{26-25} = Ii{10-9};
3197 let Inst{13-13} = Ii{8-8};
3198 let Inst{7-0} = Ii{7-0};
3200 let Inst{20-16} = Rs32{4-0};
3202 let Inst{12-8} = Rt32{4-0};
3204 class Enc_da8d43 : OpcodeHexagon {
3206 let Inst{13-13} = Ii{5-5};
3207 let Inst{7-3} = Ii{4-0};
3209 let Inst{1-0} = Pv4{1-0};
3211 let Inst{20-16} = Rs32{4-0};
3213 let Inst{12-8} = Rt32{4-0};
3215 class Enc_a6ce9c : OpcodeHexagon {
3217 let Inst{3-0} = Ii{5-2};
3219 let Inst{7-4} = Rs16{3-0};
3221 class Enc_eca7c8 : OpcodeHexagon {
3223 let Inst{13-13} = Ii{1-1};
3224 let Inst{7-7} = Ii{0-0};
3226 let Inst{20-16} = Rs32{4-0};
3228 let Inst{12-8} = Ru32{4-0};
3230 let Inst{4-0} = Rt32{4-0};
3232 class Enc_4b39e4 : OpcodeHexagon {
3234 let Inst{7-5} = Ii{2-0};
3236 let Inst{12-8} = Vu32{4-0};
3238 let Inst{20-16} = Vv32{4-0};
3240 let Inst{4-0} = Vdd32{4-0};