1 //==- HexagonFrameLowering.h - Define frame lowering for Hexagon -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
11 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
14 #include "HexagonBlockRanges.h"
15 #include "llvm/ADT/STLExtras.h"
16 #include "llvm/CodeGen/MachineBasicBlock.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/TargetFrameLowering.h"
24 class HexagonInstrInfo;
25 class HexagonRegisterInfo;
26 class MachineFunction;
28 class MachineRegisterInfo;
29 class TargetRegisterClass;
31 class HexagonFrameLowering : public TargetFrameLowering {
33 explicit HexagonFrameLowering()
34 : TargetFrameLowering(StackGrowsDown, 8, 0, 1, true) {}
36 // All of the prolog/epilog functionality, including saving and restoring
37 // callee-saved registers is handled in emitPrologue. This is to have the
38 // logic for shrink-wrapping in one place.
39 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const
41 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
44 bool enableCalleeSaveSkip(const MachineFunction &MF) const override;
46 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
47 MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI,
48 const TargetRegisterInfo *TRI) const override {
52 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
53 MachineBasicBlock::iterator MI, std::vector<CalleeSavedInfo> &CSI,
54 const TargetRegisterInfo *TRI) const override {
58 bool hasReservedCallFrame(const MachineFunction &MF) const override {
59 // We always reserve call frame as a part of the initial stack allocation.
63 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override {
64 // Override this function to avoid calling hasFP before CSI is set
65 // (the default implementation calls hasFP).
69 MachineBasicBlock::iterator
70 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
71 MachineBasicBlock::iterator I) const override;
72 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
73 RegScavenger *RS = nullptr) const override;
74 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
75 RegScavenger *RS) const override;
77 bool targetHandlesStackFrameRounding() const override {
81 int getFrameIndexReference(const MachineFunction &MF, int FI,
82 unsigned &FrameReg) const override;
83 bool hasFP(const MachineFunction &MF) const override;
85 const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries)
87 static const SpillSlot Offsets[] = {
88 { Hexagon::R17, -4 }, { Hexagon::R16, -8 }, { Hexagon::D8, -8 },
89 { Hexagon::R19, -12 }, { Hexagon::R18, -16 }, { Hexagon::D9, -16 },
90 { Hexagon::R21, -20 }, { Hexagon::R20, -24 }, { Hexagon::D10, -24 },
91 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 },
92 { Hexagon::R25, -36 }, { Hexagon::R24, -40 }, { Hexagon::D12, -40 },
93 { Hexagon::R27, -44 }, { Hexagon::R26, -48 }, { Hexagon::D13, -48 }
95 NumEntries = array_lengthof(Offsets);
99 bool assignCalleeSavedSpillSlots(MachineFunction &MF,
100 const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI)
103 bool needsAligna(const MachineFunction &MF) const;
104 const MachineInstr *getAlignaInstr(const MachineFunction &MF) const;
106 void insertCFIInstructions(MachineFunction &MF) const;
109 using CSIVect = std::vector<CalleeSavedInfo>;
111 void expandAlloca(MachineInstr *AI, const HexagonInstrInfo &TII,
112 unsigned SP, unsigned CF) const;
113 void insertPrologueInBlock(MachineBasicBlock &MBB, bool PrologueStubs) const;
114 void insertEpilogueInBlock(MachineBasicBlock &MBB) const;
115 void insertAllocframe(MachineBasicBlock &MBB,
116 MachineBasicBlock::iterator InsertPt, unsigned NumBytes) const;
117 bool insertCSRSpillsInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
118 const HexagonRegisterInfo &HRI, bool &PrologueStubs) const;
119 bool insertCSRRestoresInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
120 const HexagonRegisterInfo &HRI) const;
121 void updateEntryPaths(MachineFunction &MF, MachineBasicBlock &SaveB) const;
122 bool updateExitPaths(MachineBasicBlock &MBB, MachineBasicBlock &RestoreB,
123 BitVector &DoneT, BitVector &DoneF, BitVector &Path) const;
124 void insertCFIInstructionsAt(MachineBasicBlock &MBB,
125 MachineBasicBlock::iterator At) const;
127 void adjustForCalleeSavedRegsSpillCall(MachineFunction &MF) const;
129 bool expandCopy(MachineBasicBlock &B, MachineBasicBlock::iterator It,
130 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
131 SmallVectorImpl<unsigned> &NewRegs) const;
132 bool expandStoreInt(MachineBasicBlock &B, MachineBasicBlock::iterator It,
133 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
134 SmallVectorImpl<unsigned> &NewRegs) const;
135 bool expandLoadInt(MachineBasicBlock &B, MachineBasicBlock::iterator It,
136 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
137 SmallVectorImpl<unsigned> &NewRegs) const;
138 bool expandStoreVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It,
139 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
140 SmallVectorImpl<unsigned> &NewRegs) const;
141 bool expandLoadVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It,
142 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
143 SmallVectorImpl<unsigned> &NewRegs) const;
144 bool expandStoreVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It,
145 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
146 SmallVectorImpl<unsigned> &NewRegs) const;
147 bool expandLoadVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It,
148 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
149 SmallVectorImpl<unsigned> &NewRegs) const;
150 bool expandStoreVec(MachineBasicBlock &B, MachineBasicBlock::iterator It,
151 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
152 SmallVectorImpl<unsigned> &NewRegs) const;
153 bool expandLoadVec(MachineBasicBlock &B, MachineBasicBlock::iterator It,
154 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
155 SmallVectorImpl<unsigned> &NewRegs) const;
156 bool expandSpillMacros(MachineFunction &MF,
157 SmallVectorImpl<unsigned> &NewRegs) const;
159 unsigned findPhysReg(MachineFunction &MF, HexagonBlockRanges::IndexRange &FIR,
160 HexagonBlockRanges::InstrIndexMap &IndexMap,
161 HexagonBlockRanges::RegToRangeMap &DeadMap,
162 const TargetRegisterClass *RC) const;
163 void optimizeSpillSlots(MachineFunction &MF,
164 SmallVectorImpl<unsigned> &VRegs) const;
166 void findShrunkPrologEpilog(MachineFunction &MF, MachineBasicBlock *&PrologB,
167 MachineBasicBlock *&EpilogB) const;
169 void addCalleeSaveRegistersAsImpOperand(MachineInstr *MI, const CSIVect &CSI,
170 bool IsDef, bool IsKill) const;
171 bool shouldInlineCSR(const MachineFunction &MF, const CSIVect &CSI) const;
172 bool useSpillFunction(const MachineFunction &MF, const CSIVect &CSI) const;
173 bool useRestoreFunction(const MachineFunction &MF, const CSIVect &CSI) const;
174 bool mayOverflowFrameOffset(MachineFunction &MF) const;
177 } // end namespace llvm
179 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H