1 //=- HexagonFrameLowering.h - Define frame lowering for Hexagon --*- C++ -*--=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
11 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
14 #include "HexagonBlockRanges.h"
15 #include "llvm/ADT/STLExtras.h"
16 #include "llvm/CodeGen/MachineBasicBlock.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/Target/TargetFrameLowering.h"
23 class HexagonInstrInfo;
24 class HexagonRegisterInfo;
26 class HexagonFrameLowering : public TargetFrameLowering {
28 explicit HexagonFrameLowering()
29 : TargetFrameLowering(StackGrowsDown, 8, 0, 1, true) {}
31 // All of the prolog/epilog functionality, including saving and restoring
32 // callee-saved registers is handled in emitPrologue. This is to have the
33 // logic for shrink-wrapping in one place.
34 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const
36 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
39 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
40 MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI,
41 const TargetRegisterInfo *TRI) const override {
45 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
46 MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI,
47 const TargetRegisterInfo *TRI) const override {
51 bool hasReservedCallFrame(const MachineFunction &MF) const override {
52 // We always reserve call frame as a part of the initial stack allocation.
55 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override {
56 // Override this function to avoid calling hasFP before CSI is set
57 // (the default implementation calls hasFP).
60 MachineBasicBlock::iterator
61 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
62 MachineBasicBlock::iterator I) const override;
63 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
64 RegScavenger *RS = nullptr) const override;
65 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
66 RegScavenger *RS) const override;
68 bool targetHandlesStackFrameRounding() const override {
72 int getFrameIndexReference(const MachineFunction &MF, int FI,
73 unsigned &FrameReg) const override;
74 bool hasFP(const MachineFunction &MF) const override;
76 const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries)
78 static const SpillSlot Offsets[] = {
79 { Hexagon::R17, -4 }, { Hexagon::R16, -8 }, { Hexagon::D8, -8 },
80 { Hexagon::R19, -12 }, { Hexagon::R18, -16 }, { Hexagon::D9, -16 },
81 { Hexagon::R21, -20 }, { Hexagon::R20, -24 }, { Hexagon::D10, -24 },
82 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 },
83 { Hexagon::R25, -36 }, { Hexagon::R24, -40 }, { Hexagon::D12, -40 },
84 { Hexagon::R27, -44 }, { Hexagon::R26, -48 }, { Hexagon::D13, -48 }
86 NumEntries = array_lengthof(Offsets);
90 bool assignCalleeSavedSpillSlots(MachineFunction &MF,
91 const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI)
94 bool needsAligna(const MachineFunction &MF) const;
95 const MachineInstr *getAlignaInstr(const MachineFunction &MF) const;
97 void insertCFIInstructions(MachineFunction &MF) const;
100 typedef std::vector<CalleeSavedInfo> CSIVect;
102 void expandAlloca(MachineInstr *AI, const HexagonInstrInfo &TII,
103 unsigned SP, unsigned CF) const;
104 void insertPrologueInBlock(MachineBasicBlock &MBB, bool PrologueStubs) const;
105 void insertEpilogueInBlock(MachineBasicBlock &MBB) const;
106 void insertAllocframe(MachineBasicBlock &MBB,
107 MachineBasicBlock::iterator InsertPt, unsigned NumBytes) const;
108 bool insertCSRSpillsInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
109 const HexagonRegisterInfo &HRI, bool &PrologueStubs) const;
110 bool insertCSRRestoresInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
111 const HexagonRegisterInfo &HRI) const;
112 void updateEntryPaths(MachineFunction &MF, MachineBasicBlock &SaveB) const;
113 bool updateExitPaths(MachineBasicBlock &MBB, MachineBasicBlock &RestoreB,
114 BitVector &DoneT, BitVector &DoneF, BitVector &Path) const;
115 void insertCFIInstructionsAt(MachineBasicBlock &MBB,
116 MachineBasicBlock::iterator At) const;
118 void adjustForCalleeSavedRegsSpillCall(MachineFunction &MF) const;
120 bool expandCopy(MachineBasicBlock &B, MachineBasicBlock::iterator It,
121 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
122 SmallVectorImpl<unsigned> &NewRegs) const;
123 bool expandStoreInt(MachineBasicBlock &B, MachineBasicBlock::iterator It,
124 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
125 SmallVectorImpl<unsigned> &NewRegs) const;
126 bool expandLoadInt(MachineBasicBlock &B, MachineBasicBlock::iterator It,
127 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
128 SmallVectorImpl<unsigned> &NewRegs) const;
129 bool expandStoreVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It,
130 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
131 SmallVectorImpl<unsigned> &NewRegs) const;
132 bool expandLoadVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It,
133 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
134 SmallVectorImpl<unsigned> &NewRegs) const;
135 bool expandStoreVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It,
136 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
137 SmallVectorImpl<unsigned> &NewRegs) const;
138 bool expandLoadVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It,
139 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
140 SmallVectorImpl<unsigned> &NewRegs) const;
141 bool expandStoreVec(MachineBasicBlock &B, MachineBasicBlock::iterator It,
142 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
143 SmallVectorImpl<unsigned> &NewRegs) const;
144 bool expandLoadVec(MachineBasicBlock &B, MachineBasicBlock::iterator It,
145 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
146 SmallVectorImpl<unsigned> &NewRegs) const;
147 bool expandSpillMacros(MachineFunction &MF,
148 SmallVectorImpl<unsigned> &NewRegs) const;
150 unsigned findPhysReg(MachineFunction &MF, HexagonBlockRanges::IndexRange &FIR,
151 HexagonBlockRanges::InstrIndexMap &IndexMap,
152 HexagonBlockRanges::RegToRangeMap &DeadMap,
153 const TargetRegisterClass *RC) const;
154 void optimizeSpillSlots(MachineFunction &MF,
155 SmallVectorImpl<unsigned> &VRegs) const;
157 void findShrunkPrologEpilog(MachineFunction &MF, MachineBasicBlock *&PrologB,
158 MachineBasicBlock *&EpilogB) const;
160 void addCalleeSaveRegistersAsImpOperand(MachineInstr *MI, const CSIVect &CSI,
161 bool IsDef, bool IsKill) const;
162 bool shouldInlineCSR(const MachineFunction &MF, const CSIVect &CSI) const;
163 bool useSpillFunction(const MachineFunction &MF, const CSIVect &CSI) const;
164 bool useRestoreFunction(const MachineFunction &MF, const CSIVect &CSI) const;
165 bool mayOverflowFrameOffset(MachineFunction &MF) const;
168 } // end namespace llvm
170 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H