1 //==- HexagonRegisterInfo.h - Hexagon Register Information Impl --*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Hexagon implementation of the TargetRegisterInfo
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
16 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
18 #include "llvm/CodeGen/TargetRegisterInfo.h"
20 #define GET_REGINFO_HEADER
21 #include "HexagonGenRegisterInfo.inc"
26 // Generic (pseudo) subreg indices for use with getHexagonSubRegIndex.
27 enum { ps_sub_lo = 0, ps_sub_hi = 1 };
30 class HexagonRegisterInfo : public HexagonGenRegisterInfo {
32 HexagonRegisterInfo(unsigned HwMode);
34 /// Code Generation virtual methods...
35 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF)
37 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
38 CallingConv::ID) const override;
40 BitVector getReservedRegs(const MachineFunction &MF) const override;
42 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
43 unsigned FIOperandNum, RegScavenger *RS = nullptr) const override;
45 /// Returns true since we may need scavenging for a temporary register
46 /// when generating hardware loop instructions.
47 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
51 /// Returns true. Spill code for predicate registers might need an extra
53 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
57 /// Returns true if the frame pointer is valid.
58 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
60 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
64 bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC,
65 unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg,
66 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override;
68 // Debug information queries.
69 unsigned getRARegister() const;
70 unsigned getFrameRegister(const MachineFunction &MF) const override;
71 unsigned getFrameRegister() const;
72 unsigned getStackRegister() const;
74 unsigned getHexagonSubRegIndex(const TargetRegisterClass &RC,
75 unsigned GenIdx) const;
77 const MCPhysReg *getCallerSavedRegs(const MachineFunction *MF,
78 const TargetRegisterClass *RC) const;
80 unsigned getFirstCallerSavedNonParamReg() const;
82 const TargetRegisterClass *
83 getPointerRegClass(const MachineFunction &MF,
84 unsigned Kind = 0) const override;
86 bool isEHReturnCalleeSaveReg(unsigned Reg) const;
89 } // end namespace llvm