1 //===-- HexagonSubtarget.h - Define Subtarget for the Hexagon ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Hexagon specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONSUBTARGET_H
15 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONSUBTARGET_H
17 #include "HexagonFrameLowering.h"
18 #include "HexagonISelLowering.h"
19 #include "HexagonInstrInfo.h"
20 #include "HexagonSelectionDAGInfo.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include "llvm/Target/TargetSubtargetInfo.h"
25 #define GET_SUBTARGETINFO_HEADER
26 #include "HexagonGenSubtargetInfo.inc"
28 #define Hexagon_SMALL_DATA_THRESHOLD 8
29 #define Hexagon_SLOTS 4
33 class HexagonSubtarget : public HexagonGenSubtargetInfo {
34 virtual void anchor();
36 bool UseMemOps, UseHVXOps, UseHVXDblOps;
41 enum HexagonArchEnum {
45 HexagonArchEnum HexagonArchVersion;
46 /// True if the target should use Back-Skip-Back scheduling. This is the
48 bool UseBSBScheduling;
50 class HexagonDAGMutation : public ScheduleDAGMutation {
52 void apply(ScheduleDAGInstrs *DAG) override;
56 std::string CPUString;
57 HexagonInstrInfo InstrInfo;
58 HexagonTargetLowering TLInfo;
59 HexagonSelectionDAGInfo TSInfo;
60 HexagonFrameLowering FrameLowering;
61 InstrItineraryData InstrItins;
62 void initializeEnvironment();
65 HexagonSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
66 const TargetMachine &TM);
68 /// getInstrItins - Return the instruction itineraries based on subtarget
70 const InstrItineraryData *getInstrItineraryData() const override {
73 const HexagonInstrInfo *getInstrInfo() const override { return &InstrInfo; }
74 const HexagonRegisterInfo *getRegisterInfo() const override {
75 return &InstrInfo.getRegisterInfo();
77 const HexagonTargetLowering *getTargetLowering() const override {
80 const HexagonFrameLowering *getFrameLowering() const override {
81 return &FrameLowering;
83 const HexagonSelectionDAGInfo *getSelectionDAGInfo() const override {
87 HexagonSubtarget &initializeSubtargetDependencies(StringRef CPU,
90 /// ParseSubtargetFeatures - Parses features string setting specified
91 /// subtarget options. Definition of function is auto generated by tblgen.
92 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
94 bool useMemOps() const { return UseMemOps; }
95 bool hasV5TOps() const { return getHexagonArchVersion() >= V5; }
96 bool hasV5TOpsOnly() const { return getHexagonArchVersion() == V5; }
97 bool hasV55TOps() const { return getHexagonArchVersion() >= V55; }
98 bool hasV55TOpsOnly() const { return getHexagonArchVersion() == V55; }
99 bool hasV60TOps() const { return getHexagonArchVersion() >= V60; }
100 bool hasV60TOpsOnly() const { return getHexagonArchVersion() == V60; }
101 bool modeIEEERndNear() const { return ModeIEEERndNear; }
102 bool useHVXOps() const { return UseHVXOps; }
103 bool useHVXDblOps() const { return UseHVXOps && UseHVXDblOps; }
104 bool useHVXSglOps() const { return UseHVXOps && !UseHVXDblOps; }
105 bool useLongCalls() const { return UseLongCalls; }
107 bool useBSBScheduling() const { return UseBSBScheduling; }
108 bool enableMachineScheduler() const override;
109 // Always use the TargetLowering default scheduler.
110 // FIXME: This will use the vliw scheduler which is probably just hurting
111 // compiler time and will be removed eventually anyway.
112 bool enableMachineSchedDefaultSched() const override { return false; }
114 AntiDepBreakMode getAntiDepBreakMode() const override { return ANTIDEP_ALL; }
115 bool enablePostRAScheduler() const override { return true; }
117 bool enableSubRegLiveness() const override;
119 const std::string &getCPUString () const { return CPUString; }
121 // Threshold for small data section
122 unsigned getSmallDataThreshold() const {
123 return Hexagon_SMALL_DATA_THRESHOLD;
125 const HexagonArchEnum &getHexagonArchVersion() const {
126 return HexagonArchVersion;
129 void getPostRAMutations(
130 std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations)
133 void getSMSMutations(
134 std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations)
137 /// \brief Perform target specific adjustments to the latency of a schedule
139 void adjustSchedDependency(SUnit *def, SUnit *use, SDep& dep) const override;
141 unsigned getL1CacheLineSize() const;
142 unsigned getL1PrefetchDistance() const;
145 // Helper function responsible for increasing the latency only.
146 void updateLatency(MachineInstr &SrcInst, MachineInstr &DstInst, SDep &Dep)
148 void changeLatency(SUnit *Src, SmallVector<SDep, 4> &Deps, SUnit *Dst,
150 bool isBestZeroLatency(SUnit *Src, SUnit *Dst, const HexagonInstrInfo *TII)
152 void changePhiLatency(MachineInstr &SrcInst, SUnit *Dst, SDep &Dep) const;
155 } // end namespace llvm