1 //===- HexagonTargetTransformInfo.cpp - Hexagon specific TTI pass ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
9 /// This file implements a TargetTransformInfo analysis pass specific to the
10 /// Hexagon target machine. It uses the target's detailed information to provide
11 /// more precise answers to certain TTI queries, while letting the target
12 /// independent and default TTI implementations handle the rest.
14 //===----------------------------------------------------------------------===//
16 #include "HexagonTargetTransformInfo.h"
17 #include "HexagonSubtarget.h"
18 #include "llvm/Analysis/TargetTransformInfo.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 #include "llvm/IR/InstrTypes.h"
21 #include "llvm/IR/Instructions.h"
22 #include "llvm/IR/User.h"
23 #include "llvm/Support/Casting.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Transforms/Utils/UnrollLoop.h"
29 #define DEBUG_TYPE "hexagontti"
31 static cl::opt<bool> HexagonAutoHVX("hexagon-autohvx", cl::init(false),
32 cl::Hidden, cl::desc("Enable loop vectorizer for HVX"));
34 static cl::opt<bool> EmitLookupTables("hexagon-emit-lookup-tables",
35 cl::init(true), cl::Hidden,
36 cl::desc("Control lookup table emission on Hexagon target"));
38 // Constant "cost factor" to make floating point operations more expensive
39 // in terms of vectorization cost. This isn't the best way, but it should
40 // do. Ultimately, the cost should use cycles.
41 static const unsigned FloatFactor = 4;
43 bool HexagonTTIImpl::useHVX() const {
44 return ST.useHVXOps() && HexagonAutoHVX;
47 bool HexagonTTIImpl::isTypeForHVX(Type *VecTy) const {
48 assert(VecTy->isVectorTy());
49 // Avoid types like <2 x i32*>.
50 if (!cast<VectorType>(VecTy)->getElementType()->isIntegerTy())
52 EVT VecVT = EVT::getEVT(VecTy);
53 if (!VecVT.isSimple() || VecVT.getSizeInBits() <= 64)
55 if (ST.isHVXVectorType(VecVT.getSimpleVT()))
57 auto Action = TLI.getPreferredVectorAction(VecVT.getSimpleVT());
58 return Action == TargetLoweringBase::TypeWidenVector;
61 unsigned HexagonTTIImpl::getTypeNumElements(Type *Ty) const {
63 return Ty->getVectorNumElements();
64 assert((Ty->isIntegerTy() || Ty->isFloatingPointTy()) &&
65 "Expecting scalar type");
69 TargetTransformInfo::PopcntSupportKind
70 HexagonTTIImpl::getPopcntSupport(unsigned IntTyWidthInBit) const {
71 // Return fast hardware support as every input < 64 bits will be promoted
73 return TargetTransformInfo::PSK_FastHardware;
76 // The Hexagon target can unroll loops with run-time trip counts.
77 void HexagonTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
78 TTI::UnrollingPreferences &UP) {
79 UP.Runtime = UP.Partial = true;
80 // Only try to peel innermost loops with small runtime trip counts.
81 if (L && L->empty() && canPeel(L) &&
82 SE.getSmallConstantTripCount(L) == 0 &&
83 SE.getSmallConstantMaxTripCount(L) > 0 &&
84 SE.getSmallConstantMaxTripCount(L) <= 5) {
89 bool HexagonTTIImpl::shouldFavorPostInc() const {
93 /// --- Vector TTI begin ---
95 unsigned HexagonTTIImpl::getNumberOfRegisters(bool Vector) const {
97 return useHVX() ? 32 : 0;
101 unsigned HexagonTTIImpl::getMaxInterleaveFactor(unsigned VF) {
102 return useHVX() ? 2 : 0;
105 unsigned HexagonTTIImpl::getRegisterBitWidth(bool Vector) const {
106 return Vector ? getMinVectorRegisterBitWidth() : 32;
109 unsigned HexagonTTIImpl::getMinVectorRegisterBitWidth() const {
110 return useHVX() ? ST.getVectorLength()*8 : 0;
113 unsigned HexagonTTIImpl::getMinimumVF(unsigned ElemWidth) const {
114 return (8 * ST.getVectorLength()) / ElemWidth;
117 unsigned HexagonTTIImpl::getScalarizationOverhead(Type *Ty, bool Insert,
119 return BaseT::getScalarizationOverhead(Ty, Insert, Extract);
122 unsigned HexagonTTIImpl::getOperandsScalarizationOverhead(
123 ArrayRef<const Value*> Args, unsigned VF) {
124 return BaseT::getOperandsScalarizationOverhead(Args, VF);
127 unsigned HexagonTTIImpl::getCallInstrCost(Function *F, Type *RetTy,
128 ArrayRef<Type*> Tys) {
129 return BaseT::getCallInstrCost(F, RetTy, Tys);
132 unsigned HexagonTTIImpl::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
133 ArrayRef<Value*> Args, FastMathFlags FMF, unsigned VF) {
134 return BaseT::getIntrinsicInstrCost(ID, RetTy, Args, FMF, VF);
137 unsigned HexagonTTIImpl::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
138 ArrayRef<Type*> Tys, FastMathFlags FMF,
139 unsigned ScalarizationCostPassed) {
140 if (ID == Intrinsic::bswap) {
141 std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, RetTy);
144 return BaseT::getIntrinsicInstrCost(ID, RetTy, Tys, FMF,
145 ScalarizationCostPassed);
148 unsigned HexagonTTIImpl::getAddressComputationCost(Type *Tp,
149 ScalarEvolution *SE, const SCEV *S) {
153 unsigned HexagonTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
154 unsigned Alignment, unsigned AddressSpace, const Instruction *I) {
155 assert(Opcode == Instruction::Load || Opcode == Instruction::Store);
156 if (Opcode == Instruction::Store)
157 return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, I);
159 if (Src->isVectorTy()) {
160 VectorType *VecTy = cast<VectorType>(Src);
161 unsigned VecWidth = VecTy->getBitWidth();
162 if (useHVX() && isTypeForHVX(VecTy)) {
163 unsigned RegWidth = getRegisterBitWidth(true);
164 Alignment = std::min(Alignment, RegWidth/8);
165 // Cost of HVX loads.
166 if (VecWidth % RegWidth == 0)
167 return VecWidth / RegWidth;
168 // Cost of constructing HVX vector from scalar loads.
169 unsigned AlignWidth = 8 * std::max(1u, Alignment);
170 unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth;
175 // Add extra cost for floating point types.
176 unsigned Cost = VecTy->getElementType()->isFloatingPointTy() ? FloatFactor
178 Alignment = std::min(Alignment, 8u);
179 unsigned AlignWidth = 8 * std::max(1u, Alignment);
180 unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth;
181 if (Alignment == 4 || Alignment == 8)
182 return Cost * NumLoads;
183 // Loads of less than 32 bits will need extra inserts to compose a vector.
184 unsigned LogA = Log2_32(Alignment);
185 return (3 - LogA) * Cost * NumLoads;
188 return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, I);
191 unsigned HexagonTTIImpl::getMaskedMemoryOpCost(unsigned Opcode,
192 Type *Src, unsigned Alignment, unsigned AddressSpace) {
193 return BaseT::getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
196 unsigned HexagonTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp,
197 int Index, Type *SubTp) {
201 unsigned HexagonTTIImpl::getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
202 Value *Ptr, bool VariableMask, unsigned Alignment) {
203 return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
207 unsigned HexagonTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode,
208 Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
209 unsigned Alignment, unsigned AddressSpace, bool UseMaskForCond,
210 bool UseMaskForGaps) {
211 if (Indices.size() != Factor || UseMaskForCond || UseMaskForGaps)
212 return BaseT::getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
213 Alignment, AddressSpace,
214 UseMaskForCond, UseMaskForGaps);
215 return getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace, nullptr);
218 unsigned HexagonTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
219 Type *CondTy, const Instruction *I) {
220 if (ValTy->isVectorTy()) {
221 std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, ValTy);
222 if (Opcode == Instruction::FCmp)
223 return LT.first + FloatFactor * getTypeNumElements(ValTy);
225 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, I);
228 unsigned HexagonTTIImpl::getArithmeticInstrCost(unsigned Opcode, Type *Ty,
229 TTI::OperandValueKind Opd1Info, TTI::OperandValueKind Opd2Info,
230 TTI::OperandValueProperties Opd1PropInfo,
231 TTI::OperandValueProperties Opd2PropInfo, ArrayRef<const Value*> Args) {
232 if (Ty->isVectorTy()) {
233 std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, Ty);
234 if (LT.second.isFloatingPoint())
235 return LT.first + FloatFactor * getTypeNumElements(Ty);
237 return BaseT::getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
238 Opd1PropInfo, Opd2PropInfo, Args);
241 unsigned HexagonTTIImpl::getCastInstrCost(unsigned Opcode, Type *DstTy,
242 Type *SrcTy, const Instruction *I) {
243 if (SrcTy->isFPOrFPVectorTy() || DstTy->isFPOrFPVectorTy()) {
244 unsigned SrcN = SrcTy->isFPOrFPVectorTy() ? getTypeNumElements(SrcTy) : 0;
245 unsigned DstN = DstTy->isFPOrFPVectorTy() ? getTypeNumElements(DstTy) : 0;
247 std::pair<int, MVT> SrcLT = TLI.getTypeLegalizationCost(DL, SrcTy);
248 std::pair<int, MVT> DstLT = TLI.getTypeLegalizationCost(DL, DstTy);
249 return std::max(SrcLT.first, DstLT.first) + FloatFactor * (SrcN + DstN);
254 unsigned HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
256 Type *ElemTy = Val->isVectorTy() ? cast<VectorType>(Val)->getElementType()
258 if (Opcode == Instruction::InsertElement) {
259 // Need two rotations for non-zero index.
260 unsigned Cost = (Index != 0) ? 2 : 0;
261 if (ElemTy->isIntegerTy(32))
263 // If it's not a 32-bit value, there will need to be an extract.
264 return Cost + getVectorInstrCost(Instruction::ExtractElement, Val, Index);
267 if (Opcode == Instruction::ExtractElement)
273 /// --- Vector TTI end ---
275 unsigned HexagonTTIImpl::getPrefetchDistance() const {
276 return ST.getL1PrefetchDistance();
279 unsigned HexagonTTIImpl::getCacheLineSize() const {
280 return ST.getL1CacheLineSize();
283 int HexagonTTIImpl::getUserCost(const User *U,
284 ArrayRef<const Value *> Operands) {
285 auto isCastFoldedIntoLoad = [this](const CastInst *CI) -> bool {
286 if (!CI->isIntegerCast())
288 // Only extensions from an integer type shorter than 32-bit to i32
289 // can be folded into the load.
290 const DataLayout &DL = getDataLayout();
291 unsigned SBW = DL.getTypeSizeInBits(CI->getSrcTy());
292 unsigned DBW = DL.getTypeSizeInBits(CI->getDestTy());
293 if (DBW != 32 || SBW >= DBW)
296 const LoadInst *LI = dyn_cast<const LoadInst>(CI->getOperand(0));
297 // Technically, this code could allow multiple uses of the load, and
298 // check if all the uses are the same extension operation, but this
299 // should be sufficient for most cases.
300 return LI && LI->hasOneUse();
303 if (const CastInst *CI = dyn_cast<const CastInst>(U))
304 if (isCastFoldedIntoLoad(CI))
305 return TargetTransformInfo::TCC_Free;
306 return BaseT::getUserCost(U, Operands);
309 bool HexagonTTIImpl::shouldBuildLookupTables() const {
310 return EmitLookupTables;