1 //==- HexagonTargetTransformInfo.cpp - Hexagon specific TTI pass -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
9 /// This file implements a TargetTransformInfo analysis pass specific to the
10 /// Hexagon target machine. It uses the target's detailed information to provide
11 /// more precise answers to certain TTI queries, while letting the target
12 /// independent and default TTI implementations handle the rest.
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H
20 #include "HexagonSubtarget.h"
21 #include "HexagonTargetMachine.h"
22 #include "llvm/ADT/ArrayRef.h"
23 #include "llvm/Analysis/TargetTransformInfo.h"
24 #include "llvm/CodeGen/BasicTTIImpl.h"
25 #include "llvm/IR/Function.h"
30 class ScalarEvolution;
34 class HexagonTTIImpl : public BasicTTIImplBase<HexagonTTIImpl> {
35 using BaseT = BasicTTIImplBase<HexagonTTIImpl>;
36 using TTI = TargetTransformInfo;
40 const HexagonSubtarget &ST;
41 const HexagonTargetLowering &TLI;
43 const HexagonSubtarget *getST() const { return &ST; }
44 const HexagonTargetLowering *getTLI() const { return &TLI; }
47 bool isTypeForHVX(Type *VecTy) const;
49 // Returns the number of vector elements of Ty, if Ty is a vector type,
50 // or 1 if Ty is a scalar type. It is incorrect to call this function
51 // with any other type.
52 unsigned getTypeNumElements(Type *Ty) const;
55 explicit HexagonTTIImpl(const HexagonTargetMachine *TM, const Function &F)
56 : BaseT(TM, F.getParent()->getDataLayout()),
57 ST(*TM->getSubtargetImpl(F)), TLI(*ST.getTargetLowering()) {}
59 /// \name Scalar TTI Implementations
62 TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const;
64 // The Hexagon target can unroll loops with run-time trip counts.
65 void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
66 TTI::UnrollingPreferences &UP);
68 /// Bias LSR towards creating post-increment opportunities.
69 bool shouldFavorPostInc() const;
72 unsigned getPrefetchDistance() const;
73 unsigned getCacheLineSize() const;
77 /// \name Vector TTI Implementations
80 unsigned getNumberOfRegisters(bool vector) const;
81 unsigned getMaxInterleaveFactor(unsigned VF);
82 unsigned getRegisterBitWidth(bool Vector) const;
83 unsigned getMinVectorRegisterBitWidth() const;
84 unsigned getMinimumVF(unsigned ElemWidth) const;
86 bool shouldMaximizeVectorBandwidth(bool OptSize) const {
89 bool supportsEfficientVectorElementLoadStore() {
92 bool hasBranchDivergence() {
95 bool enableAggressiveInterleaving(bool LoopHasReductions) {
98 bool prefersVectorizedAddressing() {
101 bool enableInterleavedAccessVectorization() {
105 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
106 unsigned getOperandsScalarizationOverhead(ArrayRef<const Value*> Args,
108 unsigned getCallInstrCost(Function *F, Type *RetTy, ArrayRef<Type*> Tys);
109 unsigned getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
110 ArrayRef<Value*> Args, FastMathFlags FMF, unsigned VF);
111 unsigned getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
112 ArrayRef<Type*> Tys, FastMathFlags FMF,
113 unsigned ScalarizationCostPassed = UINT_MAX);
114 unsigned getAddressComputationCost(Type *Tp, ScalarEvolution *SE,
116 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
117 unsigned AddressSpace, const Instruction *I = nullptr);
118 unsigned getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
119 unsigned AddressSpace);
120 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
122 unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy, Value *Ptr,
123 bool VariableMask, unsigned Alignment);
124 unsigned getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
125 unsigned Factor, ArrayRef<unsigned> Indices, unsigned Alignment,
126 unsigned AddressSpace, bool UseMaskForCond = false,
127 bool UseMaskForGaps = false);
128 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
129 const Instruction *I);
130 unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
131 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
132 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
133 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
134 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
135 ArrayRef<const Value *> Args = ArrayRef<const Value *>());
136 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
137 const Instruction *I = nullptr);
138 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
140 unsigned getCFInstrCost(unsigned Opcode) {
146 int getUserCost(const User *U, ArrayRef<const Value *> Operands);
148 // Hexagon specific decision to generate a lookup table.
149 bool shouldBuildLookupTables() const;
152 } // end namespace llvm
153 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H