1 //===- HexagonVectorPrint.cpp - Generate vector printing instructions -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass adds the capability to generate pseudo vector/predicate register
11 // printing instructions. These pseudo instructions should be used with the
12 // simulator, NEVER on hardware.
14 //===----------------------------------------------------------------------===//
16 #include "HexagonInstrInfo.h"
17 #include "HexagonSubtarget.h"
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstr.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineOperand.h"
25 #include "llvm/CodeGen/TargetOpcodes.h"
26 #include "llvm/IR/DebugLoc.h"
27 #include "llvm/IR/InlineAsm.h"
28 #include "llvm/Pass.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/ErrorHandling.h"
32 #include "llvm/Support/raw_ostream.h"
38 #define DEBUG_TYPE "hexagon-vector-print"
40 static cl::opt<bool> TraceHexVectorStoresOnly("trace-hex-vector-stores-only",
41 cl::Hidden, cl::ZeroOrMore, cl::init(false),
42 cl::desc("Enables tracing of vector stores"));
46 FunctionPass *createHexagonVectorPrint();
47 void initializeHexagonVectorPrintPass(PassRegistry&);
49 } // end namespace llvm
53 class HexagonVectorPrint : public MachineFunctionPass {
54 const HexagonSubtarget *QST = nullptr;
55 const HexagonInstrInfo *QII = nullptr;
56 const HexagonRegisterInfo *QRI = nullptr;
61 HexagonVectorPrint() : MachineFunctionPass(ID) {
62 initializeHexagonVectorPrintPass(*PassRegistry::getPassRegistry());
65 StringRef getPassName() const override { return "Hexagon VectorPrint pass"; }
67 bool runOnMachineFunction(MachineFunction &Fn) override;
70 } // end anonymous namespace
72 char HexagonVectorPrint::ID = 0;
74 static bool isVecReg(unsigned Reg) {
75 return (Reg >= Hexagon::V0 && Reg <= Hexagon::V31)
76 || (Reg >= Hexagon::W0 && Reg <= Hexagon::W15)
77 || (Reg >= Hexagon::Q0 && Reg <= Hexagon::Q3);
80 static std::string getStringReg(unsigned R) {
81 if (R >= Hexagon::V0 && R <= Hexagon::V31) {
82 static const char* S[] = { "20", "21", "22", "23", "24", "25", "26", "27",
83 "28", "29", "2a", "2b", "2c", "2d", "2e", "2f",
84 "30", "31", "32", "33", "34", "35", "36", "37",
85 "38", "39", "3a", "3b", "3c", "3d", "3e", "3f"};
86 return S[R-Hexagon::V0];
88 if (R >= Hexagon::Q0 && R <= Hexagon::Q3) {
89 static const char* S[] = { "00", "01", "02", "03"};
90 return S[R-Hexagon::Q0];
93 llvm_unreachable("valid vreg");
96 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg,
97 MachineBasicBlock::instr_iterator I,
98 const DebugLoc &DL, const HexagonInstrInfo *QII,
99 MachineFunction &Fn) {
100 std::string VDescStr = ".long 0x1dffe0" + getStringReg(Reg);
101 const char *cstr = Fn.createExternalSymbolName(VDescStr);
102 unsigned ExtraInfo = InlineAsm::Extra_HasSideEffects;
103 BuildMI(*MBB, I, DL, QII->get(TargetOpcode::INLINEASM))
104 .addExternalSymbol(cstr)
108 static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg) {
109 if (MI.getNumOperands() < 1) return false;
110 // Vec load or compute.
111 if (MI.getOperand(0).isReg() && MI.getOperand(0).isDef()) {
112 Reg = MI.getOperand(0).getReg();
114 return !TraceHexVectorStoresOnly;
117 if (MI.mayStore() && MI.getNumOperands() >= 3 && MI.getOperand(2).isReg()) {
118 Reg = MI.getOperand(2).getReg();
122 // Vec store post increment.
123 if (MI.mayStore() && MI.getNumOperands() >= 4 && MI.getOperand(3).isReg()) {
124 Reg = MI.getOperand(3).getReg();
131 bool HexagonVectorPrint::runOnMachineFunction(MachineFunction &Fn) {
132 bool Changed = false;
133 QST = &Fn.getSubtarget<HexagonSubtarget>();
134 QRI = QST->getRegisterInfo();
135 QII = QST->getInstrInfo();
136 std::vector<MachineInstr *> VecPrintList;
138 for (auto &MI : MBB) {
140 MachineBasicBlock::instr_iterator MII = MI.getIterator();
141 for (++MII; MII != MBB.instr_end() && MII->isInsideBundle(); ++MII) {
142 if (MII->getNumOperands() < 1)
145 if (getInstrVecReg(*MII, Reg)) {
146 VecPrintList.push_back((&*MII));
147 LLVM_DEBUG(dbgs() << "Found vector reg inside bundle \n";
153 if (getInstrVecReg(MI, Reg)) {
154 VecPrintList.push_back(&MI);
155 LLVM_DEBUG(dbgs() << "Found vector reg \n"; MI.dump());
160 Changed = !VecPrintList.empty();
164 for (auto *I : VecPrintList) {
165 DebugLoc DL = I->getDebugLoc();
166 MachineBasicBlock *MBB = I->getParent();
167 LLVM_DEBUG(dbgs() << "Evaluating V MI\n"; I->dump());
169 if (!getInstrVecReg(*I, Reg))
170 llvm_unreachable("Need a vector reg");
171 MachineBasicBlock::instr_iterator MII = I->getIterator();
172 if (I->isInsideBundle()) {
173 LLVM_DEBUG(dbgs() << "add to end of bundle\n"; I->dump());
174 while (MBB->instr_end() != MII && MII->isInsideBundle())
177 LLVM_DEBUG(dbgs() << "add after instruction\n"; I->dump());
180 if (MBB->instr_end() == MII)
183 if (Reg >= Hexagon::V0 && Reg <= Hexagon::V31) {
184 LLVM_DEBUG(dbgs() << "adding dump for V" << Reg - Hexagon::V0 << '\n');
185 addAsmInstr(MBB, Reg, MII, DL, QII, Fn);
186 } else if (Reg >= Hexagon::W0 && Reg <= Hexagon::W15) {
187 LLVM_DEBUG(dbgs() << "adding dump for W" << Reg - Hexagon::W0 << '\n');
188 addAsmInstr(MBB, Hexagon::V0 + (Reg - Hexagon::W0) * 2 + 1,
190 addAsmInstr(MBB, Hexagon::V0 + (Reg - Hexagon::W0) * 2,
192 } else if (Reg >= Hexagon::Q0 && Reg <= Hexagon::Q3) {
193 LLVM_DEBUG(dbgs() << "adding dump for Q" << Reg - Hexagon::Q0 << '\n');
194 addAsmInstr(MBB, Reg, MII, DL, QII, Fn);
196 llvm_unreachable("Bad Vector reg");
201 //===----------------------------------------------------------------------===//
202 // Public Constructor Functions
203 //===----------------------------------------------------------------------===//
204 INITIALIZE_PASS(HexagonVectorPrint, "hexagon-vector-print",
205 "Hexagon VectorPrint pass", false, false)
207 FunctionPass *llvm::createHexagonVectorPrint() {
208 return new HexagonVectorPrint();