1 //===- HexagonMCInstrInfo.cpp - Utility functions on Hexagon MCInsts ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Utility functions for Hexagon specific MCInst queries
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
17 #include "HexagonMCExpr.h"
18 #include "llvm/MC/MCInst.h"
21 class HexagonMCChecker;
24 class MCSubtargetInfo;
26 enum class MemAccessSize;
28 class DuplexCandidate {
30 unsigned packetIndexI, packetIndexJ, iClass;
31 DuplexCandidate(unsigned i, unsigned j, unsigned iClass)
32 : packetIndexI(i), packetIndexJ(j), iClass(iClass) {}
35 class PacketIterator {
36 MCInstrInfo const &MCII;
37 MCInst::const_iterator BundleCurrent;
38 MCInst::const_iterator BundleEnd;
39 MCInst::const_iterator DuplexCurrent;
40 MCInst::const_iterator DuplexEnd;
43 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst);
44 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst, std::nullptr_t);
45 PacketIterator &operator++();
46 MCInst const &operator*() const;
47 bool operator==(PacketIterator const &Other) const;
48 bool operator!=(PacketIterator const &Other) const {
49 return !(*this == Other);
52 } // namespace Hexagon
53 namespace HexagonMCInstrInfo {
54 size_t const innerLoopOffset = 0;
55 int64_t const innerLoopMask = 1 << innerLoopOffset;
57 size_t const outerLoopOffset = 1;
58 int64_t const outerLoopMask = 1 << outerLoopOffset;
60 // do not reorder memory load/stores by default load/stores are re-ordered
61 // and by default loads can be re-ordered
62 size_t const memReorderDisabledOffset = 2;
63 int64_t const memReorderDisabledMask = 1 << memReorderDisabledOffset;
65 // allow re-ordering of memory stores by default stores cannot be re-ordered
66 size_t const memStoreReorderEnabledOffset = 3;
67 int64_t const memStoreReorderEnabledMask = 1 << memStoreReorderEnabledOffset;
69 size_t const bundleInstructionsOffset = 1;
71 void addConstant(MCInst &MI, uint64_t Value, MCContext &Context);
72 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
75 // Returns a iterator range of instructions in this bundle
76 iterator_range<Hexagon::PacketIterator>
77 bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI);
78 iterator_range<MCInst::const_iterator> bundleInstructions(MCInst const &MCI);
80 // Returns the number of instructions in the bundle
81 size_t bundleSize(MCInst const &MCI);
83 // Put the packet in to canonical form, compound, duplex, pad, and shuffle
84 bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
85 MCContext &Context, MCInst &MCB,
86 HexagonMCChecker *Checker);
88 // Create a duplex instruction given the two subinsts
89 MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0,
91 MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst,
94 // Convert this instruction in to a duplex subinst
95 MCInst deriveSubInst(MCInst const &Inst);
97 // Clamp off upper 26 bits of extendable operand for emission
98 void clampExtended(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI);
100 MCInst createBundle();
102 // Return the extender for instruction at Index or nullptr if none
103 MCInst const *extenderForIndex(MCInst const &MCB, size_t Index);
104 void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
107 // Return memory access size
108 HexagonII::MemAccessSize getAccessSize(MCInstrInfo const &MCII,
110 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
112 // Return which duplex group this instruction belongs to
113 unsigned getDuplexCandidateGroup(MCInst const &MI);
115 // Return a list of all possible instruction duplex combinations
116 SmallVector<DuplexCandidate, 8>
117 getDuplexPossibilties(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
119 unsigned getDuplexRegisterNumbering(unsigned Reg);
121 MCExpr const &getExpr(MCExpr const &Expr);
123 // Return the index of the extendable operand
124 unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI);
126 // Return a reference to the extendable operand
127 MCOperand const &getExtendableOperand(MCInstrInfo const &MCII,
130 // Return the implicit alignment of the extendable operand
131 unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI);
133 // Return the number of logical bits of the extendable operand
134 unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI);
136 // Return the max value that a constant extendable operand can have
137 // without being extended.
138 int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI);
140 // Return the min value that a constant extendable operand can have
141 // without being extended.
142 int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI);
144 // Return instruction name
145 StringRef getName(MCInstrInfo const &MCII, MCInst const &MCI);
147 // Return the operand index for the new value.
148 unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI);
150 // Return the operand that consumes or produces a new value.
151 MCOperand const &getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI);
152 unsigned short getNewValueOp2(MCInstrInfo const &MCII, MCInst const &MCI);
153 MCOperand const &getNewValueOperand2(MCInstrInfo const &MCII,
156 // Return the Hexagon ISA class for the insn.
157 unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI);
159 /// Return the slots used by the insn.
160 unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
162 unsigned getOtherReservedSlots(MCInstrInfo const &MCII,
163 MCSubtargetInfo const &STI, MCInst const &MCI);
164 bool hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI);
166 // Does the packet have an extender for the instruction at Index
167 bool hasExtenderForIndex(MCInst const &MCB, size_t Index);
169 bool hasImmExt(MCInst const &MCI);
171 // Return whether the instruction is a legal new-value producer.
172 bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
173 bool hasNewValue2(MCInstrInfo const &MCII, MCInst const &MCI);
174 unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb);
176 int64_t minConstant(MCInst const &MCI, size_t Index);
177 template <unsigned N, unsigned S>
178 bool inRange(MCInst const &MCI, size_t Index) {
179 return isShiftedUInt<N, S>(minConstant(MCI, Index));
181 template <unsigned N, unsigned S>
182 bool inSRange(MCInst const &MCI, size_t Index) {
183 return isShiftedInt<N, S>(minConstant(MCI, Index));
185 template <unsigned N> bool inRange(MCInst const &MCI, size_t Index) {
186 return isUInt<N>(minConstant(MCI, Index));
189 // Return the instruction at Index
190 MCInst const &instruction(MCInst const &MCB, size_t Index);
191 bool isAccumulator(MCInstrInfo const &MCII, MCInst const &MCI);
193 // Returns whether this MCInst is a wellformed bundle
194 bool isBundle(MCInst const &MCI);
196 // Return whether the insn is an actual insn.
197 bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI);
198 bool isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI);
199 bool isCompound(MCInstrInfo const &MCII, MCInst const &MCI);
201 // Return whether the instruction needs to be constant extended.
202 bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI);
203 bool isCVINew(MCInstrInfo const &MCII, MCInst const &MCI);
205 // Is this double register suitable for use in a duplex subinst
206 bool isDblRegForSubInst(unsigned Reg);
208 // Is this a duplex instruction
209 bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI);
211 // Can these instructions be duplexed
212 bool isDuplexPair(MCInst const &MIa, MCInst const &MIb);
214 // Can these duplex classes be combine in to a duplex instruction
215 bool isDuplexPairMatch(unsigned Ga, unsigned Gb);
217 // Return true if the insn may be extended based on the operand value.
218 bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI);
220 // Return whether the instruction must be always extended.
221 bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI);
223 /// Return whether it is a floating-point insn.
224 bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI);
226 // Returns whether this instruction is an immediate extender
227 bool isImmext(MCInst const &MCI);
229 // Returns whether this bundle is an endloop0
230 bool isInnerLoop(MCInst const &MCI);
232 // Is this an integer register
233 bool isIntReg(unsigned Reg);
235 // Is this register suitable for use in a duplex subinst
236 bool isIntRegForSubInst(unsigned Reg);
237 bool isMemReorderDisabled(MCInst const &MCI);
238 bool isMemStoreReorderEnabled(MCInst const &MCI);
240 // Return whether the insn is a new-value consumer.
241 bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
242 bool isOpExtendable(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short);
244 // Can these two instructions be duplexed
245 bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa,
246 bool ExtendedA, MCInst const &MIb, bool ExtendedB,
247 bool bisReversable, MCSubtargetInfo const &STI);
249 // Returns whether this bundle is an endloop1
250 bool isOuterLoop(MCInst const &MCI);
252 // Return whether this instruction is predicated
253 bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI);
254 bool isPredicateLate(MCInstrInfo const &MCII, MCInst const &MCI);
255 bool isPredicatedNew(MCInstrInfo const &MCII, MCInst const &MCI);
257 // Return whether the predicate sense is true
258 bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI);
260 // Is this a predicate register
261 bool isPredReg(unsigned Reg);
263 // Return whether the insn is a prefix.
264 bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI);
266 // Return whether the insn is solo, i.e., cannot be in a packet.
267 bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI);
269 /// Return whether the insn can be packaged only with A and X-type insns.
270 bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI);
272 /// Return whether the insn can be packaged only with an A-type insn in slot #1.
273 bool isSoloAin1(MCInstrInfo const &MCII, MCInst const &MCI);
274 bool isSubInstruction(MCInst const &MCI);
275 bool isVector(MCInstrInfo const &MCII, MCInst const &MCI);
276 bool mustExtend(MCExpr const &Expr);
277 bool mustNotExtend(MCExpr const &Expr);
279 // Pad the bundle with nops to satisfy endloop requirements
280 void padEndloop(MCInst &MCI, MCContext &Context);
281 bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI);
283 // Replace the instructions inside MCB, represented by Candidate
284 void replaceDuplex(MCContext &Context, MCInst &MCI, DuplexCandidate Candidate);
286 bool s27_2_reloc(MCExpr const &Expr);
287 // Marks a bundle as endloop0
288 void setInnerLoop(MCInst &MCI);
289 void setMemReorderDisabled(MCInst &MCI);
290 void setMemStoreReorderEnabled(MCInst &MCI);
291 void setMustExtend(MCExpr const &Expr, bool Val = true);
292 void setMustNotExtend(MCExpr const &Expr, bool Val = true);
293 void setS27_2_reloc(MCExpr const &Expr, bool Val = true);
295 // Marks a bundle as endloop1
296 void setOuterLoop(MCInst &MCI);
298 // Would duplexing this instruction create a requirement to extend
299 bool subInstWouldBeExtended(MCInst const &potentialDuplex);
300 unsigned SubregisterBit(unsigned Consumer, unsigned Producer,
303 // Attempt to find and replace compound pairs
304 void tryCompound(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
305 MCContext &Context, MCInst &MCI);
306 } // namespace HexagonMCInstrInfo
309 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H