1 //===--- RDFCopy.cpp ------------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // RDF-based copy propagation.
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/CodeGen/MachineDominators.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/CodeGen/MachineRegisterInfo.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/Target/TargetInstrInfo.h"
20 #include "llvm/Target/TargetRegisterInfo.h"
25 static cl::opt<unsigned> CpLimit("rdf-cp-limit", cl::init(0), cl::Hidden);
26 static unsigned CpCount = 0;
29 bool CopyPropagation::interpretAsCopy(const MachineInstr *MI, EqualityMap &EM) {
30 unsigned Opc = MI->getOpcode();
32 case TargetOpcode::COPY: {
33 const MachineOperand &Dst = MI->getOperand(0);
34 const MachineOperand &Src = MI->getOperand(1);
35 RegisterRef DstR = DFG.makeRegRef(Dst.getReg(), Dst.getSubReg());
36 RegisterRef SrcR = DFG.makeRegRef(Src.getReg(), Src.getSubReg());
37 assert(TargetRegisterInfo::isPhysicalRegister(DstR.Reg));
38 assert(TargetRegisterInfo::isPhysicalRegister(SrcR.Reg));
39 const TargetRegisterInfo &TRI = DFG.getTRI();
40 if (TRI.getMinimalPhysRegClass(DstR.Reg) !=
41 TRI.getMinimalPhysRegClass(SrcR.Reg))
43 EM.insert(std::make_pair(DstR, SrcR));
46 case TargetOpcode::REG_SEQUENCE:
47 llvm_unreachable("Unexpected REG_SEQUENCE");
53 void CopyPropagation::recordCopy(NodeAddr<StmtNode*> SA, EqualityMap &EM) {
54 CopyMap.insert(std::make_pair(SA.Id, EM));
55 Copies.push_back(SA.Id);
58 auto FS = DefM.find(I.second.Reg);
59 if (FS == DefM.end() || FS->second.empty())
60 continue; // Undefined source
61 RDefMap[I.second][SA.Id] = FS->second.top()->Id;
62 // Insert DstR into the map.
68 void CopyPropagation::updateMap(NodeAddr<InstrNode*> IA) {
70 for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG))
71 RRs.insert(RA.Addr->getRegRef(DFG));
73 for (auto &R : RDefMap) {
74 if (!RRs.count(R.first))
82 for (auto &R : RDefMap) {
83 if (!RRs.count(R.first))
85 auto F = DefM.find(R.first.Reg);
86 if (F == DefM.end() || F->second.empty())
88 R.second[IA.Id] = F->second.top()->Id;
93 bool CopyPropagation::scanBlock(MachineBasicBlock *B) {
95 auto BA = DFG.getFunc().Addr->findBlock(B, DFG);
96 DFG.markBlock(BA.Id, DefM);
98 for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) {
99 if (DFG.IsCode<NodeAttrs::Stmt>(IA)) {
100 NodeAddr<StmtNode*> SA = IA;
102 if (interpretAsCopy(SA.Addr->getCode(), EM))
107 DFG.pushDefs(IA, DefM);
110 MachineDomTreeNode *N = MDT.getNode(B);
112 Changed |= scanBlock(I->getBlock());
114 DFG.releaseBlock(BA.Id, DefM);
119 bool CopyPropagation::run() {
120 scanBlock(&DFG.getMF().front());
123 dbgs() << "Copies:\n";
124 for (auto I : Copies) {
125 dbgs() << "Instr: " << *DFG.addr<StmtNode*>(I).Addr->getCode();
127 for (auto J : CopyMap[I])
128 dbgs() << ' ' << Print<RegisterRef>(J.first, DFG) << '='
129 << Print<RegisterRef>(J.second, DFG);
132 dbgs() << "\nRDef map:\n";
133 for (auto R : RDefMap) {
134 dbgs() << Print<RegisterRef>(R.first, DFG) << " -> {";
135 for (auto &M : R.second)
136 dbgs() << ' ' << Print<NodeId>(M.first, DFG) << ':'
137 << Print<NodeId>(M.second, DFG);
142 bool Changed = false;
144 bool HasLimit = CpLimit.getNumOccurrences() > 0;
147 auto MinPhysReg = [this] (RegisterRef RR) -> unsigned {
148 const TargetRegisterInfo &TRI = DFG.getTRI();
149 const TargetRegisterClass &RC = *TRI.getMinimalPhysRegClass(RR.Reg);
150 if ((RC.LaneMask & RR.Mask) == RC.LaneMask)
152 for (MCSubRegIndexIterator S(RR.Reg, &TRI); S.isValid(); ++S)
153 if (RR.Mask == TRI.getSubRegIndexLaneMask(S.getSubRegIndex()))
154 return S.getSubReg();
155 llvm_unreachable("Should have found a register");
159 for (auto C : Copies) {
161 if (HasLimit && CpCount >= CpLimit)
164 auto SA = DFG.addr<InstrNode*>(C);
165 auto FS = CopyMap.find(SA.Id);
166 if (FS == CopyMap.end())
169 EqualityMap &EM = FS->second;
170 for (NodeAddr<DefNode*> DA : SA.Addr->members_if(DFG.IsDef, DFG)) {
171 RegisterRef DR = DA.Addr->getRegRef(DFG);
172 auto FR = EM.find(DR);
175 RegisterRef SR = FR->second;
179 auto &RDefSR = RDefMap[SR];
180 NodeId RDefSR_SA = RDefSR[SA.Id];
182 for (NodeId N = DA.Addr->getReachedUse(), NextN; N; N = NextN) {
183 auto UA = DFG.addr<UseNode*>(N);
184 NextN = UA.Addr->getSibling();
185 uint16_t F = UA.Addr->getFlags();
186 if ((F & NodeAttrs::PhiRef) || (F & NodeAttrs::Fixed))
188 if (UA.Addr->getRegRef(DFG) != DR)
191 NodeAddr<InstrNode*> IA = UA.Addr->getOwner(DFG);
192 assert(DFG.IsCode<NodeAttrs::Stmt>(IA));
193 if (RDefSR[IA.Id] != RDefSR_SA)
196 MachineOperand &Op = UA.Addr->getOp();
200 dbgs() << "Can replace " << Print<RegisterRef>(DR, DFG)
201 << " with " << Print<RegisterRef>(SR, DFG) << " in "
202 << *NodeAddr<StmtNode*>(IA).Addr->getCode();
205 unsigned NewReg = MinPhysReg(SR);
208 DFG.unlinkUse(UA, false);
209 if (RDefSR_SA != 0) {
210 UA.Addr->linkToDef(UA.Id, DFG.addr<DefNode*>(RDefSR_SA));
212 UA.Addr->setReachingDef(0);
213 UA.Addr->setSibling(0);
218 if (HasLimit && CpCount >= CpLimit)
223 auto FC = CopyMap.find(IA.Id);
224 if (FC != CopyMap.end()) {
225 // Update the EM map in the copy's entry.
226 auto &M = FC->second;
234 } // for (N in reached-uses)
235 } // for (DA in defs)
236 } // for (C in Copies)