1 //===--- RDFCopy.cpp ------------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // RDF-based copy propagation.
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/CodeGen/MachineDominators.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/CodeGen/MachineRegisterInfo.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/Target/TargetInstrInfo.h"
20 #include "llvm/Target/TargetRegisterInfo.h"
25 static cl::opt<unsigned> CpLimit("rdf-cp-limit", cl::init(0), cl::Hidden);
26 static unsigned CpCount = 0;
29 bool CopyPropagation::interpretAsCopy(const MachineInstr *MI, EqualityMap &EM) {
30 unsigned Opc = MI->getOpcode();
32 case TargetOpcode::COPY: {
33 const MachineOperand &Dst = MI->getOperand(0);
34 const MachineOperand &Src = MI->getOperand(1);
35 RegisterRef DstR = { Dst.getReg(), Dst.getSubReg() };
36 RegisterRef SrcR = { Src.getReg(), Src.getSubReg() };
37 if (TargetRegisterInfo::isVirtualRegister(DstR.Reg)) {
38 if (!TargetRegisterInfo::isVirtualRegister(SrcR.Reg))
40 MachineRegisterInfo &MRI = DFG.getMF().getRegInfo();
41 if (MRI.getRegClass(DstR.Reg) != MRI.getRegClass(SrcR.Reg))
43 } else if (TargetRegisterInfo::isPhysicalRegister(DstR.Reg)) {
44 if (!TargetRegisterInfo::isPhysicalRegister(SrcR.Reg))
46 const TargetRegisterInfo &TRI = DFG.getTRI();
47 if (TRI.getMinimalPhysRegClass(DstR.Reg) !=
48 TRI.getMinimalPhysRegClass(SrcR.Reg))
51 // Copy between some unknown objects.
54 EM.insert(std::make_pair(DstR, SrcR));
57 case TargetOpcode::REG_SEQUENCE: {
58 const MachineOperand &Dst = MI->getOperand(0);
59 RegisterRef DefR = { Dst.getReg(), Dst.getSubReg() };
60 SmallVector<TargetInstrInfo::RegSubRegPairAndIdx,2> Inputs;
61 const TargetInstrInfo &TII = DFG.getTII();
62 if (!TII.getRegSequenceInputs(*MI, 0, Inputs))
64 for (auto I : Inputs) {
65 unsigned S = DFG.getTRI().composeSubRegIndices(DefR.Sub, I.SubIdx);
66 RegisterRef DR = { DefR.Reg, S };
67 RegisterRef SR = { I.Reg, I.SubReg };
68 EM.insert(std::make_pair(DR, SR));
77 void CopyPropagation::recordCopy(NodeAddr<StmtNode*> SA, EqualityMap &EM) {
78 CopyMap.insert(std::make_pair(SA.Id, EM));
79 Copies.push_back(SA.Id);
82 auto FS = DefM.find(I.second);
83 if (FS == DefM.end() || FS->second.empty())
84 continue; // Undefined source
85 RDefMap[I.second][SA.Id] = FS->second.top()->Id;
86 // Insert DstR into the map.
92 void CopyPropagation::updateMap(NodeAddr<InstrNode*> IA) {
94 for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG))
95 RRs.insert(RA.Addr->getRegRef());
97 for (auto &R : RDefMap) {
98 if (!RRs.count(R.first))
106 for (auto &R : RDefMap) {
107 if (!RRs.count(R.first))
109 auto F = DefM.find(R.first);
110 if (F == DefM.end() || F->second.empty())
112 R.second[IA.Id] = F->second.top()->Id;
117 bool CopyPropagation::scanBlock(MachineBasicBlock *B) {
118 bool Changed = false;
119 auto BA = DFG.getFunc().Addr->findBlock(B, DFG);
120 DFG.markBlock(BA.Id, DefM);
122 for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) {
123 if (DFG.IsCode<NodeAttrs::Stmt>(IA)) {
124 NodeAddr<StmtNode*> SA = IA;
126 if (interpretAsCopy(SA.Addr->getCode(), EM))
131 DFG.pushDefs(IA, DefM);
134 MachineDomTreeNode *N = MDT.getNode(B);
136 Changed |= scanBlock(I->getBlock());
138 DFG.releaseBlock(BA.Id, DefM);
143 bool CopyPropagation::run() {
144 scanBlock(&DFG.getMF().front());
147 dbgs() << "Copies:\n";
148 for (auto I : Copies) {
149 dbgs() << "Instr: " << *DFG.addr<StmtNode*>(I).Addr->getCode();
151 for (auto J : CopyMap[I])
152 dbgs() << ' ' << Print<RegisterRef>(J.first, DFG) << '='
153 << Print<RegisterRef>(J.second, DFG);
156 dbgs() << "\nRDef map:\n";
157 for (auto R : RDefMap) {
158 dbgs() << Print<RegisterRef>(R.first, DFG) << " -> {";
159 for (auto &M : R.second)
160 dbgs() << ' ' << Print<NodeId>(M.first, DFG) << ':'
161 << Print<NodeId>(M.second, DFG);
166 bool Changed = false;
168 bool HasLimit = CpLimit.getNumOccurrences() > 0;
171 for (auto C : Copies) {
173 if (HasLimit && CpCount >= CpLimit)
176 auto SA = DFG.addr<InstrNode*>(C);
177 auto FS = CopyMap.find(SA.Id);
178 if (FS == CopyMap.end())
181 EqualityMap &EM = FS->second;
182 for (NodeAddr<DefNode*> DA : SA.Addr->members_if(DFG.IsDef, DFG)) {
183 RegisterRef DR = DA.Addr->getRegRef();
184 auto FR = EM.find(DR);
187 RegisterRef SR = FR->second;
191 auto &RDefSR = RDefMap[SR];
192 NodeId RDefSR_SA = RDefSR[SA.Id];
194 for (NodeId N = DA.Addr->getReachedUse(), NextN; N; N = NextN) {
195 auto UA = DFG.addr<UseNode*>(N);
196 NextN = UA.Addr->getSibling();
197 uint16_t F = UA.Addr->getFlags();
198 if ((F & NodeAttrs::PhiRef) || (F & NodeAttrs::Fixed))
200 if (UA.Addr->getRegRef() != DR)
203 NodeAddr<InstrNode*> IA = UA.Addr->getOwner(DFG);
204 assert(DFG.IsCode<NodeAttrs::Stmt>(IA));
205 if (RDefSR[IA.Id] != RDefSR_SA)
208 MachineOperand &Op = UA.Addr->getOp();
212 dbgs() << "Can replace " << Print<RegisterRef>(DR, DFG)
213 << " with " << Print<RegisterRef>(SR, DFG) << " in "
214 << *NodeAddr<StmtNode*>(IA).Addr->getCode();
218 Op.setSubReg(SR.Sub);
219 DFG.unlinkUse(UA, false);
220 if (RDefSR_SA != 0) {
221 UA.Addr->linkToDef(UA.Id, DFG.addr<DefNode*>(RDefSR_SA));
223 UA.Addr->setReachingDef(0);
224 UA.Addr->setSibling(0);
229 if (HasLimit && CpCount >= CpLimit)
234 auto FC = CopyMap.find(IA.Id);
235 if (FC != CopyMap.end()) {
236 // Update the EM map in the copy's entry.
237 auto &M = FC->second;
245 } // for (N in reached-uses)
246 } // for (DA in defs)
247 } // for (C in Copies)