1 //===--- RDFGraph.cpp -----------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Target-independent, SSA-based data flow graph for register data flow (RDF).
13 #include "llvm/ADT/SetVector.h"
14 #include "llvm/ADT/STLExtras.h"
15 #include "llvm/CodeGen/MachineBasicBlock.h"
16 #include "llvm/CodeGen/MachineDominanceFrontier.h"
17 #include "llvm/CodeGen/MachineDominators.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/MachineOperand.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/IR/Function.h"
23 #include "llvm/MC/LaneBitmask.h"
24 #include "llvm/MC/MCInstrDesc.h"
25 #include "llvm/MC/MCRegisterInfo.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/Target/TargetInstrInfo.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
42 // Printing functions. Have them here first, so that the rest of the code
47 raw_ostream &operator<< (raw_ostream &OS, const PrintLaneMaskOpt &P) {
49 OS << ':' << PrintLaneMask(P.Mask);
54 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterRef> &P) {
55 auto &TRI = P.G.getTRI();
56 if (P.Obj.Reg > 0 && P.Obj.Reg < TRI.getNumRegs())
57 OS << TRI.getName(P.Obj.Reg);
59 OS << '#' << P.Obj.Reg;
60 OS << PrintLaneMaskOpt(P.Obj.Mask);
65 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeId> &P) {
66 auto NA = P.G.addr<NodeBase*>(P.Obj);
67 uint16_t Attrs = NA.Addr->getAttrs();
68 uint16_t Kind = NodeAttrs::kind(Attrs);
69 uint16_t Flags = NodeAttrs::flags(Attrs);
70 switch (NodeAttrs::type(Attrs)) {
73 case NodeAttrs::Func: OS << 'f'; break;
74 case NodeAttrs::Block: OS << 'b'; break;
75 case NodeAttrs::Stmt: OS << 's'; break;
76 case NodeAttrs::Phi: OS << 'p'; break;
77 default: OS << "c?"; break;
81 if (Flags & NodeAttrs::Undef)
83 if (Flags & NodeAttrs::Dead)
85 if (Flags & NodeAttrs::Preserving)
87 if (Flags & NodeAttrs::Clobbering)
90 case NodeAttrs::Use: OS << 'u'; break;
91 case NodeAttrs::Def: OS << 'd'; break;
92 case NodeAttrs::Block: OS << 'b'; break;
93 default: OS << "r?"; break;
101 if (Flags & NodeAttrs::Shadow)
106 static void printRefHeader(raw_ostream &OS, const NodeAddr<RefNode*> RA,
107 const DataFlowGraph &G) {
108 OS << Print<NodeId>(RA.Id, G) << '<'
109 << Print<RegisterRef>(RA.Addr->getRegRef(G), G) << '>';
110 if (RA.Addr->getFlags() & NodeAttrs::Fixed)
115 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<DefNode*>> &P) {
116 printRefHeader(OS, P.Obj, P.G);
118 if (NodeId N = P.Obj.Addr->getReachingDef())
119 OS << Print<NodeId>(N, P.G);
121 if (NodeId N = P.Obj.Addr->getReachedDef())
122 OS << Print<NodeId>(N, P.G);
124 if (NodeId N = P.Obj.Addr->getReachedUse())
125 OS << Print<NodeId>(N, P.G);
127 if (NodeId N = P.Obj.Addr->getSibling())
128 OS << Print<NodeId>(N, P.G);
133 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<UseNode*>> &P) {
134 printRefHeader(OS, P.Obj, P.G);
136 if (NodeId N = P.Obj.Addr->getReachingDef())
137 OS << Print<NodeId>(N, P.G);
139 if (NodeId N = P.Obj.Addr->getSibling())
140 OS << Print<NodeId>(N, P.G);
145 raw_ostream &operator<< (raw_ostream &OS,
146 const Print<NodeAddr<PhiUseNode*>> &P) {
147 printRefHeader(OS, P.Obj, P.G);
149 if (NodeId N = P.Obj.Addr->getReachingDef())
150 OS << Print<NodeId>(N, P.G);
152 if (NodeId N = P.Obj.Addr->getPredecessor())
153 OS << Print<NodeId>(N, P.G);
155 if (NodeId N = P.Obj.Addr->getSibling())
156 OS << Print<NodeId>(N, P.G);
161 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<RefNode*>> &P) {
162 switch (P.Obj.Addr->getKind()) {
164 OS << PrintNode<DefNode*>(P.Obj, P.G);
167 if (P.Obj.Addr->getFlags() & NodeAttrs::PhiRef)
168 OS << PrintNode<PhiUseNode*>(P.Obj, P.G);
170 OS << PrintNode<UseNode*>(P.Obj, P.G);
177 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeList> &P) {
178 unsigned N = P.Obj.size();
179 for (auto I : P.Obj) {
180 OS << Print<NodeId>(I.Id, P.G);
188 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeSet> &P) {
189 unsigned N = P.Obj.size();
190 for (auto I : P.Obj) {
191 OS << Print<NodeId>(I, P.G);
200 template <typename T>
202 PrintListV(const NodeList &L, const DataFlowGraph &G) : List(L), G(G) {}
205 const NodeList &List;
206 const DataFlowGraph &G;
209 template <typename T>
210 raw_ostream &operator<< (raw_ostream &OS, const PrintListV<T> &P) {
211 unsigned N = P.List.size();
212 for (NodeAddr<T> A : P.List) {
213 OS << PrintNode<T>(A, P.G);
220 } // end anonymous namespace
223 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<PhiNode*>> &P) {
224 OS << Print<NodeId>(P.Obj.Id, P.G) << ": phi ["
225 << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']';
230 raw_ostream &operator<< (raw_ostream &OS,
231 const Print<NodeAddr<StmtNode*>> &P) {
232 const MachineInstr &MI = *P.Obj.Addr->getCode();
233 unsigned Opc = MI.getOpcode();
234 OS << Print<NodeId>(P.Obj.Id, P.G) << ": " << P.G.getTII().getName(Opc);
235 // Print the target for calls and branches (for readability).
236 if (MI.isCall() || MI.isBranch()) {
237 MachineInstr::const_mop_iterator T =
238 llvm::find_if(MI.operands(),
239 [] (const MachineOperand &Op) -> bool {
240 return Op.isMBB() || Op.isGlobal() || Op.isSymbol();
242 if (T != MI.operands_end()) {
245 OS << "BB#" << T->getMBB()->getNumber();
246 else if (T->isGlobal())
247 OS << T->getGlobal()->getName();
248 else if (T->isSymbol())
249 OS << T->getSymbolName();
252 OS << " [" << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']';
257 raw_ostream &operator<< (raw_ostream &OS,
258 const Print<NodeAddr<InstrNode*>> &P) {
259 switch (P.Obj.Addr->getKind()) {
261 OS << PrintNode<PhiNode*>(P.Obj, P.G);
263 case NodeAttrs::Stmt:
264 OS << PrintNode<StmtNode*>(P.Obj, P.G);
267 OS << "instr? " << Print<NodeId>(P.Obj.Id, P.G);
274 raw_ostream &operator<< (raw_ostream &OS,
275 const Print<NodeAddr<BlockNode*>> &P) {
276 MachineBasicBlock *BB = P.Obj.Addr->getCode();
277 unsigned NP = BB->pred_size();
279 auto PrintBBs = [&OS] (std::vector<int> Ns) -> void {
280 unsigned N = Ns.size();
288 OS << Print<NodeId>(P.Obj.Id, P.G) << ": --- BB#" << BB->getNumber()
289 << " --- preds(" << NP << "): ";
290 for (MachineBasicBlock *B : BB->predecessors())
291 Ns.push_back(B->getNumber());
294 unsigned NS = BB->succ_size();
295 OS << " succs(" << NS << "): ";
297 for (MachineBasicBlock *B : BB->successors())
298 Ns.push_back(B->getNumber());
302 for (auto I : P.Obj.Addr->members(P.G))
303 OS << PrintNode<InstrNode*>(I, P.G) << '\n';
308 raw_ostream &operator<< (raw_ostream &OS,
309 const Print<NodeAddr<FuncNode*>> &P) {
310 OS << "DFG dump:[\n" << Print<NodeId>(P.Obj.Id, P.G) << ": Function: "
311 << P.Obj.Addr->getCode()->getName() << '\n';
312 for (auto I : P.Obj.Addr->members(P.G))
313 OS << PrintNode<BlockNode*>(I, P.G) << '\n';
319 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterSet> &P) {
322 OS << ' ' << Print<RegisterRef>(I, P.G);
328 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterAggr> &P) {
334 raw_ostream &operator<< (raw_ostream &OS,
335 const Print<DataFlowGraph::DefStack> &P) {
336 for (auto I = P.Obj.top(), E = P.Obj.bottom(); I != E; ) {
337 OS << Print<NodeId>(I->Id, P.G)
338 << '<' << Print<RegisterRef>(I->Addr->getRegRef(P.G), P.G) << '>';
346 } // end namespace rdf
347 } // end namespace llvm
349 // Node allocation functions.
351 // Node allocator is like a slab memory allocator: it allocates blocks of
352 // memory in sizes that are multiples of the size of a node. Each block has
353 // the same size. Nodes are allocated from the currently active block, and
354 // when it becomes full, a new one is created.
355 // There is a mapping scheme between node id and its location in a block,
356 // and within that block is described in the header file.
358 void NodeAllocator::startNewBlock() {
359 void *T = MemPool.Allocate(NodesPerBlock*NodeMemSize, NodeMemSize);
360 char *P = static_cast<char*>(T);
362 // Check if the block index is still within the allowed range, i.e. less
363 // than 2^N, where N is the number of bits in NodeId for the block index.
364 // BitsPerIndex is the number of bits per node index.
365 assert((Blocks.size() < ((size_t)1 << (8*sizeof(NodeId)-BitsPerIndex))) &&
366 "Out of bits for block index");
370 bool NodeAllocator::needNewBlock() {
374 char *ActiveBegin = Blocks.back();
375 uint32_t Index = (ActiveEnd-ActiveBegin)/NodeMemSize;
376 return Index >= NodesPerBlock;
379 NodeAddr<NodeBase*> NodeAllocator::New() {
383 uint32_t ActiveB = Blocks.size()-1;
384 uint32_t Index = (ActiveEnd - Blocks[ActiveB])/NodeMemSize;
385 NodeAddr<NodeBase*> NA = { reinterpret_cast<NodeBase*>(ActiveEnd),
386 makeId(ActiveB, Index) };
387 ActiveEnd += NodeMemSize;
391 NodeId NodeAllocator::id(const NodeBase *P) const {
392 uintptr_t A = reinterpret_cast<uintptr_t>(P);
393 for (unsigned i = 0, n = Blocks.size(); i != n; ++i) {
394 uintptr_t B = reinterpret_cast<uintptr_t>(Blocks[i]);
395 if (A < B || A >= B + NodesPerBlock*NodeMemSize)
397 uint32_t Idx = (A-B)/NodeMemSize;
398 return makeId(i, Idx);
400 llvm_unreachable("Invalid node address");
403 void NodeAllocator::clear() {
409 // Insert node NA after "this" in the circular chain.
410 void NodeBase::append(NodeAddr<NodeBase*> NA) {
412 // If NA is already "next", do nothing.
419 // Fundamental node manipulator functions.
421 // Obtain the register reference from a reference node.
422 RegisterRef RefNode::getRegRef(const DataFlowGraph &G) const {
423 assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref);
424 if (NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef)
425 return G.unpack(Ref.PR);
426 assert(Ref.Op != nullptr);
427 return G.makeRegRef(*Ref.Op);
430 // Set the register reference in the reference node directly (for references
432 void RefNode::setRegRef(RegisterRef RR, DataFlowGraph &G) {
433 assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref);
434 assert(NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef);
438 // Set the register reference in the reference node based on a machine
439 // operand (for references in statement nodes).
440 void RefNode::setRegRef(MachineOperand *Op, DataFlowGraph &G) {
441 assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref);
442 assert(!(NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef));
447 // Get the owner of a given reference node.
448 NodeAddr<NodeBase*> RefNode::getOwner(const DataFlowGraph &G) {
449 NodeAddr<NodeBase*> NA = G.addr<NodeBase*>(getNext());
451 while (NA.Addr != this) {
452 if (NA.Addr->getType() == NodeAttrs::Code)
454 NA = G.addr<NodeBase*>(NA.Addr->getNext());
456 llvm_unreachable("No owner in circular list");
459 // Connect the def node to the reaching def node.
460 void DefNode::linkToDef(NodeId Self, NodeAddr<DefNode*> DA) {
462 Ref.Sib = DA.Addr->getReachedDef();
463 DA.Addr->setReachedDef(Self);
466 // Connect the use node to the reaching def node.
467 void UseNode::linkToDef(NodeId Self, NodeAddr<DefNode*> DA) {
469 Ref.Sib = DA.Addr->getReachedUse();
470 DA.Addr->setReachedUse(Self);
473 // Get the first member of the code node.
474 NodeAddr<NodeBase*> CodeNode::getFirstMember(const DataFlowGraph &G) const {
475 if (Code.FirstM == 0)
476 return NodeAddr<NodeBase*>();
477 return G.addr<NodeBase*>(Code.FirstM);
480 // Get the last member of the code node.
481 NodeAddr<NodeBase*> CodeNode::getLastMember(const DataFlowGraph &G) const {
483 return NodeAddr<NodeBase*>();
484 return G.addr<NodeBase*>(Code.LastM);
487 // Add node NA at the end of the member list of the given code node.
488 void CodeNode::addMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
489 NodeAddr<NodeBase*> ML = getLastMember(G);
494 NodeId Self = G.id(this);
495 NA.Addr->setNext(Self);
500 // Add node NA after member node MA in the given code node.
501 void CodeNode::addMemberAfter(NodeAddr<NodeBase*> MA, NodeAddr<NodeBase*> NA,
502 const DataFlowGraph &G) {
504 if (Code.LastM == MA.Id)
508 // Remove member node NA from the given code node.
509 void CodeNode::removeMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
510 NodeAddr<NodeBase*> MA = getFirstMember(G);
513 // Special handling if the member to remove is the first member.
514 if (MA.Id == NA.Id) {
515 if (Code.LastM == MA.Id) {
516 // If it is the only member, set both first and last to 0.
517 Code.FirstM = Code.LastM = 0;
519 // Otherwise, advance the first member.
520 Code.FirstM = MA.Addr->getNext();
525 while (MA.Addr != this) {
526 NodeId MX = MA.Addr->getNext();
528 MA.Addr->setNext(NA.Addr->getNext());
529 // If the member to remove happens to be the last one, update the
531 if (Code.LastM == NA.Id)
535 MA = G.addr<NodeBase*>(MX);
537 llvm_unreachable("No such member");
540 // Return the list of all members of the code node.
541 NodeList CodeNode::members(const DataFlowGraph &G) const {
542 static auto True = [] (NodeAddr<NodeBase*>) -> bool { return true; };
543 return members_if(True, G);
546 // Return the owner of the given instr node.
547 NodeAddr<NodeBase*> InstrNode::getOwner(const DataFlowGraph &G) {
548 NodeAddr<NodeBase*> NA = G.addr<NodeBase*>(getNext());
550 while (NA.Addr != this) {
551 assert(NA.Addr->getType() == NodeAttrs::Code);
552 if (NA.Addr->getKind() == NodeAttrs::Block)
554 NA = G.addr<NodeBase*>(NA.Addr->getNext());
556 llvm_unreachable("No owner in circular list");
559 // Add the phi node PA to the given block node.
560 void BlockNode::addPhi(NodeAddr<PhiNode*> PA, const DataFlowGraph &G) {
561 NodeAddr<NodeBase*> M = getFirstMember(G);
567 assert(M.Addr->getType() == NodeAttrs::Code);
568 if (M.Addr->getKind() == NodeAttrs::Stmt) {
569 // If the first member of the block is a statement, insert the phi as
572 PA.Addr->setNext(M.Id);
574 // If the first member is a phi, find the last phi, and append PA to it.
575 assert(M.Addr->getKind() == NodeAttrs::Phi);
576 NodeAddr<NodeBase*> MN = M;
579 MN = G.addr<NodeBase*>(M.Addr->getNext());
580 assert(MN.Addr->getType() == NodeAttrs::Code);
581 } while (MN.Addr->getKind() == NodeAttrs::Phi);
583 // M is the last phi.
584 addMemberAfter(M, PA, G);
588 // Find the block node corresponding to the machine basic block BB in the
590 NodeAddr<BlockNode*> FuncNode::findBlock(const MachineBasicBlock *BB,
591 const DataFlowGraph &G) const {
592 auto EqBB = [BB] (NodeAddr<NodeBase*> NA) -> bool {
593 return NodeAddr<BlockNode*>(NA).Addr->getCode() == BB;
595 NodeList Ms = members_if(EqBB, G);
598 return NodeAddr<BlockNode*>();
601 // Get the block node for the entry block in the given function.
602 NodeAddr<BlockNode*> FuncNode::getEntryBlock(const DataFlowGraph &G) {
603 MachineBasicBlock *EntryB = &getCode()->front();
604 return findBlock(EntryB, G);
607 // Target operand information.
610 // For a given instruction, check if there are any bits of RR that can remain
611 // unchanged across this def.
612 bool TargetOperandInfo::isPreserving(const MachineInstr &In, unsigned OpNum)
614 return TII.isPredicated(In);
617 // Check if the definition of RR produces an unspecified value.
618 bool TargetOperandInfo::isClobbering(const MachineInstr &In, unsigned OpNum)
620 const MachineOperand &Op = In.getOperand(OpNum);
625 if (Op.isDef() && Op.isDead())
630 // Check if the given instruction specifically requires
631 bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum)
633 if (In.isCall() || In.isReturn() || In.isInlineAsm())
635 // Check for a tail call.
637 for (const MachineOperand &O : In.operands())
638 if (O.isGlobal() || O.isSymbol())
641 const MCInstrDesc &D = In.getDesc();
642 if (!D.getImplicitDefs() && !D.getImplicitUses())
644 const MachineOperand &Op = In.getOperand(OpNum);
645 // If there is a sub-register, treat the operand as non-fixed. Currently,
646 // fixed registers are those that are listed in the descriptor as implicit
647 // uses or defs, and those lists do not allow sub-registers.
648 if (Op.getSubReg() != 0)
650 RegisterId Reg = Op.getReg();
651 const MCPhysReg *ImpR = Op.isDef() ? D.getImplicitDefs()
652 : D.getImplicitUses();
662 // The data flow graph construction.
665 DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
666 const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
667 const MachineDominanceFrontier &mdf, const TargetOperandInfo &toi)
668 : MF(mf), TII(tii), TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(toi),
672 // The implementation of the definition stack.
673 // Each register reference has its own definition stack. In particular,
674 // for a register references "Reg" and "Reg:subreg" will each have their
675 // own definition stacks.
677 // Construct a stack iterator.
678 DataFlowGraph::DefStack::Iterator::Iterator(const DataFlowGraph::DefStack &S,
681 // Initialize to bottom.
685 // Initialize to the top, i.e. top-most non-delimiter (or 0, if empty).
686 Pos = DS.Stack.size();
687 while (Pos > 0 && DS.isDelimiter(DS.Stack[Pos-1]))
691 // Return the size of the stack, including block delimiters.
692 unsigned DataFlowGraph::DefStack::size() const {
694 for (auto I = top(), E = bottom(); I != E; I.down())
699 // Remove the top entry from the stack. Remove all intervening delimiters
700 // so that after this, the stack is either empty, or the top of the stack
701 // is a non-delimiter.
702 void DataFlowGraph::DefStack::pop() {
704 unsigned P = nextDown(Stack.size());
708 // Push a delimiter for block node N on the stack.
709 void DataFlowGraph::DefStack::start_block(NodeId N) {
711 Stack.push_back(NodeAddr<DefNode*>(nullptr, N));
714 // Remove all nodes from the top of the stack, until the delimited for
715 // block node N is encountered. Remove the delimiter as well. In effect,
716 // this will remove from the stack all definitions from block N.
717 void DataFlowGraph::DefStack::clear_block(NodeId N) {
719 unsigned P = Stack.size();
721 bool Found = isDelimiter(Stack[P-1], N);
726 // This will also remove the delimiter, if found.
730 // Move the stack iterator up by one.
731 unsigned DataFlowGraph::DefStack::nextUp(unsigned P) const {
732 // Get the next valid position after P (skipping all delimiters).
733 // The input position P does not have to point to a non-delimiter.
734 unsigned SS = Stack.size();
739 IsDelim = isDelimiter(Stack[P-1]);
740 } while (P < SS && IsDelim);
745 // Move the stack iterator down by one.
746 unsigned DataFlowGraph::DefStack::nextDown(unsigned P) const {
747 // Get the preceding valid position before P (skipping all delimiters).
748 // The input position P does not have to point to a non-delimiter.
749 assert(P > 0 && P <= Stack.size());
750 bool IsDelim = isDelimiter(Stack[P-1]);
754 IsDelim = isDelimiter(Stack[P-1]);
755 } while (P > 0 && IsDelim);
760 // Register information.
762 RegisterSet DataFlowGraph::getLandingPadLiveIns() const {
764 const Function &F = *MF.getFunction();
765 const Constant *PF = F.hasPersonalityFn() ? F.getPersonalityFn()
767 const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
768 if (RegisterId R = TLI.getExceptionPointerRegister(PF))
769 LR.insert(RegisterRef(R));
770 if (RegisterId R = TLI.getExceptionSelectorRegister(PF))
771 LR.insert(RegisterRef(R));
775 // Node management functions.
777 // Get the pointer to the node with the id N.
778 NodeBase *DataFlowGraph::ptr(NodeId N) const {
781 return Memory.ptr(N);
784 // Get the id of the node at the address P.
785 NodeId DataFlowGraph::id(const NodeBase *P) const {
791 // Allocate a new node and set the attributes to Attrs.
792 NodeAddr<NodeBase*> DataFlowGraph::newNode(uint16_t Attrs) {
793 NodeAddr<NodeBase*> P = Memory.New();
795 P.Addr->setAttrs(Attrs);
799 // Make a copy of the given node B, except for the data-flow links, which
801 NodeAddr<NodeBase*> DataFlowGraph::cloneNode(const NodeAddr<NodeBase*> B) {
802 NodeAddr<NodeBase*> NA = newNode(0);
803 memcpy(NA.Addr, B.Addr, sizeof(NodeBase));
804 // Ref nodes need to have the data-flow links reset.
805 if (NA.Addr->getType() == NodeAttrs::Ref) {
806 NodeAddr<RefNode*> RA = NA;
807 RA.Addr->setReachingDef(0);
808 RA.Addr->setSibling(0);
809 if (NA.Addr->getKind() == NodeAttrs::Def) {
810 NodeAddr<DefNode*> DA = NA;
811 DA.Addr->setReachedDef(0);
812 DA.Addr->setReachedUse(0);
818 // Allocation routines for specific node types/kinds.
820 NodeAddr<UseNode*> DataFlowGraph::newUse(NodeAddr<InstrNode*> Owner,
821 MachineOperand &Op, uint16_t Flags) {
822 NodeAddr<UseNode*> UA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
823 UA.Addr->setRegRef(&Op, *this);
827 NodeAddr<PhiUseNode*> DataFlowGraph::newPhiUse(NodeAddr<PhiNode*> Owner,
828 RegisterRef RR, NodeAddr<BlockNode*> PredB, uint16_t Flags) {
829 NodeAddr<PhiUseNode*> PUA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
830 assert(Flags & NodeAttrs::PhiRef);
831 PUA.Addr->setRegRef(RR, *this);
832 PUA.Addr->setPredecessor(PredB.Id);
836 NodeAddr<DefNode*> DataFlowGraph::newDef(NodeAddr<InstrNode*> Owner,
837 MachineOperand &Op, uint16_t Flags) {
838 NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
839 DA.Addr->setRegRef(&Op, *this);
843 NodeAddr<DefNode*> DataFlowGraph::newDef(NodeAddr<InstrNode*> Owner,
844 RegisterRef RR, uint16_t Flags) {
845 NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
846 assert(Flags & NodeAttrs::PhiRef);
847 DA.Addr->setRegRef(RR, *this);
851 NodeAddr<PhiNode*> DataFlowGraph::newPhi(NodeAddr<BlockNode*> Owner) {
852 NodeAddr<PhiNode*> PA = newNode(NodeAttrs::Code | NodeAttrs::Phi);
853 Owner.Addr->addPhi(PA, *this);
857 NodeAddr<StmtNode*> DataFlowGraph::newStmt(NodeAddr<BlockNode*> Owner,
859 NodeAddr<StmtNode*> SA = newNode(NodeAttrs::Code | NodeAttrs::Stmt);
860 SA.Addr->setCode(MI);
861 Owner.Addr->addMember(SA, *this);
865 NodeAddr<BlockNode*> DataFlowGraph::newBlock(NodeAddr<FuncNode*> Owner,
866 MachineBasicBlock *BB) {
867 NodeAddr<BlockNode*> BA = newNode(NodeAttrs::Code | NodeAttrs::Block);
868 BA.Addr->setCode(BB);
869 Owner.Addr->addMember(BA, *this);
873 NodeAddr<FuncNode*> DataFlowGraph::newFunc(MachineFunction *MF) {
874 NodeAddr<FuncNode*> FA = newNode(NodeAttrs::Code | NodeAttrs::Func);
875 FA.Addr->setCode(MF);
879 // Build the data flow graph.
880 void DataFlowGraph::build(unsigned Options) {
887 for (MachineBasicBlock &B : MF) {
888 NodeAddr<BlockNode*> BA = newBlock(Func, &B);
889 BlockNodes.insert(std::make_pair(&B, BA));
890 for (MachineInstr &I : B) {
891 if (I.isDebugValue())
897 NodeAddr<BlockNode*> EA = Func.Addr->getEntryBlock(*this);
898 NodeList Blocks = Func.Addr->members(*this);
900 // Collect information about block references.
902 buildBlockRefs(EA, RefM);
904 // Collect function live-ins and entry block live-ins.
905 MachineRegisterInfo &MRI = MF.getRegInfo();
906 MachineBasicBlock &EntryB = *EA.Addr->getCode();
907 assert(EntryB.pred_empty() && "Function entry block has predecessors");
908 for (auto I = MRI.livein_begin(), E = MRI.livein_end(); I != E; ++I)
909 LiveIns.insert(RegisterRef(I->first));
910 if (MRI.tracksLiveness()) {
911 for (auto I : EntryB.liveins())
912 LiveIns.insert(RegisterRef(I.PhysReg, I.LaneMask));
915 // Add function-entry phi nodes for the live-in registers.
916 //for (std::pair<RegisterId,LaneBitmask> P : LiveIns) {
917 for (auto I = LiveIns.rr_begin(), E = LiveIns.rr_end(); I != E; ++I) {
919 NodeAddr<PhiNode*> PA = newPhi(EA);
920 uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
921 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
922 PA.Addr->addMember(DA, *this);
925 // Add phis for landing pads.
926 // Landing pads, unlike usual backs blocks, are not entered through
927 // branches in the program, or fall-throughs from other blocks. They
928 // are entered from the exception handling runtime and target's ABI
929 // may define certain registers as defined on entry to such a block.
930 RegisterSet EHRegs = getLandingPadLiveIns();
931 if (!EHRegs.empty()) {
932 for (NodeAddr<BlockNode*> BA : Blocks) {
933 const MachineBasicBlock &B = *BA.Addr->getCode();
937 // Prepare a list of NodeIds of the block's predecessors.
939 for (MachineBasicBlock *PB : B.predecessors())
940 Preds.push_back(findBlock(PB));
942 // Build phi nodes for each live-in.
943 for (RegisterRef RR : EHRegs) {
944 NodeAddr<PhiNode*> PA = newPhi(BA);
945 uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
947 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
948 PA.Addr->addMember(DA, *this);
949 // Add uses (no reaching defs for phi uses):
950 for (NodeAddr<BlockNode*> PBA : Preds) {
951 NodeAddr<PhiUseNode*> PUA = newPhiUse(PA, RR, PBA);
952 PA.Addr->addMember(PUA, *this);
958 // Build a map "PhiM" which will contain, for each block, the set
959 // of references that will require phi definitions in that block.
961 for (NodeAddr<BlockNode*> BA : Blocks)
962 recordDefsForDF(PhiM, RefM, BA);
963 for (NodeAddr<BlockNode*> BA : Blocks)
964 buildPhis(PhiM, RefM, BA);
966 // Link all the refs. This will recursively traverse the dominator tree.
968 linkBlockRefs(DM, EA);
970 // Finally, remove all unused phi nodes.
971 if (!(Options & BuildOptions::KeepDeadPhis))
975 RegisterRef DataFlowGraph::makeRegRef(unsigned Reg, unsigned Sub) const {
976 assert(PhysicalRegisterInfo::isRegMaskId(Reg) ||
977 TargetRegisterInfo::isPhysicalRegister(Reg));
980 Reg = TRI.getSubReg(Reg, Sub);
981 return RegisterRef(Reg);
984 RegisterRef DataFlowGraph::makeRegRef(const MachineOperand &Op) const {
985 assert(Op.isReg() || Op.isRegMask());
987 return makeRegRef(Op.getReg(), Op.getSubReg());
988 return RegisterRef(PRI.getRegMaskId(Op.getRegMask()), LaneBitmask::getAll());
991 RegisterRef DataFlowGraph::restrictRef(RegisterRef AR, RegisterRef BR) const {
992 if (AR.Reg == BR.Reg) {
993 LaneBitmask M = AR.Mask & BR.Mask;
994 return M.any() ? RegisterRef(AR.Reg, M) : RegisterRef();
997 // RegisterRef NAR = PRI.normalize(AR);
998 // RegisterRef NBR = PRI.normalize(BR);
999 // assert(NAR.Reg != NBR.Reg);
1001 // This isn't strictly correct, because the overlap may happen in the
1003 if (PRI.alias(AR, BR))
1005 return RegisterRef();
1008 // For each stack in the map DefM, push the delimiter for block B on it.
1009 void DataFlowGraph::markBlock(NodeId B, DefStackMap &DefM) {
1010 // Push block delimiters.
1011 for (auto I = DefM.begin(), E = DefM.end(); I != E; ++I)
1012 I->second.start_block(B);
1015 // Remove all definitions coming from block B from each stack in DefM.
1016 void DataFlowGraph::releaseBlock(NodeId B, DefStackMap &DefM) {
1017 // Pop all defs from this block from the definition stack. Defs that were
1018 // added to the map during the traversal of instructions will not have a
1019 // delimiter, but for those, the whole stack will be emptied.
1020 for (auto I = DefM.begin(), E = DefM.end(); I != E; ++I)
1021 I->second.clear_block(B);
1023 // Finally, remove empty stacks from the map.
1024 for (auto I = DefM.begin(), E = DefM.end(), NextI = I; I != E; I = NextI) {
1025 NextI = std::next(I);
1026 // This preserves the validity of iterators other than I.
1027 if (I->second.empty())
1032 // Push all definitions from the instruction node IA to an appropriate
1034 void DataFlowGraph::pushAllDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
1035 pushClobbers(IA, DefM);
1039 // Push all definitions from the instruction node IA to an appropriate
1041 void DataFlowGraph::pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
1043 std::set<RegisterId> Defined;
1045 // The important objectives of this function are:
1046 // - to be able to handle instructions both while the graph is being
1047 // constructed, and after the graph has been constructed, and
1048 // - maintain proper ordering of definitions on the stack for each
1049 // register reference:
1050 // - if there are two or more related defs in IA (i.e. coming from
1051 // the same machine operand), then only push one def on the stack,
1052 // - if there are multiple unrelated defs of non-overlapping
1053 // subregisters of S, then the stack for S will have both (in an
1054 // unspecified order), but the order does not matter from the data-
1055 // -flow perspective.
1057 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) {
1058 if (Visited.count(DA.Id))
1060 if (!(DA.Addr->getFlags() & NodeAttrs::Clobbering))
1063 NodeList Rel = getRelatedRefs(IA, DA);
1064 NodeAddr<DefNode*> PDA = Rel.front();
1065 RegisterRef RR = PDA.Addr->getRegRef(*this);
1067 // Push the definition on the stack for the register and all aliases.
1068 // The def stack traversal in linkNodeUp will check the exact aliasing.
1069 DefM[RR.Reg].push(DA);
1070 Defined.insert(RR.Reg);
1071 for (RegisterId A : PRI.getAliasSet(RR.Reg)) {
1072 // Check that we don't push the same def twice.
1073 assert(A != RR.Reg);
1074 if (!Defined.count(A))
1077 // Mark all the related defs as visited.
1078 for (NodeAddr<NodeBase*> T : Rel)
1079 Visited.insert(T.Id);
1083 // Push all definitions from the instruction node IA to an appropriate
1085 void DataFlowGraph::pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
1088 std::set<RegisterId> Defined;
1091 // The important objectives of this function are:
1092 // - to be able to handle instructions both while the graph is being
1093 // constructed, and after the graph has been constructed, and
1094 // - maintain proper ordering of definitions on the stack for each
1095 // register reference:
1096 // - if there are two or more related defs in IA (i.e. coming from
1097 // the same machine operand), then only push one def on the stack,
1098 // - if there are multiple unrelated defs of non-overlapping
1099 // subregisters of S, then the stack for S will have both (in an
1100 // unspecified order), but the order does not matter from the data-
1101 // -flow perspective.
1103 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) {
1104 if (Visited.count(DA.Id))
1106 if (DA.Addr->getFlags() & NodeAttrs::Clobbering)
1109 NodeList Rel = getRelatedRefs(IA, DA);
1110 NodeAddr<DefNode*> PDA = Rel.front();
1111 RegisterRef RR = PDA.Addr->getRegRef(*this);
1113 // Assert if the register is defined in two or more unrelated defs.
1114 // This could happen if there are two or more def operands defining it.
1115 if (!Defined.insert(RR.Reg).second) {
1116 MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode();
1117 dbgs() << "Multiple definitions of register: "
1118 << Print<RegisterRef>(RR, *this) << " in\n " << *MI
1119 << "in BB#" << MI->getParent()->getNumber() << '\n';
1120 llvm_unreachable(nullptr);
1123 // Push the definition on the stack for the register and all aliases.
1124 // The def stack traversal in linkNodeUp will check the exact aliasing.
1125 DefM[RR.Reg].push(DA);
1126 for (RegisterId A : PRI.getAliasSet(RR.Reg)) {
1127 // Check that we don't push the same def twice.
1128 assert(A != RR.Reg);
1131 // Mark all the related defs as visited.
1132 for (NodeAddr<NodeBase*> T : Rel)
1133 Visited.insert(T.Id);
1137 // Return the list of all reference nodes related to RA, including RA itself.
1138 // See "getNextRelated" for the meaning of a "related reference".
1139 NodeList DataFlowGraph::getRelatedRefs(NodeAddr<InstrNode*> IA,
1140 NodeAddr<RefNode*> RA) const {
1141 assert(IA.Id != 0 && RA.Id != 0);
1144 NodeId Start = RA.Id;
1147 RA = getNextRelated(IA, RA);
1148 } while (RA.Id != 0 && RA.Id != Start);
1152 // Clear all information in the graph.
1153 void DataFlowGraph::reset() {
1156 Func = NodeAddr<FuncNode*>();
1159 // Return the next reference node in the instruction node IA that is related
1160 // to RA. Conceptually, two reference nodes are related if they refer to the
1161 // same instance of a register access, but differ in flags or other minor
1162 // characteristics. Specific examples of related nodes are shadow reference
1164 // Return the equivalent of nullptr if there are no more related references.
1165 NodeAddr<RefNode*> DataFlowGraph::getNextRelated(NodeAddr<InstrNode*> IA,
1166 NodeAddr<RefNode*> RA) const {
1167 assert(IA.Id != 0 && RA.Id != 0);
1169 auto Related = [this,RA](NodeAddr<RefNode*> TA) -> bool {
1170 if (TA.Addr->getKind() != RA.Addr->getKind())
1172 if (TA.Addr->getRegRef(*this) != RA.Addr->getRegRef(*this))
1176 auto RelatedStmt = [&Related,RA](NodeAddr<RefNode*> TA) -> bool {
1177 return Related(TA) &&
1178 &RA.Addr->getOp() == &TA.Addr->getOp();
1180 auto RelatedPhi = [&Related,RA](NodeAddr<RefNode*> TA) -> bool {
1183 if (TA.Addr->getKind() != NodeAttrs::Use)
1185 // For phi uses, compare predecessor blocks.
1186 const NodeAddr<const PhiUseNode*> TUA = TA;
1187 const NodeAddr<const PhiUseNode*> RUA = RA;
1188 return TUA.Addr->getPredecessor() == RUA.Addr->getPredecessor();
1191 RegisterRef RR = RA.Addr->getRegRef(*this);
1192 if (IA.Addr->getKind() == NodeAttrs::Stmt)
1193 return RA.Addr->getNextRef(RR, RelatedStmt, true, *this);
1194 return RA.Addr->getNextRef(RR, RelatedPhi, true, *this);
1197 // Find the next node related to RA in IA that satisfies condition P.
1198 // If such a node was found, return a pair where the second element is the
1199 // located node. If such a node does not exist, return a pair where the
1200 // first element is the element after which such a node should be inserted,
1201 // and the second element is a null-address.
1202 template <typename Predicate>
1203 std::pair<NodeAddr<RefNode*>,NodeAddr<RefNode*>>
1204 DataFlowGraph::locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA,
1205 Predicate P) const {
1206 assert(IA.Id != 0 && RA.Id != 0);
1208 NodeAddr<RefNode*> NA;
1209 NodeId Start = RA.Id;
1211 NA = getNextRelated(IA, RA);
1212 if (NA.Id == 0 || NA.Id == Start)
1219 if (NA.Id != 0 && NA.Id != Start)
1220 return std::make_pair(RA, NA);
1221 return std::make_pair(RA, NodeAddr<RefNode*>());
1224 // Get the next shadow node in IA corresponding to RA, and optionally create
1225 // such a node if it does not exist.
1226 NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
1227 NodeAddr<RefNode*> RA, bool Create) {
1228 assert(IA.Id != 0 && RA.Id != 0);
1230 uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow;
1231 auto IsShadow = [Flags] (NodeAddr<RefNode*> TA) -> bool {
1232 return TA.Addr->getFlags() == Flags;
1234 auto Loc = locateNextRef(IA, RA, IsShadow);
1235 if (Loc.second.Id != 0 || !Create)
1238 // Create a copy of RA and mark is as shadow.
1239 NodeAddr<RefNode*> NA = cloneNode(RA);
1240 NA.Addr->setFlags(Flags | NodeAttrs::Shadow);
1241 IA.Addr->addMemberAfter(Loc.first, NA, *this);
1245 // Get the next shadow node in IA corresponding to RA. Return null-address
1246 // if such a node does not exist.
1247 NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
1248 NodeAddr<RefNode*> RA) const {
1249 assert(IA.Id != 0 && RA.Id != 0);
1250 uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow;
1251 auto IsShadow = [Flags] (NodeAddr<RefNode*> TA) -> bool {
1252 return TA.Addr->getFlags() == Flags;
1254 return locateNextRef(IA, RA, IsShadow).second;
1257 // Create a new statement node in the block node BA that corresponds to
1258 // the machine instruction MI.
1259 void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
1260 NodeAddr<StmtNode*> SA = newStmt(BA, &In);
1262 auto isCall = [] (const MachineInstr &In) -> bool {
1266 if (In.isBranch()) {
1267 for (const MachineOperand &Op : In.operands())
1268 if (Op.isGlobal() || Op.isSymbol())
1270 // Assume indirect branches are calls. This is for the purpose of
1271 // keeping implicit operands, and so it won't hurt on intra-function
1272 // indirect branches.
1273 if (In.isIndirectBranch())
1279 auto isDefUndef = [this] (const MachineInstr &In, RegisterRef DR) -> bool {
1280 // This instruction defines DR. Check if there is a use operand that
1281 // would make DR live on entry to the instruction.
1282 for (const MachineOperand &Op : In.operands()) {
1283 if (!Op.isReg() || Op.getReg() == 0 || !Op.isUse() || Op.isUndef())
1285 RegisterRef UR = makeRegRef(Op);
1286 if (PRI.alias(DR, UR))
1292 bool IsCall = isCall(In);
1293 unsigned NumOps = In.getNumOperands();
1295 // Avoid duplicate implicit defs. This will not detect cases of implicit
1296 // defs that define registers that overlap, but it is not clear how to
1297 // interpret that in the absence of explicit defs. Overlapping explicit
1298 // defs are likely illegal already.
1299 BitVector DoneDefs(TRI.getNumRegs());
1300 // Process explicit defs first.
1301 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
1302 MachineOperand &Op = In.getOperand(OpN);
1303 if (!Op.isReg() || !Op.isDef() || Op.isImplicit())
1305 unsigned R = Op.getReg();
1306 if (!R || !TargetRegisterInfo::isPhysicalRegister(R))
1308 uint16_t Flags = NodeAttrs::None;
1309 if (TOI.isPreserving(In, OpN)) {
1310 Flags |= NodeAttrs::Preserving;
1311 // If the def is preserving, check if it is also undefined.
1312 if (isDefUndef(In, makeRegRef(Op)))
1313 Flags |= NodeAttrs::Undef;
1315 if (TOI.isClobbering(In, OpN))
1316 Flags |= NodeAttrs::Clobbering;
1317 if (TOI.isFixedReg(In, OpN))
1318 Flags |= NodeAttrs::Fixed;
1319 if (IsCall && Op.isDead())
1320 Flags |= NodeAttrs::Dead;
1321 NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
1322 SA.Addr->addMember(DA, *this);
1323 assert(!DoneDefs.test(R));
1327 // Process reg-masks (as clobbers).
1328 BitVector DoneClobbers(TRI.getNumRegs());
1329 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
1330 MachineOperand &Op = In.getOperand(OpN);
1331 if (!Op.isRegMask())
1333 uint16_t Flags = NodeAttrs::Clobbering | NodeAttrs::Fixed |
1335 NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
1336 SA.Addr->addMember(DA, *this);
1337 // Record all clobbered registers in DoneDefs.
1338 const uint32_t *RM = Op.getRegMask();
1339 for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i)
1340 if (!(RM[i/32] & (1u << (i%32))))
1341 DoneClobbers.set(i);
1344 // Process implicit defs, skipping those that have already been added
1346 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
1347 MachineOperand &Op = In.getOperand(OpN);
1348 if (!Op.isReg() || !Op.isDef() || !Op.isImplicit())
1350 unsigned R = Op.getReg();
1351 if (!R || !TargetRegisterInfo::isPhysicalRegister(R) || DoneDefs.test(R))
1353 RegisterRef RR = makeRegRef(Op);
1354 uint16_t Flags = NodeAttrs::None;
1355 if (TOI.isPreserving(In, OpN)) {
1356 Flags |= NodeAttrs::Preserving;
1357 // If the def is preserving, check if it is also undefined.
1358 if (isDefUndef(In, RR))
1359 Flags |= NodeAttrs::Undef;
1361 if (TOI.isClobbering(In, OpN))
1362 Flags |= NodeAttrs::Clobbering;
1363 if (TOI.isFixedReg(In, OpN))
1364 Flags |= NodeAttrs::Fixed;
1365 if (IsCall && Op.isDead()) {
1366 if (DoneClobbers.test(R))
1368 Flags |= NodeAttrs::Dead;
1370 NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
1371 SA.Addr->addMember(DA, *this);
1375 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
1376 MachineOperand &Op = In.getOperand(OpN);
1377 if (!Op.isReg() || !Op.isUse())
1379 unsigned R = Op.getReg();
1380 if (!R || !TargetRegisterInfo::isPhysicalRegister(R))
1382 uint16_t Flags = NodeAttrs::None;
1384 Flags |= NodeAttrs::Undef;
1385 if (TOI.isFixedReg(In, OpN))
1386 Flags |= NodeAttrs::Fixed;
1387 NodeAddr<UseNode*> UA = newUse(SA, Op, Flags);
1388 SA.Addr->addMember(UA, *this);
1392 // Build a map that for each block will have the set of all references from
1393 // that block, and from all blocks dominated by it.
1394 void DataFlowGraph::buildBlockRefs(NodeAddr<BlockNode*> BA,
1395 BlockRefsMap &RefM) {
1396 RegisterSet &Refs = RefM[BA.Id];
1397 MachineDomTreeNode *N = MDT.getNode(BA.Addr->getCode());
1400 MachineBasicBlock *SB = I->getBlock();
1401 NodeAddr<BlockNode*> SBA = findBlock(SB);
1402 buildBlockRefs(SBA, RefM);
1403 const RegisterSet &RefsS = RefM[SBA.Id];
1404 Refs.insert(RefsS.begin(), RefsS.end());
1407 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this))
1408 for (NodeAddr<RefNode*> RA : IA.Addr->members(*this))
1409 Refs.insert(RA.Addr->getRegRef(*this));
1412 // Scan all defs in the block node BA and record in PhiM the locations of
1413 // phi nodes corresponding to these defs.
1414 void DataFlowGraph::recordDefsForDF(BlockRefsMap &PhiM, BlockRefsMap &RefM,
1415 NodeAddr<BlockNode*> BA) {
1416 // Check all defs from block BA and record them in each block in BA's
1417 // iterated dominance frontier. This information will later be used to
1418 // create phi nodes.
1419 MachineBasicBlock *BB = BA.Addr->getCode();
1421 auto DFLoc = MDF.find(BB);
1422 if (DFLoc == MDF.end() || DFLoc->second.empty())
1425 // Traverse all instructions in the block and collect the set of all
1426 // defined references. For each reference there will be a phi created
1427 // in the block's iterated dominance frontier.
1428 // This is done to make sure that each defined reference gets only one
1429 // phi node, even if it is defined multiple times.
1431 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this))
1432 for (NodeAddr<RefNode*> RA : IA.Addr->members_if(IsDef, *this))
1433 Defs.insert(RA.Addr->getRegRef(*this));
1435 // Calculate the iterated dominance frontier of BB.
1436 const MachineDominanceFrontier::DomSetType &DF = DFLoc->second;
1437 SetVector<MachineBasicBlock*> IDF(DF.begin(), DF.end());
1438 for (unsigned i = 0; i < IDF.size(); ++i) {
1439 auto F = MDF.find(IDF[i]);
1441 IDF.insert(F->second.begin(), F->second.end());
1444 // Get the register references that are reachable from this block.
1445 RegisterSet &Refs = RefM[BA.Id];
1446 for (auto DB : IDF) {
1447 NodeAddr<BlockNode*> DBA = findBlock(DB);
1448 const RegisterSet &RefsD = RefM[DBA.Id];
1449 Refs.insert(RefsD.begin(), RefsD.end());
1452 // Finally, add the set of defs to each block in the iterated dominance
1454 for (auto DB : IDF) {
1455 NodeAddr<BlockNode*> DBA = findBlock(DB);
1456 PhiM[DBA.Id].insert(Defs.begin(), Defs.end());
1460 // Given the locations of phi nodes in the map PhiM, create the phi nodes
1461 // that are located in the block node BA.
1462 void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, BlockRefsMap &RefM,
1463 NodeAddr<BlockNode*> BA) {
1464 // Check if this blocks has any DF defs, i.e. if there are any defs
1465 // that this block is in the iterated dominance frontier of.
1466 auto HasDF = PhiM.find(BA.Id);
1467 if (HasDF == PhiM.end() || HasDF->second.empty())
1470 // First, remove all R in Refs in such that there exists T in Refs
1471 // such that T covers R. In other words, only leave those refs that
1472 // are not covered by another ref (i.e. maximal with respect to covering).
1474 auto MaxCoverIn = [this] (RegisterRef RR, RegisterSet &RRs) -> RegisterRef {
1475 for (RegisterRef I : RRs)
1476 if (I != RR && RegisterAggr::isCoverOf(I, RR, PRI))
1482 for (RegisterRef I : HasDF->second)
1483 MaxDF.insert(MaxCoverIn(I, HasDF->second));
1485 std::vector<RegisterRef> MaxRefs;
1486 RegisterSet &RefB = RefM[BA.Id];
1487 for (RegisterRef I : MaxDF)
1488 MaxRefs.push_back(MaxCoverIn(I, RefB));
1490 // Now, for each R in MaxRefs, get the alias closure of R. If the closure
1491 // only has R in it, create a phi a def for R. Otherwise, create a phi,
1492 // and add a def for each S in the closure.
1494 // Sort the refs so that the phis will be created in a deterministic order.
1495 std::sort(MaxRefs.begin(), MaxRefs.end());
1496 // Remove duplicates.
1497 auto NewEnd = std::unique(MaxRefs.begin(), MaxRefs.end());
1498 MaxRefs.erase(NewEnd, MaxRefs.end());
1500 auto Aliased = [this,&MaxRefs](RegisterRef RR,
1501 std::vector<unsigned> &Closure) -> bool {
1502 for (unsigned I : Closure)
1503 if (PRI.alias(RR, MaxRefs[I]))
1508 // Prepare a list of NodeIds of the block's predecessors.
1510 const MachineBasicBlock *MBB = BA.Addr->getCode();
1511 for (MachineBasicBlock *PB : MBB->predecessors())
1512 Preds.push_back(findBlock(PB));
1514 while (!MaxRefs.empty()) {
1515 // Put the first element in the closure, and then add all subsequent
1516 // elements from MaxRefs to it, if they alias at least one element
1517 // already in the closure.
1518 // ClosureIdx: vector of indices in MaxRefs of members of the closure.
1519 std::vector<unsigned> ClosureIdx = { 0 };
1520 for (unsigned i = 1; i != MaxRefs.size(); ++i)
1521 if (Aliased(MaxRefs[i], ClosureIdx))
1522 ClosureIdx.push_back(i);
1524 // Build a phi for the closure.
1525 unsigned CS = ClosureIdx.size();
1526 NodeAddr<PhiNode*> PA = newPhi(BA);
1529 for (unsigned X = 0; X != CS; ++X) {
1530 RegisterRef RR = MaxRefs[ClosureIdx[X]];
1531 uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
1532 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
1533 PA.Addr->addMember(DA, *this);
1536 for (NodeAddr<BlockNode*> PBA : Preds) {
1537 for (unsigned X = 0; X != CS; ++X) {
1538 RegisterRef RR = MaxRefs[ClosureIdx[X]];
1539 NodeAddr<PhiUseNode*> PUA = newPhiUse(PA, RR, PBA);
1540 PA.Addr->addMember(PUA, *this);
1544 // Erase from MaxRefs all elements in the closure.
1545 auto Begin = MaxRefs.begin();
1546 for (unsigned i = ClosureIdx.size(); i != 0; --i)
1547 MaxRefs.erase(Begin + ClosureIdx[i-1]);
1551 // Remove any unneeded phi nodes that were created during the build process.
1552 void DataFlowGraph::removeUnusedPhis() {
1553 // This will remove unused phis, i.e. phis where each def does not reach
1554 // any uses or other defs. This will not detect or remove circular phi
1555 // chains that are otherwise dead. Unused/dead phis are created during
1556 // the build process and this function is intended to remove these cases
1557 // that are easily determinable to be unnecessary.
1559 SetVector<NodeId> PhiQ;
1560 for (NodeAddr<BlockNode*> BA : Func.Addr->members(*this)) {
1561 for (auto P : BA.Addr->members_if(IsPhi, *this))
1565 static auto HasUsedDef = [](NodeList &Ms) -> bool {
1566 for (NodeAddr<NodeBase*> M : Ms) {
1567 if (M.Addr->getKind() != NodeAttrs::Def)
1569 NodeAddr<DefNode*> DA = M;
1570 if (DA.Addr->getReachedDef() != 0 || DA.Addr->getReachedUse() != 0)
1576 // Any phi, if it is removed, may affect other phis (make them dead).
1577 // For each removed phi, collect the potentially affected phis and add
1578 // them back to the queue.
1579 while (!PhiQ.empty()) {
1580 auto PA = addr<PhiNode*>(PhiQ[0]);
1582 NodeList Refs = PA.Addr->members(*this);
1583 if (HasUsedDef(Refs))
1585 for (NodeAddr<RefNode*> RA : Refs) {
1586 if (NodeId RD = RA.Addr->getReachingDef()) {
1587 auto RDA = addr<DefNode*>(RD);
1588 NodeAddr<InstrNode*> OA = RDA.Addr->getOwner(*this);
1592 if (RA.Addr->isDef())
1593 unlinkDef(RA, true);
1595 unlinkUse(RA, true);
1597 NodeAddr<BlockNode*> BA = PA.Addr->getOwner(*this);
1598 BA.Addr->removeMember(PA, *this);
1602 // For a given reference node TA in an instruction node IA, connect the
1603 // reaching def of TA to the appropriate def node. Create any shadow nodes
1605 template <typename T>
1606 void DataFlowGraph::linkRefUp(NodeAddr<InstrNode*> IA, NodeAddr<T> TA,
1610 RegisterRef RR = TA.Addr->getRegRef(*this);
1613 // References from the def stack that have been examined so far.
1614 RegisterAggr Defs(PRI);
1616 for (auto I = DS.top(), E = DS.bottom(); I != E; I.down()) {
1617 RegisterRef QR = I->Addr->getRegRef(*this);
1619 // Skip all defs that are aliased to any of the defs that we have already
1620 // seen. If this completes a cover of RR, stop the stack traversal.
1621 bool Alias = Defs.hasAliasOf(QR);
1622 bool Cover = Defs.insert(QR).hasCoverOf(RR);
1629 // The reaching def.
1630 NodeAddr<DefNode*> RDA = *I;
1632 // Pick the reached node.
1636 // Mark the existing ref as "shadow" and create a new shadow.
1637 TAP.Addr->setFlags(TAP.Addr->getFlags() | NodeAttrs::Shadow);
1638 TAP = getNextShadow(IA, TAP, true);
1642 TAP.Addr->linkToDef(TAP.Id, RDA);
1649 // Create data-flow links for all reference nodes in the statement node SA.
1650 template <typename Predicate>
1651 void DataFlowGraph::linkStmtRefs(DefStackMap &DefM, NodeAddr<StmtNode*> SA,
1657 // Link all nodes (upwards in the data-flow) with their reaching defs.
1658 for (NodeAddr<RefNode*> RA : SA.Addr->members_if(P, *this)) {
1659 uint16_t Kind = RA.Addr->getKind();
1660 assert(Kind == NodeAttrs::Def || Kind == NodeAttrs::Use);
1661 RegisterRef RR = RA.Addr->getRegRef(*this);
1663 // Do not expect multiple defs of the same reference.
1664 assert(Kind != NodeAttrs::Def || !Defs.count(RR));
1668 auto F = DefM.find(RR.Reg);
1669 if (F == DefM.end())
1671 DefStack &DS = F->second;
1672 if (Kind == NodeAttrs::Use)
1673 linkRefUp<UseNode*>(SA, RA, DS);
1674 else if (Kind == NodeAttrs::Def)
1675 linkRefUp<DefNode*>(SA, RA, DS);
1677 llvm_unreachable("Unexpected node in instruction");
1681 // Create data-flow links for all instructions in the block node BA. This
1682 // will include updating any phi nodes in BA.
1683 void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA) {
1684 // Push block delimiters.
1685 markBlock(BA.Id, DefM);
1687 auto IsClobber = [] (NodeAddr<RefNode*> RA) -> bool {
1688 return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering);
1690 auto IsNoClobber = [] (NodeAddr<RefNode*> RA) -> bool {
1691 return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering);
1694 assert(BA.Addr && "block node address is needed to create a data-flow link");
1695 // For each non-phi instruction in the block, link all the defs and uses
1696 // to their reaching defs. For any member of the block (including phis),
1697 // push the defs on the corresponding stacks.
1698 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this)) {
1699 // Ignore phi nodes here. They will be linked part by part from the
1701 if (IA.Addr->getKind() == NodeAttrs::Stmt) {
1702 linkStmtRefs(DefM, IA, IsUse);
1703 linkStmtRefs(DefM, IA, IsClobber);
1706 // Push the definitions on the stack.
1707 pushClobbers(IA, DefM);
1709 if (IA.Addr->getKind() == NodeAttrs::Stmt)
1710 linkStmtRefs(DefM, IA, IsNoClobber);
1715 // Recursively process all children in the dominator tree.
1716 MachineDomTreeNode *N = MDT.getNode(BA.Addr->getCode());
1718 MachineBasicBlock *SB = I->getBlock();
1719 NodeAddr<BlockNode*> SBA = findBlock(SB);
1720 linkBlockRefs(DefM, SBA);
1723 // Link the phi uses from the successor blocks.
1724 auto IsUseForBA = [BA](NodeAddr<NodeBase*> NA) -> bool {
1725 if (NA.Addr->getKind() != NodeAttrs::Use)
1727 assert(NA.Addr->getFlags() & NodeAttrs::PhiRef);
1728 NodeAddr<PhiUseNode*> PUA = NA;
1729 return PUA.Addr->getPredecessor() == BA.Id;
1732 RegisterSet EHLiveIns = getLandingPadLiveIns();
1733 MachineBasicBlock *MBB = BA.Addr->getCode();
1735 for (MachineBasicBlock *SB : MBB->successors()) {
1736 bool IsEHPad = SB->isEHPad();
1737 NodeAddr<BlockNode*> SBA = findBlock(SB);
1738 for (NodeAddr<InstrNode*> IA : SBA.Addr->members_if(IsPhi, *this)) {
1739 // Do not link phi uses for landing pad live-ins.
1741 // Find what register this phi is for.
1742 NodeAddr<RefNode*> RA = IA.Addr->getFirstMember(*this);
1744 if (EHLiveIns.count(RA.Addr->getRegRef(*this)))
1747 // Go over each phi use associated with MBB, and link it.
1748 for (auto U : IA.Addr->members_if(IsUseForBA, *this)) {
1749 NodeAddr<PhiUseNode*> PUA = U;
1750 RegisterRef RR = PUA.Addr->getRegRef(*this);
1751 linkRefUp<UseNode*>(IA, PUA, DefM[RR.Reg]);
1756 // Pop all defs from this block from the definition stacks.
1757 releaseBlock(BA.Id, DefM);
1760 // Remove the use node UA from any data-flow and structural links.
1761 void DataFlowGraph::unlinkUseDF(NodeAddr<UseNode*> UA) {
1762 NodeId RD = UA.Addr->getReachingDef();
1763 NodeId Sib = UA.Addr->getSibling();
1770 auto RDA = addr<DefNode*>(RD);
1771 auto TA = addr<UseNode*>(RDA.Addr->getReachedUse());
1772 if (TA.Id == UA.Id) {
1773 RDA.Addr->setReachedUse(Sib);
1777 while (TA.Id != 0) {
1778 NodeId S = TA.Addr->getSibling();
1780 TA.Addr->setSibling(UA.Addr->getSibling());
1783 TA = addr<UseNode*>(S);
1787 // Remove the def node DA from any data-flow and structural links.
1788 void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode*> DA) {
1796 // ... -- | DA | -- ... -- 0 : sibling chain of DA
1801 // | ... : Siblings (defs)
1805 // ... : sibling chain of reached uses
1807 NodeId RD = DA.Addr->getReachingDef();
1809 // Visit all siblings of the reached def and reset their reaching defs.
1810 // Also, defs reached by DA are now "promoted" to being reached by RD,
1811 // so all of them will need to be spliced into the sibling chain where
1813 auto getAllNodes = [this] (NodeId N) -> NodeList {
1816 auto RA = addr<RefNode*>(N);
1817 // Keep the nodes in the exact sibling order.
1819 N = RA.Addr->getSibling();
1823 NodeList ReachedDefs = getAllNodes(DA.Addr->getReachedDef());
1824 NodeList ReachedUses = getAllNodes(DA.Addr->getReachedUse());
1827 for (NodeAddr<RefNode*> I : ReachedDefs)
1828 I.Addr->setSibling(0);
1829 for (NodeAddr<RefNode*> I : ReachedUses)
1830 I.Addr->setSibling(0);
1832 for (NodeAddr<DefNode*> I : ReachedDefs)
1833 I.Addr->setReachingDef(RD);
1834 for (NodeAddr<UseNode*> I : ReachedUses)
1835 I.Addr->setReachingDef(RD);
1837 NodeId Sib = DA.Addr->getSibling();
1843 // Update the reaching def node and remove DA from the sibling list.
1844 auto RDA = addr<DefNode*>(RD);
1845 auto TA = addr<DefNode*>(RDA.Addr->getReachedDef());
1846 if (TA.Id == DA.Id) {
1847 // If DA is the first reached def, just update the RD's reached def
1848 // to the DA's sibling.
1849 RDA.Addr->setReachedDef(Sib);
1851 // Otherwise, traverse the sibling list of the reached defs and remove
1853 while (TA.Id != 0) {
1854 NodeId S = TA.Addr->getSibling();
1856 TA.Addr->setSibling(Sib);
1859 TA = addr<DefNode*>(S);
1863 // Splice the DA's reached defs into the RDA's reached def chain.
1864 if (!ReachedDefs.empty()) {
1865 auto Last = NodeAddr<DefNode*>(ReachedDefs.back());
1866 Last.Addr->setSibling(RDA.Addr->getReachedDef());
1867 RDA.Addr->setReachedDef(ReachedDefs.front().Id);
1869 // Splice the DA's reached uses into the RDA's reached use chain.
1870 if (!ReachedUses.empty()) {
1871 auto Last = NodeAddr<UseNode*>(ReachedUses.back());
1872 Last.Addr->setSibling(RDA.Addr->getReachedUse());
1873 RDA.Addr->setReachedUse(ReachedUses.front().Id);