1 //===-- MSP430InstrFormats.td - MSP430 Instruction Formats -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Describe MSP430 instructions format here
14 class SourceMode<bits<2> val> {
18 def SrcReg : SourceMode<0>; // r
19 def SrcMem : SourceMode<1>; // m
20 def SrcIndReg : SourceMode<2>; // n
21 def SrcPostInc : SourceMode<3>; // p
22 def SrcImm : SourceMode<3>; // i
23 // SrcCGImm : SourceMode< >; // c
25 class DestMode<bit val> {
29 def DstReg : DestMode<0>; // r
30 def DstMem : DestMode<1>; // m
32 // Generic MSP430 Format
33 class MSP430Inst<dag outs, dag ins, int size, string asmstr> : Instruction {
35 field bits<48> SoftFail = 0;
37 let Namespace = "MSP430";
39 dag OutOperandList = outs;
40 dag InOperandList = ins;
42 let AsmString = asmstr;
46 // MSP430 Double Operand (Format I) Instructions
47 class IForm<bits<4> opcode, DestMode ad, bit bw, SourceMode as, int size,
48 dag outs, dag ins, string asmstr, list<dag> pattern>
49 : MSP430Inst<outs, ins, size, asmstr> {
50 let Pattern = pattern;
55 let Inst{15-12} = opcode;
57 let Inst{7} = ad.Value;
59 let Inst{5-4} = as.Value;
63 // 8 bit IForm instructions
64 class IForm8<bits<4> opcode, DestMode dest, SourceMode src, int size,
65 dag outs, dag ins, string asmstr, list<dag> pattern>
66 : IForm<opcode, dest, 1, src, size, outs, ins, asmstr, pattern>;
68 class I8rr<bits<4> opcode,
69 dag outs, dag ins, string asmstr, list<dag> pattern>
70 : IForm8<opcode, DstReg, SrcReg, 2, outs, ins, asmstr, pattern> {
71 let DecoderNamespace = "Alpha";
74 class I8ri<bits<4> opcode,
75 dag outs, dag ins, string asmstr, list<dag> pattern>
76 : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> {
77 let DecoderNamespace = "Gamma";
79 let Inst{31-16} = imm;
83 class I8rc<bits<4> opcode,
84 dag outs, dag ins, string asmstr, list<dag> pattern>
85 : MSP430Inst<outs, ins, 2, asmstr> {
86 let DecoderNamespace = "Beta";
87 let Pattern = pattern;
92 let Inst{15-12} = opcode;
93 let Inst{11-8} = imm{3-0};
94 let Inst{7} = DstReg.Value;
96 let Inst{5-4} = imm{5-4};
100 class I8rm<bits<4> opcode,
101 dag outs, dag ins, string asmstr, list<dag> pattern>
102 : IForm8<opcode, DstReg, SrcMem, 4, outs, ins, asmstr, pattern> {
103 let DecoderNamespace = "Gamma";
106 let Inst{31-16} = src{19-4};
109 class I8rn<bits<4> opcode,
110 dag outs, dag ins, string asmstr, list<dag> pattern>
111 : IForm8<opcode, DstReg, SrcIndReg, 2, outs, ins, asmstr, pattern> {
112 let DecoderNamespace = "Delta";
115 class I8rp<bits<4> opcode,
116 dag outs, dag ins, string asmstr, list<dag> pattern>
117 : IForm8<opcode, DstReg, SrcPostInc, 2, outs, ins, asmstr, pattern> {
118 let DecoderNamespace = "Delta";
121 class I8mr<bits<4> opcode,
122 dag outs, dag ins, string asmstr, list<dag> pattern>
123 : IForm8<opcode, DstMem, SrcReg, 4, outs, ins, asmstr, pattern> {
124 let DecoderNamespace = "Alpha";
127 let Inst{31-16} = dst{19-4};
130 class I8mi<bits<4> opcode,
131 dag outs, dag ins, string asmstr, list<dag> pattern>
132 : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> {
133 let DecoderNamespace = "Gamma";
137 let Inst{31-16} = imm;
139 let Inst{47-32} = dst{19-4};
142 class I8mc<bits<4> opcode,
143 dag outs, dag ins, string asmstr, list<dag> pattern>
144 : MSP430Inst<outs, ins, 4, asmstr> {
145 let DecoderNamespace = "Beta";
146 let Pattern = pattern;
151 let Inst{31-16} = dst{19-4};
152 let Inst{15-12} = opcode;
153 let Inst{11-8} = imm{3-0};
154 let Inst{7} = DstMem.Value;
156 let Inst{5-4} = imm{5-4};
157 let Inst{3-0} = dst{3-0};
160 class I8mm<bits<4> opcode,
161 dag outs, dag ins, string asmstr, list<dag> pattern>
162 : IForm8<opcode, DstMem, SrcMem, 6, outs, ins, asmstr, pattern> {
163 let DecoderNamespace = "Gamma";
167 let Inst{31-16} = src{19-4};
169 let Inst{47-32} = dst{19-4};
172 class I8mn<bits<4> opcode,
173 dag outs, dag ins, string asmstr, list<dag> pattern>
174 : IForm8<opcode, DstMem, SrcIndReg, 4, outs, ins, asmstr, pattern> {
175 let DecoderNamespace = "Delta";
178 let Inst{31-16} = dst{19-4};
181 class I8mp<bits<4> opcode,
182 dag outs, dag ins, string asmstr, list<dag> pattern>
183 : IForm8<opcode, DstMem, SrcPostInc, 4, outs, ins, asmstr, pattern> {
184 let DecoderNamespace = "Delta";
187 let Inst{31-16} = dst{19-4};
190 // 16 bit IForm instructions
191 class IForm16<bits<4> opcode, DestMode dest, SourceMode src, int size,
192 dag outs, dag ins, string asmstr, list<dag> pattern>
193 : IForm<opcode, dest, 0, src, size, outs, ins, asmstr, pattern>;
195 class I16rr<bits<4> opcode,
196 dag outs, dag ins, string asmstr, list<dag> pattern>
197 : IForm16<opcode, DstReg, SrcReg, 2, outs, ins, asmstr, pattern> {
198 let DecoderNamespace = "Alpha";
201 class I16ri<bits<4> opcode,
202 dag outs, dag ins, string asmstr, list<dag> pattern>
203 : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> {
204 let DecoderNamespace = "Gamma";
206 let Inst{31-16} = imm;
210 class I16rc<bits<4> opcode,
211 dag outs, dag ins, string asmstr, list<dag> pattern>
212 : MSP430Inst<outs, ins, 2, asmstr> {
213 let DecoderNamespace = "Beta";
214 let Pattern = pattern;
219 let Inst{15-12} = opcode;
220 let Inst{11-8} = imm{3-0};
221 let Inst{7} = DstReg.Value;
223 let Inst{5-4} = imm{5-4};
227 class I16rm<bits<4> opcode,
228 dag outs, dag ins, string asmstr, list<dag> pattern>
229 : IForm16<opcode, DstReg, SrcMem, 4, outs, ins, asmstr, pattern> {
230 let DecoderNamespace = "Gamma";
233 let Inst{31-16} = src{19-4};
236 class I16rn<bits<4> opcode,
237 dag outs, dag ins, string asmstr, list<dag> pattern>
238 : IForm16<opcode, DstReg, SrcIndReg, 2, outs, ins, asmstr, pattern> {
239 let DecoderNamespace = "Delta";
242 class I16rp<bits<4> opcode,
243 dag outs, dag ins, string asmstr, list<dag> pattern>
244 : IForm16<opcode, DstReg, SrcPostInc, 2, outs, ins, asmstr, pattern> {
245 let DecoderNamespace = "Delta";
248 class I16mr<bits<4> opcode,
249 dag outs, dag ins, string asmstr, list<dag> pattern>
250 : IForm16<opcode, DstMem, SrcReg, 4, outs, ins, asmstr, pattern> {
251 let DecoderNamespace = "Alpha";
254 let Inst{31-16} = dst{19-4};
257 class I16mi<bits<4> opcode,
258 dag outs, dag ins, string asmstr, list<dag> pattern>
259 : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> {
260 let DecoderNamespace = "Gamma";
263 let Inst{31-16} = imm;
266 let Inst{47-32} = dst{19-4};
269 class I16mc<bits<4> opcode,
270 dag outs, dag ins, string asmstr, list<dag> pattern>
271 : MSP430Inst<outs, ins, 4, asmstr> {
272 let DecoderNamespace = "Beta";
273 let Pattern = pattern;
278 let Inst{31-16} = dst{19-4};
279 let Inst{15-12} = opcode;
280 let Inst{11-8} = imm{3-0};
281 let Inst{7} = DstMem.Value;
283 let Inst{5-4} = imm{5-4};
284 let Inst{3-0} = dst{3-0};
287 class I16mm<bits<4> opcode,
288 dag outs, dag ins, string asmstr, list<dag> pattern>
289 : IForm16<opcode, DstMem, SrcMem, 6, outs, ins, asmstr, pattern> {
290 let DecoderNamespace = "Gamma";
294 let Inst{31-16} = src{19-4};
296 let Inst{47-32} = dst{19-4};
299 class I16mn<bits<4> opcode,
300 dag outs, dag ins, string asmstr, list<dag> pattern>
301 : IForm16<opcode, DstMem, SrcIndReg, 4, outs, ins, asmstr, pattern> {
302 let DecoderNamespace = "Delta";
305 let Inst{31-16} = dst{19-4};
308 class I16mp<bits<4> opcode,
309 dag outs, dag ins, string asmstr, list<dag> pattern>
310 : IForm16<opcode, DstMem, SrcPostInc, 4, outs, ins, asmstr, pattern> {
311 let DecoderNamespace = "Delta";
314 let Inst{31-16} = dst{19-4};
317 // MSP430 Single Operand (Format II) Instructions
318 class IIForm<bits<3> opcode, bit bw, SourceMode as, int size,
319 dag outs, dag ins, string asmstr, list<dag> pattern>
320 : MSP430Inst<outs, ins, size, asmstr> {
321 let Pattern = pattern;
325 let Inst{15-10} = 0b000100;
326 let Inst{9-7} = opcode;
328 let Inst{5-4} = as.Value;
332 // 8 bit IIForm instructions
333 class IIForm8<bits<3> opcode, SourceMode src, int size,
334 dag outs, dag ins, string asmstr, list<dag> pattern>
335 : IIForm<opcode, 1, src, size, outs, ins, asmstr, pattern>;
337 class II8r<bits<3> opcode,
338 dag outs, dag ins, string asmstr, list<dag> pattern>
339 : IIForm8<opcode, SrcReg, 2, outs, ins, asmstr, pattern>;
341 class II8m<bits<3> opcode,
342 dag outs, dag ins, string asmstr, list<dag> pattern>
343 : IIForm8<opcode, SrcMem, 4, outs, ins, asmstr, pattern> {
346 let Inst{31-16} = src{19-4};
349 class II8i<bits<3> opcode,
350 dag outs, dag ins, string asmstr, list<dag> pattern>
351 : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
354 let Inst{31-16} = imm;
357 class II8c<bits<3> opcode,
358 dag outs, dag ins, string asmstr, list<dag> pattern>
359 : MSP430Inst<outs, ins, 2, asmstr> {
360 let Pattern = pattern;
364 let Inst{15-10} = 0b000100;
365 let Inst{9-7} = opcode;
370 class II8n<bits<3> opcode,
371 dag outs, dag ins, string asmstr, list<dag> pattern>
372 : IIForm8<opcode, SrcIndReg, 2, outs, ins, asmstr, pattern>;
374 class II8p<bits<3> opcode,
375 dag outs, dag ins, string asmstr, list<dag> pattern>
376 : IIForm8<opcode, SrcPostInc, 2, outs, ins, asmstr, pattern>;
378 // 16 bit IIForm instructions
379 class IIForm16<bits<3> opcode, SourceMode src, int size,
380 dag outs, dag ins, string asmstr, list<dag> pattern>
381 : IIForm<opcode, 0, src, size, outs, ins, asmstr, pattern>;
383 class II16r<bits<3> opcode,
384 dag outs, dag ins, string asmstr, list<dag> pattern>
385 : IIForm16<opcode, SrcReg, 2, outs, ins, asmstr, pattern>;
387 class II16m<bits<3> opcode,
388 dag outs, dag ins, string asmstr, list<dag> pattern>
389 : IIForm16<opcode, SrcMem, 4, outs, ins, asmstr, pattern> {
392 let Inst{31-16} = src{19-4};
395 class II16i<bits<3> opcode,
396 dag outs, dag ins, string asmstr, list<dag> pattern>
397 : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
400 let Inst{31-16} = imm;
403 class II16c<bits<3> opcode,
404 dag outs, dag ins, string asmstr, list<dag> pattern>
405 : MSP430Inst<outs, ins, 2, asmstr> {
406 let Pattern = pattern;
410 let Inst{15-10} = 0b000100;
411 let Inst{9-7} = opcode;
416 class II16n<bits<3> opcode,
417 dag outs, dag ins, string asmstr, list<dag> pattern>
418 : IIForm16<opcode, SrcIndReg, 2, outs, ins, asmstr, pattern>;
420 class II16p<bits<3> opcode,
421 dag outs, dag ins, string asmstr, list<dag> pattern>
422 : IIForm16<opcode, SrcPostInc, 2, outs, ins, asmstr, pattern>;
424 // MSP430 Conditional Jumps Instructions
425 class CJForm<dag outs, dag ins, string asmstr, list<dag> pattern>
426 : MSP430Inst<outs, ins, 2, asmstr> {
427 let Pattern = pattern;
432 let Inst{15-13} = 0b001;
433 let Inst{12-10} = cond;
437 // Pseudo instructions
438 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
439 : MSP430Inst<outs, ins, 0, asmstr> {
440 let Pattern = pattern;