1 //=- MicroMips64r6InstrFormats.td - Instruction Formats -*- tablegen -* -=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes microMIPS64r6 instruction formats.
12 //===----------------------------------------------------------------------===//
21 let Inst{31-26} = 0b111100;
27 class POOL32I_ADD_IMM_FM_MMR6<bits<5> funct> {
33 let Inst{31-26} = 0b010000;
34 let Inst{25-21} = funct;
39 class POOL32S_EXTBITS_FM_MMR6<bits<6> funct> {
47 let Inst{31-26} = 0b010110;
50 let Inst{15-11} = size;
52 let Inst{5-0} = funct;
55 class POOL32S_DALIGN_FM_MMR6 {
63 let Inst{31-26} = 0b010110;
69 let Inst{5-0} = 0b011100;
72 class POOL32A_DIVMOD_FM_MMR6<string instr_asm, bits<9> funct>
73 : MMR6Arch<instr_asm> {
80 let Inst{31-26} = 0b010110;
84 let Inst{10-9} = 0b00;
85 let Inst{8-0} = funct;
88 class POOL32S_DMFTC0_FM_MMR6<string instr_asm, bits<5> funct>
89 : MMR6Arch<instr_asm>, MipsR6Inst {
96 let Inst{31-26} = 0b010110;
100 let Inst{13-11} = sel;
101 let Inst{10-6} = funct;
102 let Inst{5-0} = 0b111100;
105 class POOL32S_ARITH_FM_MMR6<string opstr, bits<9> funct>
113 let Inst{31-26} = 0b010110;
114 let Inst{25-21} = rt;
115 let Inst{20-16} = rs;
116 let Inst{15-11} = rd;
117 let Inst{10-9} = 0b00;
118 let Inst{8-0} = funct;
121 class DADDIU_FM_MMR6<string opstr> : MMR6Arch<opstr> {
128 let Inst{31-26} = 0b010111;
129 let Inst{25-21} = rt;
130 let Inst{20-16} = rs;
131 let Inst{15-0} = imm16;
134 class PCREL18_FM_MMR6<bits<3> funct> : MipsR6Inst {
140 let Inst{31-26} = 0b011110;
141 let Inst{25-21} = rt;
142 let Inst{20-18} = funct;
143 let Inst{17-0} = imm;
146 class POOL32S_2R_FM_MMR6<string instr_asm, bits<10> funct>
147 : MMR6Arch<instr_asm>, MipsR6Inst {
153 let Inst{31-26} = 0b010110;
154 let Inst{25-21} = rt;
155 let Inst{20-16} = rs;
156 let Inst{15-6} = funct;
157 let Inst{5-0} = 0b111100;
160 class POOL32S_2RSA5B0_FM_MMR6<string instr_asm, bits<9> funct>
161 : MMR6Arch<instr_asm>, MipsR6Inst {
168 let Inst{31-26} = 0b010110;
169 let Inst{25-21} = rt;
170 let Inst{20-16} = rs;
171 let Inst{15-11} = sa;
172 let Inst{10-9} = 0b00;
173 let Inst{8-0} = funct;
176 class LD_SD_32_2R_OFFSET16_FM_MMR6<string instr_asm, bits<6> op>
177 : MMR6Arch<instr_asm>, MipsR6Inst {
180 bits<5> base = addr{20-16};
181 bits<16> offset = addr{15-0};
185 let Inst{31-26} = op;
186 let Inst{25-21} = rt;
187 let Inst{20-16} = base;
188 let Inst{15-0} = offset;
191 class POOL32C_2R_OFFSET12_FM_MMR6<string instr_asm, bits<4> funct>
192 : MMR6Arch<instr_asm>, MipsR6Inst {
195 bits<5> base = addr{20-16};
196 bits<12> offset = addr{11-0};
200 let Inst{31-26} = 0b011000;
201 let Inst{25-21} = rt;
202 let Inst{20-16} = base;
203 let Inst{15-12} = funct;
204 let Inst{11-0} = offset;
207 class POOL32S_3R_FM_MMR6<string instr_asm, bits<9> funct>
208 : MMR6Arch<instr_asm>, MipsR6Inst {
215 let Inst{31-26} = 0b010110;
216 let Inst{25-21} = rt;
217 let Inst{20-16} = rs;
218 let Inst{15-11} = rd;
219 let Inst{10-9} = 0b00;
220 let Inst{8-0} = funct;