1 //===-- Mips16FrameLowering.cpp - Mips16 Frame Information ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips16 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "Mips16FrameLowering.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsInstrInfo.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSubtarget.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/IR/DataLayout.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/Target/TargetOptions.h"
31 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI)
32 : MipsFrameLowering(STI, STI.stackAlignment()) {}
34 void Mips16FrameLowering::emitPrologue(MachineFunction &MF,
35 MachineBasicBlock &MBB) const {
36 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
37 MachineFrameInfo &MFI = MF.getFrameInfo();
38 const Mips16InstrInfo &TII =
39 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
40 MachineBasicBlock::iterator MBBI = MBB.begin();
42 // Debug location must be unknown since the first debug location is used
43 // to determine the end of the prologue.
46 uint64_t StackSize = MFI.getStackSize();
48 // No need to allocate space on the stack.
49 if (StackSize == 0 && !MFI.adjustsStack()) return;
51 MachineModuleInfo &MMI = MF.getMMI();
52 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
53 MachineLocation DstML, SrcML;
56 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
58 // emit ".cfi_def_cfa_offset StackSize"
59 unsigned CFIIndex = MF.addFrameInst(
60 MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize));
61 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
62 .addCFIIndex(CFIIndex);
64 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
67 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
69 for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
70 E = CSI.end(); I != E; ++I) {
71 int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
72 unsigned Reg = I->getReg();
73 unsigned DReg = MRI->getDwarfRegNum(Reg, true);
74 unsigned CFIIndex = MF.addFrameInst(
75 MCCFIInstruction::createOffset(nullptr, DReg, Offset));
76 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
77 .addCFIIndex(CFIIndex);
81 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
82 .addReg(Mips::SP).setMIFlag(MachineInstr::FrameSetup);
86 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
87 MachineBasicBlock &MBB) const {
88 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
89 MachineFrameInfo &MFI = MF.getFrameInfo();
90 const Mips16InstrInfo &TII =
91 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
92 DebugLoc dl = MBBI->getDebugLoc();
93 uint64_t StackSize = MFI.getStackSize();
99 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
103 // assumes stacksize multiple of 8
104 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
107 bool Mips16FrameLowering::
108 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
109 MachineBasicBlock::iterator MI,
110 const std::vector<CalleeSavedInfo> &CSI,
111 const TargetRegisterInfo *TRI) const {
112 MachineFunction *MF = MBB.getParent();
113 MachineBasicBlock *EntryBlock = &MF->front();
116 // Registers RA, S0,S1 are the callee saved registers and they
117 // will be saved with the "save" instruction
118 // during emitPrologue
120 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
121 // Add the callee-saved register as live-in. Do not add if the register is
122 // RA and return address is taken, because it has already been added in
123 // method MipsTargetLowering::lowerRETURNADDR.
124 // It's killed at the spill, unless the register is RA and return address
126 unsigned Reg = CSI[i].getReg();
127 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
128 && MF->getFrameInfo().isReturnAddressTaken();
129 if (!IsRAAndRetAddrIsTaken)
130 EntryBlock->addLiveIn(Reg);
136 bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
137 MachineBasicBlock::iterator MI,
138 const std::vector<CalleeSavedInfo> &CSI,
139 const TargetRegisterInfo *TRI) const {
141 // Registers RA,S0,S1 are the callee saved registers and they will be restored
142 // with the restore instruction during emitEpilogue.
143 // We need to override this virtual function, otherwise llvm will try and
144 // restore the registers on it's on from the stack.
151 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
152 const MachineFrameInfo &MFI = MF.getFrameInfo();
153 // Reserve call frame if the size of the maximum call frame fits into 15-bit
154 // immediate field and there are no variable sized objects on the stack.
155 return isInt<15>(MFI.getMaxCallFrameSize()) && !MFI.hasVarSizedObjects();
158 void Mips16FrameLowering::determineCalleeSaves(MachineFunction &MF,
159 BitVector &SavedRegs,
160 RegScavenger *RS) const {
161 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
162 const Mips16InstrInfo &TII =
163 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
164 const MipsRegisterInfo &RI = TII.getRegisterInfo();
165 const BitVector Reserved = RI.getReservedRegs(MF);
166 bool SaveS2 = Reserved[Mips::S2];
168 SavedRegs.set(Mips::S2);
170 SavedRegs.set(Mips::S0);
173 const MipsFrameLowering *
174 llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
175 return new Mips16FrameLowering(ST);