1 //===-- Mips16InstrInfo.h - Mips16 Instruction Information ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips16 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPS16INSTRINFO_H
15 #define LLVM_LIB_TARGET_MIPS_MIPS16INSTRINFO_H
17 #include "Mips16RegisterInfo.h"
18 #include "MipsInstrInfo.h"
22 class Mips16InstrInfo : public MipsInstrInfo {
23 const Mips16RegisterInfo RI;
26 explicit Mips16InstrInfo(const MipsSubtarget &STI);
28 const MipsRegisterInfo &getRegisterInfo() const override;
30 /// isLoadFromStackSlot - If the specified machine instruction is a direct
31 /// load from a stack slot, return the virtual or physical register number of
32 /// the destination along with the FrameIndex of the loaded stack slot. If
33 /// not, return 0. This predicate must return 0 if the instruction has
34 /// any side effects other than loading from the stack slot.
35 unsigned isLoadFromStackSlot(const MachineInstr &MI,
36 int &FrameIndex) const override;
38 /// isStoreToStackSlot - If the specified machine instruction is a direct
39 /// store to a stack slot, return the virtual or physical register number of
40 /// the source reg along with the FrameIndex of the loaded stack slot. If
41 /// not, return 0. This predicate must return 0 if the instruction has
42 /// any side effects other than storing to the stack slot.
43 unsigned isStoreToStackSlot(const MachineInstr &MI,
44 int &FrameIndex) const override;
46 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
47 const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
48 bool KillSrc) const override;
50 void storeRegToStack(MachineBasicBlock &MBB,
51 MachineBasicBlock::iterator MBBI,
52 unsigned SrcReg, bool isKill, int FrameIndex,
53 const TargetRegisterClass *RC,
54 const TargetRegisterInfo *TRI,
55 int64_t Offset) const override;
57 void loadRegFromStack(MachineBasicBlock &MBB,
58 MachineBasicBlock::iterator MBBI,
59 unsigned DestReg, int FrameIndex,
60 const TargetRegisterClass *RC,
61 const TargetRegisterInfo *TRI,
62 int64_t Offset) const override;
64 bool expandPostRAPseudo(MachineInstr &MI) const override;
66 unsigned getOppositeBranchOpc(unsigned Opc) const override;
68 // Adjust SP by FrameSize bytes. Save RA, S0, S1
69 void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
70 MachineBasicBlock::iterator I) const;
72 // Adjust SP by FrameSize bytes. Restore RA, S0, S1
73 void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
74 MachineBasicBlock::iterator I) const;
77 /// Adjust SP by Amount bytes.
78 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
79 MachineBasicBlock::iterator I) const override;
81 /// Emit a series of instructions to load an immediate.
82 // This is to adjust some FrameReg. We return the new register to be used
83 // in place of FrameReg and the adjusted immediate field (&NewImm)
85 unsigned loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB,
86 MachineBasicBlock::iterator II, const DebugLoc &DL,
87 unsigned &NewImm) const;
89 static bool validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount);
91 static bool validSpImm8(int offset) {
92 return ((offset & 7) == 0) && isInt<11>(offset);
96 // build the proper one based on the Imm field
99 const MCInstrDesc& AddiuSpImm(int64_t Imm) const;
102 (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const;
104 unsigned getInlineAsmLength(const char *Str,
105 const MCAsmInfo &MAI) const override;
107 unsigned getAnalyzableBrOpc(unsigned Opc) const override;
109 void ExpandRetRA16(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
112 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
113 void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
114 MachineBasicBlock::iterator I,
115 unsigned Reg1, unsigned Reg2) const;
117 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
118 void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount,
119 MachineBasicBlock &MBB,
120 MachineBasicBlock::iterator I) const;