1 //===- MipsEVAInstrInfo.td - EVA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips EVA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
16 // Instruction encodings
18 //===----------------------------------------------------------------------===//
20 // Memory Load/Store EVA encodings
21 class LBE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LBE>;
22 class LBuE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LBuE>;
23 class LHE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LHE>;
24 class LHuE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LHuE>;
25 class LWE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LWE>;
27 class SBE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SBE>;
28 class SHE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SHE>;
29 class SWE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SWE>;
31 // load/store left/right EVA encodings
32 class LWLE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LWLE>;
33 class LWRE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LWRE>;
34 class SWLE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SWLE>;
35 class SWRE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SWRE>;
37 // Load-linked EVA, Store-conditional EVA encodings
38 class LLE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LLE>;
39 class SCE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SCE>;
41 class TLBINV_ENC : TLB_FM<OPCODE6_TLBINV>;
42 class TLBINVF_ENC : TLB_FM<OPCODE6_TLBINVF>;
44 class CACHEE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_CACHEE>;
45 class PREFE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_PREFE>;
47 //===----------------------------------------------------------------------===//
49 // Instruction descriptions
51 //===----------------------------------------------------------------------===//
53 // Memory Load/Store EVA descriptions
54 class LOAD_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
55 InstrItinClass itin = NoItinerary> {
56 dag OutOperandList = (outs GPROpnd:$rt);
57 dag InOperandList = (ins mem_simm9:$addr);
58 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
59 list<dag> Pattern = [];
60 string DecoderMethod = "DecodeMemEVA";
61 bit canFoldAsLoad = 1;
63 InstrItinClass Itinerary = itin;
66 class LBE_DESC : LOAD_EVA_DESC_BASE<"lbe", GPR32Opnd, II_LBE>;
67 class LBuE_DESC : LOAD_EVA_DESC_BASE<"lbue", GPR32Opnd, II_LBUE>;
68 class LHE_DESC : LOAD_EVA_DESC_BASE<"lhe", GPR32Opnd, II_LHE>;
69 class LHuE_DESC : LOAD_EVA_DESC_BASE<"lhue", GPR32Opnd, II_LHUE>;
70 class LWE_DESC : LOAD_EVA_DESC_BASE<"lwe", GPR32Opnd, II_LWE>;
72 class STORE_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
73 SDPatternOperator OpNode = null_frag,
74 InstrItinClass itin = NoItinerary> {
75 dag OutOperandList = (outs);
76 dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr);
77 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
78 list<dag> Pattern = [];
79 string DecoderMethod = "DecodeMemEVA";
81 InstrItinClass Itinerary = itin;
84 class SBE_DESC : STORE_EVA_DESC_BASE<"sbe", GPR32Opnd, null_frag, II_SBE>;
85 class SHE_DESC : STORE_EVA_DESC_BASE<"she", GPR32Opnd, null_frag, II_SHE>;
86 class SWE_DESC : STORE_EVA_DESC_BASE<"swe", GPR32Opnd, null_frag, II_SWE>;
88 // Load/Store Left/Right EVA descriptions
89 class LOAD_LEFT_RIGHT_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
90 InstrItinClass itin = NoItinerary> {
91 dag OutOperandList = (outs GPROpnd:$rt);
92 dag InOperandList = (ins mem_simm9:$addr, GPROpnd:$src);
93 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
94 list<dag> Pattern = [];
95 string DecoderMethod = "DecodeMemEVA";
96 string Constraints = "$src = $rt";
97 bit canFoldAsLoad = 1;
98 InstrItinClass Itinerary = itin;
101 class LWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwle", GPR32Opnd, II_LWLE>;
102 class LWRE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwre", GPR32Opnd, II_LWRE>;
104 class STORE_LEFT_RIGHT_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
105 InstrItinClass itin = NoItinerary> {
106 dag OutOperandList = (outs);
107 dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr);
108 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
109 list<dag> Pattern = [];
110 string DecoderMethod = "DecodeMemEVA";
111 InstrItinClass Itinerary = itin;
114 class SWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"swle", GPR32Opnd, II_SWLE>;
115 class SWRE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"swre", GPR32Opnd, II_SWRE>;
117 // Load-linked EVA, Store-conditional EVA descriptions
118 class LLE_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
119 InstrItinClass itin = NoItinerary> {
120 dag OutOperandList = (outs GPROpnd:$rt);
121 dag InOperandList = (ins mem_simm9:$addr);
122 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
123 list<dag> Pattern = [];
125 string DecoderMethod = "DecodeMemEVA";
126 InstrItinClass Itinerary = itin;
129 class LLE_DESC : LLE_DESC_BASE<"lle", GPR32Opnd, II_LLE>;
131 class SCE_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
132 InstrItinClass itin = NoItinerary> {
133 dag OutOperandList = (outs GPROpnd:$dst);
134 dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr);
135 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
136 list<dag> Pattern = [];
138 string Constraints = "$rt = $dst";
139 string DecoderMethod = "DecodeMemEVA";
140 InstrItinClass Itinerary = itin;
143 class SCE_DESC : SCE_DESC_BASE<"sce", GPR32Opnd, II_SCE>;
145 class TLB_DESC_BASE<string instr_asm, InstrItinClass itin = NoItinerary> {
146 dag OutOperandList = (outs);
147 dag InOperandList = (ins);
148 string AsmString = instr_asm;
149 list<dag> Pattern = [];
150 InstrItinClass Itinerary = itin;
153 class TLBINV_DESC : TLB_DESC_BASE<"tlbinv", II_TLBINV>;
154 class TLBINVF_DESC : TLB_DESC_BASE<"tlbinvf", II_TLBINVF>;
156 class CACHEE_DESC_BASE<string instr_asm, Operand MemOpnd,
157 InstrItinClass itin = NoItinerary> {
158 dag OutOperandList = (outs);
159 dag InOperandList = (ins MemOpnd:$addr, uimm5:$hint);
160 string AsmString = !strconcat(instr_asm, "\t$hint, $addr");
161 list<dag> Pattern = [];
162 string DecoderMethod = "DecodeCacheeOp_CacheOpR6";
163 InstrItinClass Itinerary = itin;
166 class CACHEE_DESC : CACHEE_DESC_BASE<"cachee", mem_simm9, II_CACHEE>;
167 class PREFE_DESC : CACHEE_DESC_BASE<"prefe", mem_simm9, II_PREFE>;
169 //===----------------------------------------------------------------------===//
171 // Instruction definitions
173 //===----------------------------------------------------------------------===//
175 /// Load and Store EVA Instructions
176 def LBE : LBE_ENC, LBE_DESC, INSN_EVA;
177 def LBuE : LBuE_ENC, LBuE_DESC, INSN_EVA;
178 def LHE : LHE_ENC, LHE_DESC, INSN_EVA;
179 def LHuE : LHuE_ENC, LHuE_DESC, INSN_EVA;
180 let AdditionalPredicates = [NotInMicroMips] in {
181 def LWE : LWE_ENC, LWE_DESC, INSN_EVA;
183 def SBE : SBE_ENC, SBE_DESC, INSN_EVA;
184 def SHE : SHE_ENC, SHE_DESC, INSN_EVA;
185 let AdditionalPredicates = [NotInMicroMips] in {
186 def SWE : SWE_ENC, SWE_DESC, INSN_EVA;
189 /// load/store left/right EVA
190 let AdditionalPredicates = [NotInMicroMips] in {
191 def LWLE : LWLE_ENC, LWLE_DESC, INSN_EVA_NOT_32R6_64R6;
192 def LWRE : LWRE_ENC, LWRE_DESC, INSN_EVA_NOT_32R6_64R6;
193 def SWLE : SWLE_ENC, SWLE_DESC, INSN_EVA_NOT_32R6_64R6;
194 def SWRE : SWRE_ENC, SWRE_DESC, INSN_EVA_NOT_32R6_64R6;
197 /// Load-linked EVA, Store-conditional EVA
198 let AdditionalPredicates = [NotInMicroMips] in {
199 def LLE : LLE_ENC, LLE_DESC, INSN_EVA;
200 def SCE : SCE_ENC, SCE_DESC, INSN_EVA;
203 let AdditionalPredicates = [NotInMicroMips] in {
204 def TLBINV : TLBINV_ENC, TLBINV_DESC, INSN_EVA;
205 def TLBINVF : TLBINVF_ENC, TLBINVF_DESC, INSN_EVA;
208 def CACHEE : CACHEE_ENC, CACHEE_DESC, INSN_EVA;
209 def PREFE : PREFE_ENC, PREFE_DESC, INSN_EVA;