1 //===---- MipsISelDAGToDAG.h - A Dag to Dag Inst Selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H
18 #include "MipsSubtarget.h"
19 #include "MipsTargetMachine.h"
20 #include "llvm/CodeGen/SelectionDAGISel.h"
22 //===----------------------------------------------------------------------===//
23 // Instruction Selector Implementation
24 //===----------------------------------------------------------------------===//
26 //===----------------------------------------------------------------------===//
27 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
28 // instructions for SelectionDAG operations.
29 //===----------------------------------------------------------------------===//
32 class MipsDAGToDAGISel : public SelectionDAGISel {
34 explicit MipsDAGToDAGISel(MipsTargetMachine &TM, CodeGenOpt::Level OL)
35 : SelectionDAGISel(TM, OL), Subtarget(nullptr) {}
38 StringRef getPassName() const override {
39 return "MIPS DAG->DAG Pattern Instruction Selection";
42 bool runOnMachineFunction(MachineFunction &MF) override;
45 SDNode *getGlobalBaseReg();
47 /// Keep a pointer to the MipsSubtarget around so that we can make the right
48 /// decision when generating code for different targets.
49 const MipsSubtarget *Subtarget;
52 // Include the pieces autogenerated from the target description.
53 #include "MipsGenDAGISel.inc"
57 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const;
60 /// Fall back on this function if all else fails.
61 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
62 SDValue &Offset) const;
64 /// Match integer address pattern.
65 virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
66 SDValue &Offset) const;
68 virtual bool selectIntAddr11MM(SDValue Addr, SDValue &Base,
69 SDValue &Offset) const;
71 virtual bool selectIntAddr12MM(SDValue Addr, SDValue &Base,
72 SDValue &Offset) const;
74 virtual bool selectIntAddr16MM(SDValue Addr, SDValue &Base,
75 SDValue &Offset) const;
77 virtual bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
78 SDValue &Offset) const;
80 /// Match addr+simm10 and addr
81 virtual bool selectIntAddrSImm10(SDValue Addr, SDValue &Base,
82 SDValue &Offset) const;
84 virtual bool selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base,
85 SDValue &Offset) const;
87 virtual bool selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base,
88 SDValue &Offset) const;
90 virtual bool selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base,
91 SDValue &Offset) const;
93 virtual bool selectAddr16(SDValue Addr, SDValue &Base, SDValue &Offset);
94 virtual bool selectAddr16SP(SDValue Addr, SDValue &Base, SDValue &Offset);
96 /// \brief Select constant vector splats.
97 virtual bool selectVSplat(SDNode *N, APInt &Imm,
98 unsigned MinSizeInBits) const;
99 /// \brief Select constant vector splats whose value fits in a uimm1.
100 virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const;
101 /// \brief Select constant vector splats whose value fits in a uimm2.
102 virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const;
103 /// \brief Select constant vector splats whose value fits in a uimm3.
104 virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const;
105 /// \brief Select constant vector splats whose value fits in a uimm4.
106 virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const;
107 /// \brief Select constant vector splats whose value fits in a uimm5.
108 virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const;
109 /// \brief Select constant vector splats whose value fits in a uimm6.
110 virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const;
111 /// \brief Select constant vector splats whose value fits in a uimm8.
112 virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const;
113 /// \brief Select constant vector splats whose value fits in a simm5.
114 virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const;
115 /// \brief Select constant vector splats whose value is a power of 2.
116 virtual bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const;
117 /// \brief Select constant vector splats whose value is the inverse of a
119 virtual bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const;
120 /// \brief Select constant vector splats whose value is a run of set bits
121 /// ending at the most significant bit
122 virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const;
123 /// \brief Select constant vector splats whose value is a run of set bits
124 /// starting at bit zero.
125 virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const;
127 void Select(SDNode *N) override;
129 virtual bool trySelect(SDNode *Node) = 0;
131 // getImm - Return a target constant with the specified value.
132 inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
133 return CurDAG->getTargetConstant(Imm, SDLoc(Node), Node->getValueType(0));
136 virtual void processFunctionAfterISel(MachineFunction &MF) = 0;
138 bool SelectInlineAsmMemoryOperand(const SDValue &Op,
139 unsigned ConstraintID,
140 std::vector<SDValue> &OutOps) override;