1 //===- MipsTargetMachine.h - Define TargetMachine for Mips ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
17 #include "MCTargetDesc/MipsABIInfo.h"
18 #include "MipsSubtarget.h"
19 #include "llvm/ADT/Optional.h"
20 #include "llvm/ADT/StringMap.h"
21 #include "llvm/ADT/StringRef.h"
22 #include "llvm/Support/CodeGen.h"
23 #include "llvm/Target/TargetMachine.h"
28 class MipsTargetMachine : public LLVMTargetMachine {
30 std::unique_ptr<TargetLoweringObjectFile> TLOF;
33 MipsSubtarget *Subtarget;
34 MipsSubtarget DefaultSubtarget;
35 MipsSubtarget NoMips16Subtarget;
36 MipsSubtarget Mips16Subtarget;
38 mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
41 MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
42 StringRef FS, const TargetOptions &Options,
43 Optional<Reloc::Model> RM, CodeModel::Model CM,
44 CodeGenOpt::Level OL, bool isLittle);
45 ~MipsTargetMachine() override;
47 TargetIRAnalysis getTargetIRAnalysis() override;
49 const MipsSubtarget *getSubtargetImpl() const {
52 return &DefaultSubtarget;
55 const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
57 /// \brief Reset the subtarget for the Mips target.
58 void resetSubtarget(MachineFunction *MF);
60 // Pass Pipeline Configuration
61 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
63 TargetLoweringObjectFile *getObjFileLowering() const override {
67 bool isLittleEndian() const { return isLittle; }
68 const MipsABIInfo &getABI() const { return ABI; }
70 bool isMachineVerifierClean() const override {
75 /// Mips32/64 big endian target machine.
77 class MipsebTargetMachine : public MipsTargetMachine {
78 virtual void anchor();
81 MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
82 StringRef FS, const TargetOptions &Options,
83 Optional<Reloc::Model> RM, CodeModel::Model CM,
84 CodeGenOpt::Level OL);
87 /// Mips32/64 little endian target machine.
89 class MipselTargetMachine : public MipsTargetMachine {
90 virtual void anchor();
93 MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
94 StringRef FS, const TargetOptions &Options,
95 Optional<Reloc::Model> RM, CodeModel::Model CM,
96 CodeGenOpt::Level OL);
99 } // end namespace llvm
101 #endif // LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H