1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
17 #include "MCTargetDesc/MipsABIInfo.h"
18 #include "MipsSubtarget.h"
19 #include "llvm/CodeGen/BasicTTIImpl.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/CodeGen/SelectionDAGISel.h"
22 #include "llvm/Target/TargetFrameLowering.h"
23 #include "llvm/Target/TargetMachine.h"
26 class formatted_raw_ostream;
27 class MipsRegisterInfo;
29 class MipsTargetMachine : public LLVMTargetMachine {
31 std::unique_ptr<TargetLoweringObjectFile> TLOF;
34 MipsSubtarget *Subtarget;
35 MipsSubtarget DefaultSubtarget;
36 MipsSubtarget NoMips16Subtarget;
37 MipsSubtarget Mips16Subtarget;
39 mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
42 MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
43 StringRef FS, const TargetOptions &Options,
44 Optional<Reloc::Model> RM, CodeModel::Model CM,
45 CodeGenOpt::Level OL, bool isLittle);
46 ~MipsTargetMachine() override;
48 TargetIRAnalysis getTargetIRAnalysis() override;
50 const MipsSubtarget *getSubtargetImpl() const {
53 return &DefaultSubtarget;
56 const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
58 /// \brief Reset the subtarget for the Mips target.
59 void resetSubtarget(MachineFunction *MF);
61 // Pass Pipeline Configuration
62 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
64 TargetLoweringObjectFile *getObjFileLowering() const override {
68 bool isLittleEndian() const { return isLittle; }
69 const MipsABIInfo &getABI() const { return ABI; }
72 /// Mips32/64 big endian target machine.
74 class MipsebTargetMachine : public MipsTargetMachine {
75 virtual void anchor();
77 MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
78 StringRef FS, const TargetOptions &Options,
79 Optional<Reloc::Model> RM, CodeModel::Model CM,
80 CodeGenOpt::Level OL);
83 /// Mips32/64 little endian target machine.
85 class MipselTargetMachine : public MipsTargetMachine {
86 virtual void anchor();
88 MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
89 StringRef FS, const TargetOptions &Options,
90 Optional<Reloc::Model> RM, CodeModel::Model CM,
91 CodeGenOpt::Level OL);
94 } // End llvm namespace