contrib/llvm/lib/Target/NVPTX/NVPTX.td

   1 //===- NVPTX.td - Describe the NVPTX Target Machine -----------*- tblgen -*-==//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 // This is the top level entry point for the NVPTX target.
  10 //===----------------------------------------------------------------------===//
  11
  12 //===----------------------------------------------------------------------===//
  13 // Target-independent interfaces
  14 //===----------------------------------------------------------------------===//
  15
  16 include "llvm/Target/Target.td"
  17
  18 include "NVPTXRegisterInfo.td"
  19 include "NVPTXInstrInfo.td"
  20
  21 //===----------------------------------------------------------------------===//
  22 // Subtarget Features.
  23 // - We use the SM version number instead of explicit feature table.
  24 // - Need at least one feature to avoid generating zero sized array by
  25 //   TableGen in NVPTXGenSubtarget.inc.
  26 //===----------------------------------------------------------------------===//
  27
  28 // SM Versions
  29 def SM20 : SubtargetFeature<"sm_20", "SmVersion", "20",
  30                             "Target SM 2.0">;
  31 def SM21 : SubtargetFeature<"sm_21", "SmVersion", "21",
  32                             "Target SM 2.1">;
  33 def SM30 : SubtargetFeature<"sm_30", "SmVersion", "30",
  34                             "Target SM 3.0">;
  35 def SM32 : SubtargetFeature<"sm_32", "SmVersion", "32",
  36                             "Target SM 3.2">;
  37 def SM35 : SubtargetFeature<"sm_35", "SmVersion", "35",
  38                             "Target SM 3.5">;
  39 def SM37 : SubtargetFeature<"sm_37", "SmVersion", "37",
  40                             "Target SM 3.7">;
  41 def SM50 : SubtargetFeature<"sm_50", "SmVersion", "50",
  42                             "Target SM 5.0">;
  43 def SM52 : SubtargetFeature<"sm_52", "SmVersion", "52",
  44                             "Target SM 5.2">;
  45 def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53",
  46                             "Target SM 5.3">;
  47 def SM60 : SubtargetFeature<"sm_60", "SmVersion", "60",
  48                              "Target SM 6.0">;
  49 def SM61 : SubtargetFeature<"sm_61", "SmVersion", "61",
  50                              "Target SM 6.1">;
  51 def SM62 : SubtargetFeature<"sm_62", "SmVersion", "62",
  52                              "Target SM 6.2">;
  53
  54 // PTX Versions
  55 def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
  56                              "Use PTX version 3.2">;
  57 def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
  58                              "Use PTX version 4.0">;
  59 def PTX41 : SubtargetFeature<"ptx41", "PTXVersion", "41",
  60                              "Use PTX version 4.1">;
  61 def PTX42 : SubtargetFeature<"ptx42", "PTXVersion", "42",
  62                              "Use PTX version 4.2">;
  63 def PTX43 : SubtargetFeature<"ptx43", "PTXVersion", "43",
  64                              "Use PTX version 4.3">;
  65 def PTX50 : SubtargetFeature<"ptx50", "PTXVersion", "50",
  66                              "Use PTX version 5.0">;
  67
  68 //===----------------------------------------------------------------------===//
  69 // NVPTX supported processors.
  70 //===----------------------------------------------------------------------===//
  71
  72 class Proc<string Name, list<SubtargetFeature> Features>
  73  : Processor<Name, NoItineraries, Features>;
  74
  75 def : Proc<"sm_20", [SM20]>;
  76 def : Proc<"sm_21", [SM21]>;
  77 def : Proc<"sm_30", [SM30]>;
  78 def : Proc<"sm_32", [SM32, PTX40]>;
  79 def : Proc<"sm_35", [SM35]>;
  80 def : Proc<"sm_37", [SM37, PTX41]>;
  81 def : Proc<"sm_50", [SM50, PTX40]>;
  82 def : Proc<"sm_52", [SM52, PTX41]>;
  83 def : Proc<"sm_53", [SM53, PTX42]>;
  84 def : Proc<"sm_60", [SM60, PTX50]>;
  85 def : Proc<"sm_61", [SM61, PTX50]>;
  86 def : Proc<"sm_62", [SM62, PTX50]>;
  87
  88 def NVPTXInstrInfo : InstrInfo {
  89 }
  90
  91 def NVPTX : Target {
  92   let InstructionSet = NVPTXInstrInfo;
  93 }