1 //===-- Nios2RegisterInfo.td - Nios2 Register defs ---------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // We have bank of 32 registers.
11 class Nios2Reg<string n> : Register<n> {
13 let Namespace = "Nios2";
16 // Nios2 CPU Registers
17 class Nios2GPRReg<bits<5> num, string n> : Nios2Reg<n> {
21 //===----------------------------------------------------------------------===//
23 //===----------------------------------------------------------------------===//
25 let Namespace = "Nios2" in {
26 // General Purpose Registers
27 def ZERO : Nios2GPRReg<0, "zero">, DwarfRegNum<[ 0 ]>;
28 def AT : Nios2GPRReg<1, "at">, DwarfRegNum<[ 1 ]>;
29 foreach RegNum = 2 - 23 in {
30 def R #RegNum : Nios2GPRReg<RegNum, "r" #RegNum>, DwarfRegNum<[ RegNum ]>;
32 def ET : Nios2GPRReg<24, "et">, DwarfRegNum<[ 24 ]>;
33 def BT : Nios2GPRReg<25, "bt">, DwarfRegNum<[ 25 ]>;
34 def GP : Nios2GPRReg<26, "gp">, DwarfRegNum<[ 26 ]>;
35 def SP : Nios2GPRReg<27, "sp">, DwarfRegNum<[ 27 ]>;
36 def FP : Nios2GPRReg<28, "fp">, DwarfRegNum<[ 28 ]>;
37 def EA : Nios2GPRReg<29, "ea">, DwarfRegNum<[ 29 ]>;
38 def BA : Nios2GPRReg<30, "ba">, DwarfRegNum<[ 30 ]>;
39 def RA : Nios2GPRReg<31, "ra">, DwarfRegNum<[ 31 ]>;
40 def PC : Nios2Reg<"pc">, DwarfRegNum<[ 32 ]>;
43 //===----------------------------------------------------------------------===//
45 //===----------------------------------------------------------------------===//
47 def CPURegs : RegisterClass<"Nios2", [ i32 ], 32,
52 // Return Values and Arguments
53 (sequence "R%u", 2, 7),
54 // Not preserved across procedure calls
56 (sequence "R%u", 8, 15),
58 (sequence "R%u", 16, 23),
60 ET, BT, GP, SP, FP, EA, BA, RA, PC)>;