1 //===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the PowerPC branch predicates.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H
15 #define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H
17 // GCC #defines PPC on Linux but we use it as our namespace name
20 // Generated files will use "namespace PPC". To avoid symbol clash,
21 // undefine PPC here. PPC may be predefined on some hosts.
26 /// Predicate - These are "(BI << 5) | BO" for various predicates.
28 PRED_LT = (0 << 5) | 12,
29 PRED_LE = (1 << 5) | 4,
30 PRED_EQ = (2 << 5) | 12,
31 PRED_GE = (0 << 5) | 4,
32 PRED_GT = (1 << 5) | 12,
33 PRED_NE = (2 << 5) | 4,
34 PRED_UN = (3 << 5) | 12,
35 PRED_NU = (3 << 5) | 4,
36 PRED_LT_MINUS = (0 << 5) | 14,
37 PRED_LE_MINUS = (1 << 5) | 6,
38 PRED_EQ_MINUS = (2 << 5) | 14,
39 PRED_GE_MINUS = (0 << 5) | 6,
40 PRED_GT_MINUS = (1 << 5) | 14,
41 PRED_NE_MINUS = (2 << 5) | 6,
42 PRED_UN_MINUS = (3 << 5) | 14,
43 PRED_NU_MINUS = (3 << 5) | 6,
44 PRED_LT_PLUS = (0 << 5) | 15,
45 PRED_LE_PLUS = (1 << 5) | 7,
46 PRED_EQ_PLUS = (2 << 5) | 15,
47 PRED_GE_PLUS = (0 << 5) | 7,
48 PRED_GT_PLUS = (1 << 5) | 15,
49 PRED_NE_PLUS = (2 << 5) | 7,
50 PRED_UN_PLUS = (3 << 5) | 15,
51 PRED_NU_PLUS = (3 << 5) | 7,
53 // SPE scalar compare instructions always set the GT bit.
56 // When dealing with individual condition-register bits, we have simple set
57 // and unset predicates.
62 // Bit for branch taken (plus) or not-taken (minus) hint
65 BR_NONTAKEN_HINT = 0x2,
70 /// Invert the specified predicate. != -> ==, < -> >=.
71 Predicate InvertPredicate(Predicate Opcode);
73 /// Assume the condition register is set by MI(a,b), return the predicate if
74 /// we modify the instructions such that condition register is set by MI(b,a).
75 Predicate getSwappedPredicate(Predicate Opcode);
77 /// Return the condition without hint bits.
78 inline unsigned getPredicateCondition(Predicate Opcode) {
79 return (unsigned)(Opcode & ~BR_HINT_MASK);
82 /// Return the hint bits of the predicate.
83 inline unsigned getPredicateHint(Predicate Opcode) {
84 return (unsigned)(Opcode & BR_HINT_MASK);
87 /// Return predicate consisting of specified condition and hint bits.
88 inline Predicate getPredicate(unsigned Condition, unsigned Hint) {
89 return (Predicate)((Condition & ~BR_HINT_MASK) |
90 (Hint & BR_HINT_MASK));