1 //===- P9InstrResources.td - P9 Instruction Resource Defs -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines resources required by some of P9 instruction. This is part
11 // P9 processor model used for instruction scheduling. Not every instruction
12 // is listed here. Instructions in this file belong to itinerary classes that
13 // have instructions with different resource requirements.
15 //===----------------------------------------------------------------------===//
18 def : InstRW<[P9_ALUE_2C, P9_ALUO_2C, IP_EXECE_1C, IP_EXECO_1C,
113 def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C, DISP_1C],
129 def : InstRW<[P9_ALUE_3C, P9_ALUO_3C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
217 def : InstRW<[P9_ALUE_4C, P9_ALUO_4C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
263 def : InstRW<[P9_DPE_7C, P9_DPO_7C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
370 def : InstRW<[P9_DP_7C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
393 def : InstRW<[P9_DP_7C, IP_EXEC_1C, DISP_1C, DISP_1C],
424 def : InstRW<[P9_PM_3C, IP_EXECO_1C, IP_EXECE_1C, DISP_1C, DISP_1C],
520 def : InstRW<[P9_DFU_12C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
539 def : InstRW<[P9_DFU_24C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
553 def : InstRW<[P9_DFU_58C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
559 def : InstRW<[P9_DFU_76C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
565 // Load Operation in IIC_LdStLFD
567 def : InstRW<[P9_LS_5C, IP_AGEN_1C, DISP_1C, DISP_1C],
576 def : InstRW<[P9_LS_5C, IP_AGEN_1C, DISP_1C, DISP_1C, DISP_1C],
583 def : InstRW<[P9_LoadAndALUOp_7C, IP_AGEN_1C, IP_EXEC_1C,
584 DISP_1C, DISP_1C, DISP_1C, DISP_1C],
591 def : InstRW<[P9_LoadAndALUOp_7C, IP_AGEN_1C, IP_EXEC_1C,
592 DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C],
599 def : InstRW<[P9_LoadAndPMOp_8C, IP_AGEN_1C, IP_EXEC_1C, DISP_1C, DISP_1C],
605 // Store Operations in IIC_LdStSTFD.
607 def : InstRW<[P9_LS_1C, IP_EXEC_1C, IP_AGEN_1C, DISP_1C, DISP_1C, DISP_1C],
619 def : InstRW<[P9_LS_1C, IP_EXEC_1C, IP_EXEC_1C, IP_AGEN_1C, DISP_1C, DISP_1C],
626 // Divide Operations in IIC_IntDivW, IIC_IntDivD.
628 def : InstRW<[P9_DIV_16C_8, IP_EXECE_1C, DISP_1C, DISP_1C],
634 def : InstRW<[P9_DIV_24C_8, IP_EXECE_1C, DISP_1C, DISP_1C],
642 def : InstRW<[P9_DIV_40C_8, IP_EXECE_1C, DISP_1C, DISP_1C],
648 def : InstRW<[P9_IntDivAndALUOp_26C_8, IP_EXECE_1C, IP_EXEC_1C,
649 DISP_1C, DISP_1C, DISP_1C, DISP_1C],
655 def : InstRW<[P9_IntDivAndALUOp_42C_8, IP_EXECE_1C, IP_EXEC_1C,
656 DISP_1C, DISP_1C, DISP_1C, DISP_1C],
662 // Rotate Operations in IIC_IntRotateD, IIC_IntRotateDI
663 def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C, DISP_1C],
672 def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
682 // CR access instructions in _BrMCR, IIC_BrMCRX.
684 def : InstRW<[P9_ALU_2C, P9_ALU_2C, IP_EXEC_1C, IP_EXEC_1C,
685 DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C],
693 def : InstRW<[P9_ALU_5C, IP_EXEC_1C, DISP_1C, DISP_1C],
699 def : InstRW<[P9_ALU_5C, P9_ALU_5C, IP_EXEC_1C, IP_EXEC_1C,
700 DISP_1C, DISP_1C, DISP_1C, DISP_1C],
705 // FP Div instructions in IIC_FPDivD and IIC_FPDivS.
707 def : InstRW<[P9_DP_33C_8, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
713 def : InstRW<[P9_DP_22C_5, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
719 def : InstRW<[P9_DP_24C_8, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
724 def : InstRW<[P9_DP_33C_8, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
729 // FP Instructions in IIC_FPGeneral, IIC_FPFused
731 def : InstRW<[P9_DP_7C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
772 def : InstRW<[P9_DP_7C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
785 def : InstRW<[P9_ALU_3C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
791 // Load instructions in IIC_LdStLFDU and IIC_LdStLFDUX.
793 def : InstRW<[P9_LoadAndALUOp_7C, P9_ALU_2C,
794 IP_AGEN_1C, IP_EXEC_1C, IP_EXEC_1C,
795 DISP_1C, DISP_1C, DISP_1C, DISP_1C,
796 DISP_1C, DISP_1C, DISP_1C, DISP_1C],
802 def : InstRW<[P9_LS_5C, P9_ALU_2C, IP_AGEN_1C, IP_EXEC_1C,
803 DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C],