1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to PowerPC assembly language. This printer is
12 // the output mechanism used by `llc'.
14 // Documentation at http://developer.apple.com/documentation/DeveloperTools/
15 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
17 //===----------------------------------------------------------------------===//
19 #include "InstPrinter/PPCInstPrinter.h"
20 #include "MCTargetDesc/PPCMCExpr.h"
21 #include "MCTargetDesc/PPCMCTargetDesc.h"
22 #include "MCTargetDesc/PPCPredicates.h"
24 #include "PPCInstrInfo.h"
25 #include "PPCMachineFunctionInfo.h"
26 #include "PPCSubtarget.h"
27 #include "PPCTargetMachine.h"
28 #include "PPCTargetStreamer.h"
29 #include "llvm/ADT/MapVector.h"
30 #include "llvm/ADT/StringRef.h"
31 #include "llvm/ADT/Triple.h"
32 #include "llvm/ADT/Twine.h"
33 #include "llvm/BinaryFormat/ELF.h"
34 #include "llvm/BinaryFormat/MachO.h"
35 #include "llvm/CodeGen/AsmPrinter.h"
36 #include "llvm/CodeGen/MachineBasicBlock.h"
37 #include "llvm/CodeGen/MachineFunction.h"
38 #include "llvm/CodeGen/MachineInstr.h"
39 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
40 #include "llvm/CodeGen/MachineOperand.h"
41 #include "llvm/CodeGen/MachineRegisterInfo.h"
42 #include "llvm/CodeGen/StackMaps.h"
43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
44 #include "llvm/IR/DataLayout.h"
45 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/Module.h"
47 #include "llvm/MC/MCAsmInfo.h"
48 #include "llvm/MC/MCContext.h"
49 #include "llvm/MC/MCExpr.h"
50 #include "llvm/MC/MCInst.h"
51 #include "llvm/MC/MCInstBuilder.h"
52 #include "llvm/MC/MCSectionELF.h"
53 #include "llvm/MC/MCSectionMachO.h"
54 #include "llvm/MC/MCStreamer.h"
55 #include "llvm/MC/MCSymbol.h"
56 #include "llvm/MC/MCSymbolELF.h"
57 #include "llvm/MC/SectionKind.h"
58 #include "llvm/Support/Casting.h"
59 #include "llvm/Support/CodeGen.h"
60 #include "llvm/Support/Debug.h"
61 #include "llvm/Support/ErrorHandling.h"
62 #include "llvm/Support/TargetRegistry.h"
63 #include "llvm/Support/raw_ostream.h"
64 #include "llvm/Target/TargetMachine.h"
73 #define DEBUG_TYPE "asmprinter"
77 class PPCAsmPrinter : public AsmPrinter {
79 MapVector<MCSymbol *, MCSymbol *> TOC;
80 const PPCSubtarget *Subtarget;
84 explicit PPCAsmPrinter(TargetMachine &TM,
85 std::unique_ptr<MCStreamer> Streamer)
86 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
88 StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
90 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym);
92 bool doInitialization(Module &M) override {
95 return AsmPrinter::doInitialization(M);
98 void EmitInstruction(const MachineInstr *MI) override;
100 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
102 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
103 unsigned AsmVariant, const char *ExtraCode,
104 raw_ostream &O) override;
105 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
106 unsigned AsmVariant, const char *ExtraCode,
107 raw_ostream &O) override;
109 void EmitEndOfAsmFile(Module &M) override;
111 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI);
112 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI);
113 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
114 bool runOnMachineFunction(MachineFunction &MF) override {
115 Subtarget = &MF.getSubtarget<PPCSubtarget>();
116 bool Changed = AsmPrinter::runOnMachineFunction(MF);
122 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
123 class PPCLinuxAsmPrinter : public PPCAsmPrinter {
125 explicit PPCLinuxAsmPrinter(TargetMachine &TM,
126 std::unique_ptr<MCStreamer> Streamer)
127 : PPCAsmPrinter(TM, std::move(Streamer)) {}
129 StringRef getPassName() const override {
130 return "Linux PPC Assembly Printer";
133 bool doFinalization(Module &M) override;
134 void EmitStartOfAsmFile(Module &M) override;
136 void EmitFunctionEntryLabel() override;
138 void EmitFunctionBodyStart() override;
139 void EmitFunctionBodyEnd() override;
140 void EmitInstruction(const MachineInstr *MI) override;
143 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac
145 class PPCDarwinAsmPrinter : public PPCAsmPrinter {
147 explicit PPCDarwinAsmPrinter(TargetMachine &TM,
148 std::unique_ptr<MCStreamer> Streamer)
149 : PPCAsmPrinter(TM, std::move(Streamer)) {}
151 StringRef getPassName() const override {
152 return "Darwin PPC Assembly Printer";
155 bool doFinalization(Module &M) override;
156 void EmitStartOfAsmFile(Module &M) override;
159 } // end anonymous namespace
161 /// stripRegisterPrefix - This method strips the character prefix from a
162 /// register name so that only the number is left. Used by for linux asm.
163 static const char *stripRegisterPrefix(const char *RegName) {
164 switch (RegName[0]) {
169 if (RegName[1] == 's')
172 case 'c': if (RegName[1] == 'r') return RegName + 2;
178 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
180 const DataLayout &DL = getDataLayout();
181 const MachineOperand &MO = MI->getOperand(OpNo);
183 switch (MO.getType()) {
184 case MachineOperand::MO_Register: {
185 unsigned Reg = MO.getReg();
187 // There are VSX instructions that use VSX register numbering (vs0 - vs63)
188 // as well as those that use VMX register numbering (v0 - v31 which
189 // correspond to vs32 - vs63). If we have an instruction that uses VSX
190 // numbering, we need to convert the VMX registers to VSX registers.
191 // Namely, we print 32-63 when the instruction operates on one of the
193 // (Please synchronize with PPCInstPrinter::printOperand)
194 if (MI->getDesc().TSFlags & PPCII::UseVSXReg) {
195 if (PPCInstrInfo::isVRRegister(Reg))
196 Reg = PPC::VSX32 + (Reg - PPC::V0);
197 else if (PPCInstrInfo::isVFRegister(Reg))
198 Reg = PPC::VSX32 + (Reg - PPC::VF0);
200 const char *RegName = PPCInstPrinter::getRegisterName(Reg);
202 // Linux assembler (Others?) does not take register mnemonics.
203 // FIXME - What about special registers used in mfspr/mtspr?
204 if (!Subtarget->isDarwin())
205 RegName = stripRegisterPrefix(RegName);
209 case MachineOperand::MO_Immediate:
213 case MachineOperand::MO_MachineBasicBlock:
214 MO.getMBB()->getSymbol()->print(O, MAI);
216 case MachineOperand::MO_ConstantPoolIndex:
217 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
220 case MachineOperand::MO_BlockAddress:
221 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
223 case MachineOperand::MO_GlobalAddress: {
224 // Computing the address of a global symbol, not calling it.
225 const GlobalValue *GV = MO.getGlobal();
226 MCSymbol *SymToPrint;
228 // External or weakly linked global variables need non-lazily-resolved stubs
229 if (Subtarget->hasLazyResolverStub(GV)) {
230 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
231 MachineModuleInfoImpl::StubValueTy &StubSym =
232 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(
234 if (!StubSym.getPointer())
235 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV),
236 !GV->hasInternalLinkage());
238 SymToPrint = getSymbol(GV);
241 SymToPrint->print(O, MAI);
243 printOffset(MO.getOffset(), O);
248 O << "<unknown operand type: " << (unsigned)MO.getType() << ">";
253 /// PrintAsmOperand - Print out an operand for an inline asm expression.
255 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
257 const char *ExtraCode, raw_ostream &O) {
258 // Does this asm operand have a single letter operand modifier?
259 if (ExtraCode && ExtraCode[0]) {
260 if (ExtraCode[1] != 0) return true; // Unknown modifier.
262 switch (ExtraCode[0]) {
264 // See if this is a generic print operand
265 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O);
266 case 'c': // Don't print "$" before a global var name or constant.
267 break; // PPC never has a prefix.
268 case 'L': // Write second word of DImode reference.
269 // Verify that this operand has two consecutive registers.
270 if (!MI->getOperand(OpNo).isReg() ||
271 OpNo+1 == MI->getNumOperands() ||
272 !MI->getOperand(OpNo+1).isReg())
274 ++OpNo; // Return the high-part.
277 // Write 'i' if an integer constant, otherwise nothing. Used to print
279 if (MI->getOperand(OpNo).isImm())
285 printOperand(MI, OpNo, O);
289 // At the moment, all inline asm memory operands are a single register.
290 // In any case, the output of this routine should always be just one
291 // assembler operand.
293 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
295 const char *ExtraCode,
297 if (ExtraCode && ExtraCode[0]) {
298 if (ExtraCode[1] != 0) return true; // Unknown modifier.
300 switch (ExtraCode[0]) {
301 default: return true; // Unknown modifier.
302 case 'y': // A memory reference for an X-form instruction
304 const char *RegName = "r0";
305 if (!Subtarget->isDarwin())
306 RegName = stripRegisterPrefix(RegName);
307 O << RegName << ", ";
308 printOperand(MI, OpNo, O);
311 case 'U': // Print 'u' for update form.
312 case 'X': // Print 'x' for indexed form.
314 // FIXME: Currently for PowerPC memory operands are always loaded
315 // into a register, so we never get an update or indexed form.
316 // This is bad even for offset forms, since even if we know we
317 // have a value in -16(r1), we will generate a load into r<n>
318 // and then load from 0(r<n>). Until that issue is fixed,
319 // tolerate 'U' and 'X' but don't output anything.
320 assert(MI->getOperand(OpNo).isReg());
326 assert(MI->getOperand(OpNo).isReg());
328 printOperand(MI, OpNo, O);
333 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
334 /// exists for it. If not, create one. Then return a symbol that references
336 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) {
337 MCSymbol *&TOCEntry = TOC[Sym];
339 TOCEntry = createTempSymbol("C");
343 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) {
344 SM.serializeToStackMapSection();
347 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) {
348 unsigned NumNOPBytes = MI.getOperand(1).getImm();
350 SM.recordStackMap(MI);
351 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
353 // Scan ahead to trim the shadow.
354 const MachineBasicBlock &MBB = *MI.getParent();
355 MachineBasicBlock::const_iterator MII(MI);
357 while (NumNOPBytes > 0) {
358 if (MII == MBB.end() || MII->isCall() ||
359 MII->getOpcode() == PPC::DBG_VALUE ||
360 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
361 MII->getOpcode() == TargetOpcode::STACKMAP)
368 for (unsigned i = 0; i < NumNOPBytes; i += 4)
369 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
372 // Lower a patchpoint of the form:
373 // [<def>], <id>, <numBytes>, <target>, <numArgs>
374 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) {
375 SM.recordPatchPoint(MI);
376 PatchPointOpers Opers(&MI);
378 unsigned EncodedBytes = 0;
379 const MachineOperand &CalleeMO = Opers.getCallTarget();
381 if (CalleeMO.isImm()) {
382 int64_t CallTarget = CalleeMO.getImm();
384 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&
385 "High 16 bits of call target should be zero.");
386 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg();
388 // Materialize the jump address:
389 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8)
391 .addImm((CallTarget >> 32) & 0xFFFF));
393 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC)
396 .addImm(32).addImm(16));
398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8)
401 .addImm((CallTarget >> 16) & 0xFFFF));
403 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8)
406 .addImm(CallTarget & 0xFFFF));
408 // Save the current TOC pointer before the remote call.
409 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();
410 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD)
412 .addImm(TOCSaveOffset)
416 // If we're on ELFv1, then we need to load the actual function pointer
417 // from the function descriptor.
418 if (!Subtarget->isELFv2ABI()) {
419 // Load the new TOC pointer and the function address, but not r11
420 // (needing this is rare, and loading it here would prevent passing it
421 // via a 'nest' parameter.
422 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
425 .addReg(ScratchReg));
427 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
430 .addReg(ScratchReg));
434 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8)
435 .addReg(ScratchReg));
437 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8));
440 // Restore the TOC pointer after the call.
441 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
443 .addImm(TOCSaveOffset)
447 } else if (CalleeMO.isGlobal()) {
448 const GlobalValue *GValue = CalleeMO.getGlobal();
449 MCSymbol *MOSymbol = getSymbol(GValue);
450 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext);
452 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP)
457 // Each instruction is 4 bytes.
461 unsigned NumBytes = Opers.getNumPatchBytes();
462 assert(NumBytes >= EncodedBytes &&
463 "Patchpoint can't request size less than the length of a call.");
464 assert((NumBytes - EncodedBytes) % 4 == 0 &&
465 "Invalid number of NOP bytes requested!");
466 for (unsigned i = EncodedBytes; i < NumBytes; i += 4)
467 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
470 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
471 /// call to __tls_get_addr to the current output stream.
472 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
473 MCSymbolRefExpr::VariantKind VK) {
474 StringRef Name = "__tls_get_addr";
475 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name);
476 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None;
478 assert(MI->getOperand(0).isReg() &&
479 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
480 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
481 "GETtls[ld]ADDR[32] must define GPR3");
482 assert(MI->getOperand(1).isReg() &&
483 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
484 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
485 "GETtls[ld]ADDR[32] must read GPR3");
487 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() &&
488 isPositionIndependent())
489 Kind = MCSymbolRefExpr::VK_PLT;
490 const MCSymbolRefExpr *TlsRef =
491 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext);
492 const MachineOperand &MO = MI->getOperand(2);
493 const GlobalValue *GValue = MO.getGlobal();
494 MCSymbol *MOSymbol = getSymbol(GValue);
495 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
496 EmitToStreamer(*OutStreamer,
497 MCInstBuilder(Subtarget->isPPC64() ?
498 PPC::BL8_NOP_TLS : PPC::BL_TLS)
503 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
504 /// the current output stream.
506 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
508 bool isPPC64 = Subtarget->isPPC64();
509 bool isDarwin = TM.getTargetTriple().isOSDarwin();
510 const Module *M = MF->getFunction().getParent();
511 PICLevel::Level PL = M->getPICLevel();
513 // Lower multi-instruction pseudo operations.
514 switch (MI->getOpcode()) {
516 case TargetOpcode::DBG_VALUE:
517 llvm_unreachable("Should be handled target independently");
518 case TargetOpcode::STACKMAP:
519 return LowerSTACKMAP(SM, *MI);
520 case TargetOpcode::PATCHPOINT:
521 return LowerPATCHPOINT(SM, *MI);
523 case PPC::MoveGOTtoLR: {
524 // Transform %lr = MoveGOTtoLR
525 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
526 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
527 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
529 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local
530 MCSymbol *GOTSymbol =
531 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
532 const MCExpr *OffsExpr =
533 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol,
534 MCSymbolRefExpr::VK_PPC_LOCAL,
536 MCConstantExpr::create(4, OutContext),
540 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr));
543 case PPC::MovePCtoLR:
544 case PPC::MovePCtoLR8: {
545 // Transform %lr = MovePCtoLR
546 // Into this, where the label is the PIC base:
549 MCSymbol *PICBase = MF->getPICBaseSymbol();
552 EmitToStreamer(*OutStreamer,
553 MCInstBuilder(PPC::BL)
554 // FIXME: We would like an efficient form for this, so we
555 // don't have to do a lot of extra uniquing.
556 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
559 OutStreamer->EmitLabel(PICBase);
562 case PPC::UpdateGBR: {
563 // Transform %rd = UpdateGBR(%rt, %ri)
564 // Into: lwz %rt, .L0$poff - .L0$pb(%ri)
566 // Get the offset from the GOT Base Register to the GOT
567 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
568 MCSymbol *PICOffset =
569 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol();
570 TmpInst.setOpcode(PPC::LWZ);
572 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext);
574 MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
575 MCSymbolRefExpr::VK_None,
577 const MCOperand TR = TmpInst.getOperand(1);
578 const MCOperand PICR = TmpInst.getOperand(0);
580 // Step 1: lwz %rt, .L$poff - .L$pb(%ri)
581 TmpInst.getOperand(1) =
582 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext));
583 TmpInst.getOperand(0) = TR;
584 TmpInst.getOperand(2) = PICR;
585 EmitToStreamer(*OutStreamer, TmpInst);
587 TmpInst.setOpcode(PPC::ADD4);
588 TmpInst.getOperand(0) = PICR;
589 TmpInst.getOperand(1) = TR;
590 TmpInst.getOperand(2) = PICR;
591 EmitToStreamer(*OutStreamer, TmpInst);
595 // Transform %r3 = LWZtoc @min1, %r2
596 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
598 // Change the opcode to LWZ, and the global address operand to be a
599 // reference to the GOT entry we will synthesize later.
600 TmpInst.setOpcode(PPC::LWZ);
601 const MachineOperand &MO = MI->getOperand(1);
603 // Map symbol -> label of TOC entry
604 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
605 MCSymbol *MOSymbol = nullptr;
607 MOSymbol = getSymbol(MO.getGlobal());
609 MOSymbol = GetCPISymbol(MO.getIndex());
611 MOSymbol = GetJTISymbol(MO.getIndex());
612 else if (MO.isBlockAddress())
613 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
615 if (PL == PICLevel::SmallPIC) {
617 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT,
619 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
621 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
624 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None,
627 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
629 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext);
630 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
632 EmitToStreamer(*OutStreamer, TmpInst);
639 // Transform %x3 = LDtoc @min1, %x2
640 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
642 // Change the opcode to LD, and the global address operand to be a
643 // reference to the TOC entry we will synthesize later.
644 TmpInst.setOpcode(PPC::LD);
645 const MachineOperand &MO = MI->getOperand(1);
647 // Map symbol -> label of TOC entry
648 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
649 MCSymbol *MOSymbol = nullptr;
651 MOSymbol = getSymbol(MO.getGlobal());
653 MOSymbol = GetCPISymbol(MO.getIndex());
655 MOSymbol = GetJTISymbol(MO.getIndex());
656 else if (MO.isBlockAddress())
657 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
659 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
662 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC,
664 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
665 EmitToStreamer(*OutStreamer, TmpInst);
669 case PPC::ADDIStocHA: {
670 // Transform %xd = ADDIStocHA %x2, @sym
671 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
673 // Change the opcode to ADDIS8. If the global address is external, has
674 // common linkage, is a non-local function address, or is a jump table
675 // address, then generate a TOC entry and reference that. Otherwise
676 // reference the symbol directly.
677 TmpInst.setOpcode(PPC::ADDIS8);
678 const MachineOperand &MO = MI->getOperand(2);
679 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
680 MO.isBlockAddress()) &&
681 "Invalid operand for ADDIStocHA!");
682 MCSymbol *MOSymbol = nullptr;
683 bool GlobalToc = false;
686 const GlobalValue *GV = MO.getGlobal();
687 MOSymbol = getSymbol(GV);
688 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
689 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG);
690 } else if (MO.isCPI()) {
691 MOSymbol = GetCPISymbol(MO.getIndex());
692 } else if (MO.isJTI()) {
693 MOSymbol = GetJTISymbol(MO.getIndex());
694 } else if (MO.isBlockAddress()) {
695 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
698 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
699 TM.getCodeModel() == CodeModel::Large)
700 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
703 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA,
706 if (!MO.isJTI() && MO.getOffset())
707 Exp = MCBinaryExpr::createAdd(Exp,
708 MCConstantExpr::create(MO.getOffset(),
712 TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
713 EmitToStreamer(*OutStreamer, TmpInst);
717 // Transform %xd = LDtocL @sym, %xs
718 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
720 // Change the opcode to LD. If the global address is external, has
721 // common linkage, or is a jump table address, then reference the
722 // associated TOC entry. Otherwise reference the symbol directly.
723 TmpInst.setOpcode(PPC::LD);
724 const MachineOperand &MO = MI->getOperand(1);
725 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
726 MO.isBlockAddress()) &&
727 "Invalid operand for LDtocL!");
728 MCSymbol *MOSymbol = nullptr;
731 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex()));
732 else if (MO.isBlockAddress()) {
733 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
734 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
736 else if (MO.isCPI()) {
737 MOSymbol = GetCPISymbol(MO.getIndex());
738 if (TM.getCodeModel() == CodeModel::Large)
739 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
741 else if (MO.isGlobal()) {
742 const GlobalValue *GV = MO.getGlobal();
743 MOSymbol = getSymbol(GV);
745 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
746 assert((GVFlags & PPCII::MO_NLP_FLAG) &&
747 "LDtocL used on symbol that could be accessed directly is "
748 "invalid. Must match ADDIStocHA."));
749 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
753 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO,
755 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
756 EmitToStreamer(*OutStreamer, TmpInst);
759 case PPC::ADDItocL: {
760 // Transform %xd = ADDItocL %xs, @sym
761 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
763 // Change the opcode to ADDI8. If the global address is external, then
764 // generate a TOC entry and reference that. Otherwise reference the
766 TmpInst.setOpcode(PPC::ADDI8);
767 const MachineOperand &MO = MI->getOperand(2);
768 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL");
769 MCSymbol *MOSymbol = nullptr;
772 const GlobalValue *GV = MO.getGlobal();
774 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
776 !(GVFlags & PPCII::MO_NLP_FLAG) &&
777 "Interposable definitions must use indirect access."));
778 MOSymbol = getSymbol(GV);
779 } else if (MO.isCPI()) {
780 MOSymbol = GetCPISymbol(MO.getIndex());
784 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO,
786 TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
787 EmitToStreamer(*OutStreamer, TmpInst);
790 case PPC::ADDISgotTprelHA: {
791 // Transform: %xd = ADDISgotTprelHA %x2, @sym
792 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
793 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
794 const MachineOperand &MO = MI->getOperand(2);
795 const GlobalValue *GValue = MO.getGlobal();
796 MCSymbol *MOSymbol = getSymbol(GValue);
797 const MCExpr *SymGotTprel =
798 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA,
800 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
801 .addReg(MI->getOperand(0).getReg())
802 .addReg(MI->getOperand(1).getReg())
803 .addExpr(SymGotTprel));
806 case PPC::LDgotTprelL:
807 case PPC::LDgotTprelL32: {
808 // Transform %xd = LDgotTprelL @sym, %xs
809 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
811 // Change the opcode to LD.
812 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ);
813 const MachineOperand &MO = MI->getOperand(1);
814 const GlobalValue *GValue = MO.getGlobal();
815 MCSymbol *MOSymbol = getSymbol(GValue);
817 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO,
819 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
820 EmitToStreamer(*OutStreamer, TmpInst);
824 case PPC::PPC32PICGOT: {
825 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
826 MCSymbol *GOTRef = OutContext.createTempSymbol();
827 MCSymbol *NextInstr = OutContext.createTempSymbol();
829 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL)
830 // FIXME: We would like an efficient form for this, so we don't have to do
831 // a lot of extra uniquing.
832 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext)));
833 const MCExpr *OffsExpr =
834 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext),
835 MCSymbolRefExpr::create(GOTRef, OutContext),
837 OutStreamer->EmitLabel(GOTRef);
838 OutStreamer->EmitValue(OffsExpr, 4);
839 OutStreamer->EmitLabel(NextInstr);
840 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR)
841 .addReg(MI->getOperand(0).getReg()));
842 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ)
843 .addReg(MI->getOperand(1).getReg())
845 .addReg(MI->getOperand(0).getReg()));
846 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4)
847 .addReg(MI->getOperand(0).getReg())
848 .addReg(MI->getOperand(1).getReg())
849 .addReg(MI->getOperand(0).getReg()));
852 case PPC::PPC32GOT: {
853 MCSymbol *GOTSymbol =
854 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
855 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create(
856 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext);
857 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create(
858 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext);
859 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI)
860 .addReg(MI->getOperand(0).getReg())
861 .addExpr(SymGotTlsL));
862 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
863 .addReg(MI->getOperand(0).getReg())
864 .addReg(MI->getOperand(0).getReg())
865 .addExpr(SymGotTlsHA));
868 case PPC::ADDIStlsgdHA: {
869 // Transform: %xd = ADDIStlsgdHA %x2, @sym
870 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
871 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
872 const MachineOperand &MO = MI->getOperand(2);
873 const GlobalValue *GValue = MO.getGlobal();
874 MCSymbol *MOSymbol = getSymbol(GValue);
875 const MCExpr *SymGotTlsGD =
876 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA,
878 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
879 .addReg(MI->getOperand(0).getReg())
880 .addReg(MI->getOperand(1).getReg())
881 .addExpr(SymGotTlsGD));
884 case PPC::ADDItlsgdL:
885 // Transform: %xd = ADDItlsgdL %xs, @sym
886 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l
887 case PPC::ADDItlsgdL32: {
888 // Transform: %rd = ADDItlsgdL32 %rs, @sym
889 // Into: %rd = ADDI %rs, sym@got@tlsgd
890 const MachineOperand &MO = MI->getOperand(2);
891 const GlobalValue *GValue = MO.getGlobal();
892 MCSymbol *MOSymbol = getSymbol(GValue);
893 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create(
894 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
895 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD,
897 EmitToStreamer(*OutStreamer,
898 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
899 .addReg(MI->getOperand(0).getReg())
900 .addReg(MI->getOperand(1).getReg())
901 .addExpr(SymGotTlsGD));
904 case PPC::GETtlsADDR:
905 // Transform: %x3 = GETtlsADDR %x3, @sym
906 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)
907 case PPC::GETtlsADDR32: {
908 // Transform: %r3 = GETtlsADDR32 %r3, @sym
909 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT
910 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD);
913 case PPC::ADDIStlsldHA: {
914 // Transform: %xd = ADDIStlsldHA %x2, @sym
915 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha
916 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
917 const MachineOperand &MO = MI->getOperand(2);
918 const GlobalValue *GValue = MO.getGlobal();
919 MCSymbol *MOSymbol = getSymbol(GValue);
920 const MCExpr *SymGotTlsLD =
921 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA,
923 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
924 .addReg(MI->getOperand(0).getReg())
925 .addReg(MI->getOperand(1).getReg())
926 .addExpr(SymGotTlsLD));
929 case PPC::ADDItlsldL:
930 // Transform: %xd = ADDItlsldL %xs, @sym
931 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l
932 case PPC::ADDItlsldL32: {
933 // Transform: %rd = ADDItlsldL32 %rs, @sym
934 // Into: %rd = ADDI %rs, sym@got@tlsld
935 const MachineOperand &MO = MI->getOperand(2);
936 const GlobalValue *GValue = MO.getGlobal();
937 MCSymbol *MOSymbol = getSymbol(GValue);
938 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create(
939 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
940 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD,
942 EmitToStreamer(*OutStreamer,
943 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
944 .addReg(MI->getOperand(0).getReg())
945 .addReg(MI->getOperand(1).getReg())
946 .addExpr(SymGotTlsLD));
949 case PPC::GETtlsldADDR:
950 // Transform: %x3 = GETtlsldADDR %x3, @sym
951 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)
952 case PPC::GETtlsldADDR32: {
953 // Transform: %r3 = GETtlsldADDR32 %r3, @sym
954 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT
955 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD);
958 case PPC::ADDISdtprelHA:
959 // Transform: %xd = ADDISdtprelHA %xs, @sym
960 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha
961 case PPC::ADDISdtprelHA32: {
962 // Transform: %rd = ADDISdtprelHA32 %rs, @sym
963 // Into: %rd = ADDIS %rs, sym@dtprel@ha
964 const MachineOperand &MO = MI->getOperand(2);
965 const GlobalValue *GValue = MO.getGlobal();
966 MCSymbol *MOSymbol = getSymbol(GValue);
967 const MCExpr *SymDtprel =
968 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA,
972 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS)
973 .addReg(MI->getOperand(0).getReg())
974 .addReg(MI->getOperand(1).getReg())
975 .addExpr(SymDtprel));
978 case PPC::ADDIdtprelL:
979 // Transform: %xd = ADDIdtprelL %xs, @sym
980 // Into: %xd = ADDI8 %xs, sym@dtprel@l
981 case PPC::ADDIdtprelL32: {
982 // Transform: %rd = ADDIdtprelL32 %rs, @sym
983 // Into: %rd = ADDI %rs, sym@dtprel@l
984 const MachineOperand &MO = MI->getOperand(2);
985 const GlobalValue *GValue = MO.getGlobal();
986 MCSymbol *MOSymbol = getSymbol(GValue);
987 const MCExpr *SymDtprel =
988 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO,
990 EmitToStreamer(*OutStreamer,
991 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
992 .addReg(MI->getOperand(0).getReg())
993 .addReg(MI->getOperand(1).getReg())
994 .addExpr(SymDtprel));
999 if (!Subtarget->hasMFOCRF()) {
1000 // Transform: %r3 = MFOCRF %cr7
1001 // Into: %r3 = MFCR ;; cr7
1002 unsigned NewOpcode =
1003 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1004 OutStreamer->AddComment(PPCInstPrinter::
1005 getRegisterName(MI->getOperand(1).getReg()));
1006 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1007 .addReg(MI->getOperand(0).getReg()));
1013 if (!Subtarget->hasMFOCRF()) {
1014 // Transform: %cr7 = MTOCRF %r3
1015 // Into: MTCRF mask, %r3 ;; cr7
1016 unsigned NewOpcode =
1017 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1018 unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
1019 ->getEncodingValue(MI->getOperand(0).getReg());
1020 OutStreamer->AddComment(PPCInstPrinter::
1021 getRegisterName(MI->getOperand(0).getReg()));
1022 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1024 .addReg(MI->getOperand(1).getReg()));
1032 // Verify alignment is legal, so we don't create relocations
1033 // that can't be supported.
1034 // FIXME: This test is currently disabled for Darwin. The test
1035 // suite shows a handful of test cases that fail this check for
1036 // Darwin. Those need to be investigated before this sanity test
1037 // can be enabled for those subtargets.
1038 if (!Subtarget->isDarwin()) {
1039 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1040 const MachineOperand &MO = MI->getOperand(OpNum);
1041 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4)
1042 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1044 // Now process the instruction normally.
1049 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
1050 EmitToStreamer(*OutStreamer, TmpInst);
1053 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) {
1054 if (!Subtarget->isPPC64())
1055 return PPCAsmPrinter::EmitInstruction(MI);
1057 switch (MI->getOpcode()) {
1059 return PPCAsmPrinter::EmitInstruction(MI);
1060 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
1062 // b .end # lis 0, FuncId[16..32]
1063 // nop # li 0, FuncId[0..15]
1066 // bl __xray_FunctionEntry
1070 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1071 // of instructions change.
1072 MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1073 MCSymbol *EndOfSled = OutContext.createTempSymbol();
1074 OutStreamer->EmitLabel(BeginOfSled);
1075 EmitToStreamer(*OutStreamer,
1076 MCInstBuilder(PPC::B).addExpr(
1077 MCSymbolRefExpr::create(EndOfSled, OutContext)));
1078 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1081 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1082 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1083 EmitToStreamer(*OutStreamer,
1084 MCInstBuilder(PPC::BL8_NOP)
1085 .addExpr(MCSymbolRefExpr::create(
1086 OutContext.getOrCreateSymbol("__xray_FunctionEntry"),
1088 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1089 OutStreamer->EmitLabel(EndOfSled);
1090 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER);
1093 case TargetOpcode::PATCHABLE_RET: {
1094 unsigned RetOpcode = MI->getOperand(0).getImm();
1096 RetInst.setOpcode(RetOpcode);
1097 for (const auto &MO :
1098 make_range(std::next(MI->operands_begin()), MI->operands_end())) {
1100 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false))
1101 RetInst.addOperand(MCOp);
1105 if (RetOpcode == PPC::BCCLR) {
1106 IsConditional = true;
1107 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 ||
1108 RetOpcode == PPC::TCRETURNai8) {
1110 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) {
1111 IsConditional = false;
1113 EmitToStreamer(*OutStreamer, RetInst);
1117 MCSymbol *FallthroughLabel;
1118 if (IsConditional) {
1126 // blr # lis 0, FuncId[16..32]
1127 // nop # li 0, FuncId[0..15]
1130 // bl __xray_FunctionExit
1135 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1136 // of instructions change.
1137 FallthroughLabel = OutContext.createTempSymbol();
1140 MCInstBuilder(PPC::BCC)
1141 .addImm(PPC::InvertPredicate(
1142 static_cast<PPC::Predicate>(MI->getOperand(1).getImm())))
1143 .addReg(MI->getOperand(2).getReg())
1144 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext)));
1146 RetInst.setOpcode(PPC::BLR8);
1150 // b(lr)? # lis 0, FuncId[16..32]
1151 // nop # li 0, FuncId[0..15]
1154 // bl __xray_FunctionExit
1158 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1159 // of instructions change.
1160 OutStreamer->EmitCodeAlignment(8);
1161 MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1162 OutStreamer->EmitLabel(BeginOfSled);
1163 EmitToStreamer(*OutStreamer, RetInst);
1164 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1167 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1168 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1169 EmitToStreamer(*OutStreamer,
1170 MCInstBuilder(PPC::BL8_NOP)
1171 .addExpr(MCSymbolRefExpr::create(
1172 OutContext.getOrCreateSymbol("__xray_FunctionExit"),
1174 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1175 EmitToStreamer(*OutStreamer, RetInst);
1177 OutStreamer->EmitLabel(FallthroughLabel);
1178 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT);
1181 case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
1182 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
1183 case TargetOpcode::PATCHABLE_TAIL_CALL:
1184 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
1185 // normal function exit from a tail exit.
1186 llvm_unreachable("Tail call is handled in the normal case. See comments "
1187 "around this assert.");
1191 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) {
1192 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) {
1193 PPCTargetStreamer *TS =
1194 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1197 TS->emitAbiVersion(2);
1200 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() ||
1201 !isPositionIndependent())
1202 return AsmPrinter::EmitStartOfAsmFile(M);
1204 if (M.getPICLevel() == PICLevel::SmallPIC)
1205 return AsmPrinter::EmitStartOfAsmFile(M);
1207 OutStreamer->SwitchSection(OutContext.getELFSection(
1208 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC));
1210 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC"));
1211 MCSymbol *CurrentPos = OutContext.createTempSymbol();
1213 OutStreamer->EmitLabel(CurrentPos);
1215 // The GOT pointer points to the middle of the GOT, in order to reference the
1216 // entire 64kB range. 0x8000 is the midpoint.
1217 const MCExpr *tocExpr =
1218 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext),
1219 MCConstantExpr::create(0x8000, OutContext),
1222 OutStreamer->EmitAssignment(TOCSym, tocExpr);
1224 OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1227 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
1228 // linux/ppc32 - Normal entry label.
1229 if (!Subtarget->isPPC64() &&
1230 (!isPositionIndependent() ||
1231 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC))
1232 return AsmPrinter::EmitFunctionEntryLabel();
1234 if (!Subtarget->isPPC64()) {
1235 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1236 if (PPCFI->usesPICBase()) {
1237 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol();
1238 MCSymbol *PICBase = MF->getPICBaseSymbol();
1239 OutStreamer->EmitLabel(RelocSymbol);
1241 const MCExpr *OffsExpr =
1242 MCBinaryExpr::createSub(
1243 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
1245 MCSymbolRefExpr::create(PICBase, OutContext),
1247 OutStreamer->EmitValue(OffsExpr, 4);
1248 OutStreamer->EmitLabel(CurrentFnSym);
1251 return AsmPrinter::EmitFunctionEntryLabel();
1254 // ELFv2 ABI - Normal entry label.
1255 if (Subtarget->isELFv2ABI()) {
1256 // In the Large code model, we allow arbitrary displacements between
1257 // the text section and its associated TOC section. We place the
1258 // full 8-byte offset to the TOC in memory immediatedly preceding
1259 // the function global entry point.
1260 if (TM.getCodeModel() == CodeModel::Large
1261 && !MF->getRegInfo().use_empty(PPC::X2)) {
1262 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1264 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1265 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol();
1266 const MCExpr *TOCDeltaExpr =
1267 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1268 MCSymbolRefExpr::create(GlobalEPSymbol,
1272 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol());
1273 OutStreamer->EmitValue(TOCDeltaExpr, 8);
1275 return AsmPrinter::EmitFunctionEntryLabel();
1278 // Emit an official procedure descriptor.
1279 MCSectionSubPair Current = OutStreamer->getCurrentSection();
1280 MCSectionELF *Section = OutStreamer->getContext().getELFSection(
1281 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC);
1282 OutStreamer->SwitchSection(Section);
1283 OutStreamer->EmitLabel(CurrentFnSym);
1284 OutStreamer->EmitValueToAlignment(8);
1285 MCSymbol *Symbol1 = CurrentFnSymForSize;
1286 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function
1288 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext),
1290 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1291 // Generates a R_PPC64_TOC relocation for TOC base insertion.
1292 OutStreamer->EmitValue(
1293 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext),
1295 // Emit a null environment pointer.
1296 OutStreamer->EmitIntValue(0, 8 /* size */);
1297 OutStreamer->SwitchSection(Current.first, Current.second);
1300 bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
1301 const DataLayout &DL = getDataLayout();
1303 bool isPPC64 = DL.getPointerSizeInBits() == 64;
1305 PPCTargetStreamer &TS =
1306 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer());
1309 MCSectionELF *Section;
1312 Section = OutStreamer->getContext().getELFSection(
1313 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC);
1315 Section = OutStreamer->getContext().getELFSection(
1316 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC);
1317 OutStreamer->SwitchSection(Section);
1319 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(),
1320 E = TOC.end(); I != E; ++I) {
1321 OutStreamer->EmitLabel(I->second);
1322 MCSymbol *S = I->first;
1326 OutStreamer->EmitValueToAlignment(4);
1327 OutStreamer->EmitSymbolValue(S, 4);
1332 return AsmPrinter::doFinalization(M);
1335 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
1336 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() {
1337 // In the ELFv2 ABI, in functions that use the TOC register, we need to
1338 // provide two entry points. The ABI guarantees that when calling the
1339 // local entry point, r2 is set up by the caller to contain the TOC base
1340 // for this function, and when calling the global entry point, r12 is set
1341 // up by the caller to hold the address of the global entry point. We
1342 // thus emit a prefix sequence along the following lines:
1346 // # global entry point
1347 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
1348 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
1350 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1351 // # local entry point, followed by function body
1353 // For the Large code model, we create
1356 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
1359 // # global entry point
1360 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
1363 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1364 // # local entry point, followed by function body
1366 // This ensures we have r2 set up correctly while executing the function
1367 // body, no matter which entry point is called.
1368 if (Subtarget->isELFv2ABI()
1369 // Only do all that if the function uses r2 in the first place.
1370 && !MF->getRegInfo().use_empty(PPC::X2)) {
1371 // Note: The logic here must be synchronized with the code in the
1372 // branch-selection pass which sets the offset of the first block in the
1373 // function. This matters because it affects the alignment.
1374 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1376 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol();
1377 OutStreamer->EmitLabel(GlobalEntryLabel);
1378 const MCSymbolRefExpr *GlobalEntryLabelExp =
1379 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext);
1381 if (TM.getCodeModel() != CodeModel::Large) {
1382 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1383 const MCExpr *TOCDeltaExpr =
1384 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1385 GlobalEntryLabelExp, OutContext);
1387 const MCExpr *TOCDeltaHi =
1388 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext);
1389 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
1392 .addExpr(TOCDeltaHi));
1394 const MCExpr *TOCDeltaLo =
1395 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext);
1396 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
1399 .addExpr(TOCDeltaLo));
1401 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol();
1402 const MCExpr *TOCOffsetDeltaExpr =
1403 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext),
1404 GlobalEntryLabelExp, OutContext);
1406 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
1408 .addExpr(TOCOffsetDeltaExpr)
1410 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8)
1416 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol();
1417 OutStreamer->EmitLabel(LocalEntryLabel);
1418 const MCSymbolRefExpr *LocalEntryLabelExp =
1419 MCSymbolRefExpr::create(LocalEntryLabel, OutContext);
1420 const MCExpr *LocalOffsetExp =
1421 MCBinaryExpr::createSub(LocalEntryLabelExp,
1422 GlobalEntryLabelExp, OutContext);
1424 PPCTargetStreamer *TS =
1425 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1428 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);
1432 /// EmitFunctionBodyEnd - Print the traceback table before the .size
1435 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() {
1436 // Only the 64-bit target requires a traceback table. For now,
1437 // we only emit the word of zeroes that GDB requires to find
1438 // the end of the function, and zeroes for the eight-byte
1439 // mandatory fields.
1440 // FIXME: We should fill in the eight-byte mandatory fields as described in
1441 // the PPC64 ELF ABI (this is a low-priority item because GDB does not
1442 // currently make use of these fields).
1443 if (Subtarget->isPPC64()) {
1444 OutStreamer->EmitIntValue(0, 4/*size*/);
1445 OutStreamer->EmitIntValue(0, 8/*size*/);
1449 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) {
1450 static const char *const CPUDirectives[] = {
1470 // FIXME: why is power8 missing here?
1476 // Get the numerically largest directive.
1477 // FIXME: How should we merge darwin directives?
1478 unsigned Directive = PPC::DIR_NONE;
1479 for (const Function &F : M) {
1480 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F);
1481 unsigned FDir = STI.getDarwinDirective();
1482 Directive = Directive > FDir ? FDir : STI.getDarwinDirective();
1483 if (STI.hasMFOCRF() && Directive < PPC::DIR_970)
1484 Directive = PPC::DIR_970;
1485 if (STI.hasAltivec() && Directive < PPC::DIR_7400)
1486 Directive = PPC::DIR_7400;
1487 if (STI.isPPC64() && Directive < PPC::DIR_64)
1488 Directive = PPC::DIR_64;
1491 assert(Directive <= PPC::DIR_64 && "Directive out of range.");
1493 assert(Directive < array_lengthof(CPUDirectives) &&
1494 "CPUDirectives[] might not be up-to-date!");
1495 PPCTargetStreamer &TStreamer =
1496 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1497 TStreamer.emitMachine(CPUDirectives[Directive]);
1499 // Prime text sections so they are adjacent. This reduces the likelihood a
1500 // large data or debug section causes a branch to exceed 16M limit.
1501 const TargetLoweringObjectFileMachO &TLOFMacho =
1502 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1503 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection());
1504 if (TM.getRelocationModel() == Reloc::PIC_) {
1505 OutStreamer->SwitchSection(
1506 OutContext.getMachOSection("__TEXT", "__picsymbolstub1",
1507 MachO::S_SYMBOL_STUBS |
1508 MachO::S_ATTR_PURE_INSTRUCTIONS,
1509 32, SectionKind::getText()));
1510 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) {
1511 OutStreamer->SwitchSection(
1512 OutContext.getMachOSection("__TEXT","__symbol_stub1",
1513 MachO::S_SYMBOL_STUBS |
1514 MachO::S_ATTR_PURE_INSTRUCTIONS,
1515 16, SectionKind::getText()));
1517 OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1520 bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
1521 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64;
1523 // Darwin/PPC always uses mach-o.
1524 const TargetLoweringObjectFileMachO &TLOFMacho =
1525 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1527 MachineModuleInfoMachO &MMIMacho =
1528 MMI->getObjFileInfo<MachineModuleInfoMachO>();
1530 if (MAI->doesSupportExceptionHandling()) {
1531 // Add the (possibly multiple) personalities to the set of global values.
1532 // Only referenced functions get into the Personalities list.
1533 for (const Function *Personality : MMI->getPersonalities()) {
1536 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr");
1537 MachineModuleInfoImpl::StubValueTy &StubSym =
1538 MMIMacho.getGVStubEntry(NLPSym);
1540 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true);
1545 // Output stubs for dynamically-linked functions.
1546 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList();
1548 // Output macho stubs for external and common global variables.
1549 if (!Stubs.empty()) {
1550 // Switch with ".non_lazy_symbol_pointer" directive.
1551 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
1552 EmitAlignment(isPPC64 ? 3 : 2);
1554 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1556 OutStreamer->EmitLabel(Stubs[i].first);
1557 // .indirect_symbol _foo
1558 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
1559 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(),
1560 MCSA_IndirectSymbol);
1563 // External to current translation unit.
1564 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/);
1566 // Internal to current translation unit.
1568 // When we place the LSDA into the TEXT section, the type info
1570 // need to be indirect and pc-rel. We accomplish this by using NLPs.
1571 // However, sometimes the types are local to the file. So we need to
1572 // fill in the value for the NLP in those cases.
1573 OutStreamer->EmitValue(
1574 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext),
1575 isPPC64 ? 8 : 4 /*size*/);
1579 OutStreamer->AddBlankLine();
1583 // Funny Darwin hack: This flag tells the linker that no global symbols
1584 // contain code that falls through to other global symbols (e.g. the obvious
1585 // implementation of multiple entry points). If this doesn't occur, the
1586 // linker can safely perform dead code stripping. Since LLVM never generates
1587 // code that does this, it is always safe to set.
1588 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
1590 return AsmPrinter::doFinalization(M);
1593 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code
1594 /// for a MachineFunction to the given output stream, in a format that the
1595 /// Darwin assembler can deal with.
1598 createPPCAsmPrinterPass(TargetMachine &tm,
1599 std::unique_ptr<MCStreamer> &&Streamer) {
1600 if (tm.getTargetTriple().isMacOSX())
1601 return new PPCDarwinAsmPrinter(tm, std::move(Streamer));
1602 return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
1605 // Force static initialization.
1606 extern "C" void LLVMInitializePowerPCAsmPrinter() {
1607 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),
1608 createPPCAsmPrinterPass);
1609 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),
1610 createPPCAsmPrinterPass);
1611 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(),
1612 createPPCAsmPrinterPass);