1 //===-- PPCCTRLoops.cpp - Identify and generate CTR loops -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass identifies loops where we can generate the PPC branch instructions
11 // that decrement and test the count register (CTR) (bdnz and friends).
13 // The pattern that defines the induction variable can changed depending on
14 // prior optimizations. For example, the IndVarSimplify phase run by 'opt'
15 // normalizes induction variables, and the Loop Strength Reduction pass
16 // run by 'llc' may also make changes to the induction variable.
18 // Criteria for CTR loops:
19 // - Countable loops (w/ ind. var for a trip count)
20 // - Try inner-most loops first
21 // - No nested CTR loops.
22 // - No function calls in loops.
24 //===----------------------------------------------------------------------===//
26 #include "llvm/Transforms/Scalar.h"
28 #include "PPCTargetMachine.h"
29 #include "llvm/ADT/STLExtras.h"
30 #include "llvm/ADT/Statistic.h"
31 #include "llvm/Analysis/LoopInfo.h"
32 #include "llvm/Analysis/ScalarEvolutionExpander.h"
33 #include "llvm/Analysis/TargetLibraryInfo.h"
34 #include "llvm/IR/Constants.h"
35 #include "llvm/IR/DerivedTypes.h"
36 #include "llvm/IR/Dominators.h"
37 #include "llvm/IR/InlineAsm.h"
38 #include "llvm/IR/Instructions.h"
39 #include "llvm/IR/IntrinsicInst.h"
40 #include "llvm/IR/Module.h"
41 #include "llvm/IR/ValueHandle.h"
42 #include "llvm/PassSupport.h"
43 #include "llvm/Support/CommandLine.h"
44 #include "llvm/Support/Debug.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
47 #include "llvm/Transforms/Utils/Local.h"
48 #include "llvm/Transforms/Utils/LoopUtils.h"
51 #include "llvm/CodeGen/MachineDominators.h"
52 #include "llvm/CodeGen/MachineFunction.h"
53 #include "llvm/CodeGen/MachineFunctionPass.h"
54 #include "llvm/CodeGen/MachineRegisterInfo.h"
59 #define DEBUG_TYPE "ctrloops"
62 static cl::opt<int> CTRLoopLimit("ppc-max-ctrloop", cl::Hidden, cl::init(-1));
65 STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops");
68 void initializePPCCTRLoopsPass(PassRegistry&);
70 void initializePPCCTRLoopsVerifyPass(PassRegistry&);
75 struct PPCCTRLoops : public FunctionPass {
84 PPCCTRLoops() : FunctionPass(ID), TM(nullptr) {
85 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry());
87 PPCCTRLoops(PPCTargetMachine &TM) : FunctionPass(ID), TM(&TM) {
88 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry());
91 bool runOnFunction(Function &F) override;
93 void getAnalysisUsage(AnalysisUsage &AU) const override {
94 AU.addRequired<LoopInfoWrapperPass>();
95 AU.addPreserved<LoopInfoWrapperPass>();
96 AU.addRequired<DominatorTreeWrapperPass>();
97 AU.addPreserved<DominatorTreeWrapperPass>();
98 AU.addRequired<ScalarEvolutionWrapperPass>();
102 bool mightUseCTR(const Triple &TT, BasicBlock *BB);
103 bool convertToCTRLoop(Loop *L);
106 PPCTargetMachine *TM;
109 const DataLayout *DL;
111 const TargetLibraryInfo *LibInfo;
115 char PPCCTRLoops::ID = 0;
117 int PPCCTRLoops::Counter = 0;
121 struct PPCCTRLoopsVerify : public MachineFunctionPass {
125 PPCCTRLoopsVerify() : MachineFunctionPass(ID) {
126 initializePPCCTRLoopsVerifyPass(*PassRegistry::getPassRegistry());
129 void getAnalysisUsage(AnalysisUsage &AU) const override {
130 AU.addRequired<MachineDominatorTree>();
131 MachineFunctionPass::getAnalysisUsage(AU);
134 bool runOnMachineFunction(MachineFunction &MF) override;
137 MachineDominatorTree *MDT;
140 char PPCCTRLoopsVerify::ID = 0;
142 } // end anonymous namespace
144 INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
146 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
147 INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
148 INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass)
149 INITIALIZE_PASS_END(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
152 FunctionPass *llvm::createPPCCTRLoops(PPCTargetMachine &TM) {
153 return new PPCCTRLoops(TM);
157 INITIALIZE_PASS_BEGIN(PPCCTRLoopsVerify, "ppc-ctr-loops-verify",
158 "PowerPC CTR Loops Verify", false, false)
159 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
160 INITIALIZE_PASS_END(PPCCTRLoopsVerify, "ppc-ctr-loops-verify",
161 "PowerPC CTR Loops Verify", false, false)
163 FunctionPass *llvm::createPPCCTRLoopsVerify() {
164 return new PPCCTRLoopsVerify();
168 bool PPCCTRLoops::runOnFunction(Function &F) {
172 LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
173 SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
174 DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
175 DL = &F.getParent()->getDataLayout();
176 auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>();
177 LibInfo = TLIP ? &TLIP->getTLI() : nullptr;
178 PreserveLCSSA = mustPreserveAnalysisID(LCSSAID);
180 bool MadeChange = false;
182 for (LoopInfo::iterator I = LI->begin(), E = LI->end();
185 if (!L->getParentLoop())
186 MadeChange |= convertToCTRLoop(L);
192 static bool isLargeIntegerTy(bool Is32Bit, Type *Ty) {
193 if (IntegerType *ITy = dyn_cast<IntegerType>(Ty))
194 return ITy->getBitWidth() > (Is32Bit ? 32U : 64U);
199 // Determining the address of a TLS variable results in a function call in
200 // certain TLS models.
201 static bool memAddrUsesCTR(const PPCTargetMachine *TM,
202 const Value *MemAddr) {
203 const auto *GV = dyn_cast<GlobalValue>(MemAddr);
205 // Recurse to check for constants that refer to TLS global variables.
206 if (const auto *CV = dyn_cast<Constant>(MemAddr))
207 for (const auto &CO : CV->operands())
208 if (memAddrUsesCTR(TM, CO))
214 if (!GV->isThreadLocal())
218 TLSModel::Model Model = TM->getTLSModel(GV);
219 return Model == TLSModel::GeneralDynamic || Model == TLSModel::LocalDynamic;
222 bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
223 for (BasicBlock::iterator J = BB->begin(), JE = BB->end();
225 if (CallInst *CI = dyn_cast<CallInst>(J)) {
226 if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) {
227 // Inline ASM is okay, unless it clobbers the ctr register.
228 InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints();
229 for (unsigned i = 0, ie = CIV.size(); i < ie; ++i) {
230 InlineAsm::ConstraintInfo &C = CIV[i];
231 if (C.Type != InlineAsm::isInput)
232 for (unsigned j = 0, je = C.Codes.size(); j < je; ++j)
233 if (StringRef(C.Codes[j]).equals_lower("{ctr}"))
242 const TargetLowering *TLI =
243 TM->getSubtargetImpl(*BB->getParent())->getTargetLowering();
245 if (Function *F = CI->getCalledFunction()) {
246 // Most intrinsics don't become function calls, but some might.
247 // sin, cos, exp and log are always calls.
249 if (F->getIntrinsicID() != Intrinsic::not_intrinsic) {
250 switch (F->getIntrinsicID()) {
252 // If we have a call to ppc_is_decremented_ctr_nonzero, or ppc_mtctr
253 // we're definitely using CTR.
254 case Intrinsic::ppc_is_decremented_ctr_nonzero:
255 case Intrinsic::ppc_mtctr:
258 // VisualStudio defines setjmp as _setjmp
259 #if defined(_MSC_VER) && defined(setjmp) && \
260 !defined(setjmp_undefined_for_msvc)
261 # pragma push_macro("setjmp")
263 # define setjmp_undefined_for_msvc
266 case Intrinsic::setjmp:
268 #if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc)
269 // let's return it to _setjmp state
270 # pragma pop_macro("setjmp")
271 # undef setjmp_undefined_for_msvc
274 case Intrinsic::longjmp:
276 // Exclude eh_sjlj_setjmp; we don't need to exclude eh_sjlj_longjmp
277 // because, although it does clobber the counter register, the
278 // control can't then return to inside the loop unless there is also
279 // an eh_sjlj_setjmp.
280 case Intrinsic::eh_sjlj_setjmp:
282 case Intrinsic::memcpy:
283 case Intrinsic::memmove:
284 case Intrinsic::memset:
285 case Intrinsic::powi:
287 case Intrinsic::log2:
288 case Intrinsic::log10:
290 case Intrinsic::exp2:
295 case Intrinsic::copysign:
296 if (CI->getArgOperand(0)->getType()->getScalarType()->
300 continue; // ISD::FCOPYSIGN is never a library call.
301 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
302 case Intrinsic::floor: Opcode = ISD::FFLOOR; break;
303 case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
304 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
305 case Intrinsic::rint: Opcode = ISD::FRINT; break;
306 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
307 case Intrinsic::round: Opcode = ISD::FROUND; break;
308 case Intrinsic::minnum: Opcode = ISD::FMINNUM; break;
309 case Intrinsic::maxnum: Opcode = ISD::FMAXNUM; break;
310 case Intrinsic::umul_with_overflow: Opcode = ISD::UMULO; break;
311 case Intrinsic::smul_with_overflow: Opcode = ISD::SMULO; break;
315 // PowerPC does not use [US]DIVREM or other library calls for
316 // operations on regular types which are not otherwise library calls
317 // (i.e. soft float or atomics). If adapting for targets that do,
318 // additional care is required here.
321 if (!F->hasLocalLinkage() && F->hasName() && LibInfo &&
322 LibInfo->getLibFunc(F->getName(), Func) &&
323 LibInfo->hasOptimizedCodeGen(Func)) {
324 // Non-read-only functions are never treated as intrinsics.
325 if (!CI->onlyReadsMemory())
328 // Conversion happens only for FP calls.
329 if (!CI->getArgOperand(0)->getType()->isFloatingPointTy())
333 default: return true;
334 case LibFunc_copysign:
335 case LibFunc_copysignf:
336 continue; // ISD::FCOPYSIGN is never a library call.
337 case LibFunc_copysignl:
342 continue; // ISD::FABS is never a library call.
346 Opcode = ISD::FSQRT; break;
350 Opcode = ISD::FFLOOR; break;
351 case LibFunc_nearbyint:
352 case LibFunc_nearbyintf:
353 case LibFunc_nearbyintl:
354 Opcode = ISD::FNEARBYINT; break;
358 Opcode = ISD::FCEIL; break;
362 Opcode = ISD::FRINT; break;
366 Opcode = ISD::FROUND; break;
370 Opcode = ISD::FTRUNC; break;
374 Opcode = ISD::FMINNUM; break;
378 Opcode = ISD::FMAXNUM; break;
383 auto &DL = CI->getModule()->getDataLayout();
384 MVT VTy = TLI->getSimpleValueType(DL, CI->getArgOperand(0)->getType(),
386 if (VTy == MVT::Other)
389 if (TLI->isOperationLegalOrCustom(Opcode, VTy))
391 else if (VTy.isVector() &&
392 TLI->isOperationLegalOrCustom(Opcode, VTy.getScalarType()))
400 } else if (isa<BinaryOperator>(J) &&
401 J->getType()->getScalarType()->isPPC_FP128Ty()) {
402 // Most operations on ppc_f128 values become calls.
404 } else if (isa<UIToFPInst>(J) || isa<SIToFPInst>(J) ||
405 isa<FPToUIInst>(J) || isa<FPToSIInst>(J)) {
406 CastInst *CI = cast<CastInst>(J);
407 if (CI->getSrcTy()->getScalarType()->isPPC_FP128Ty() ||
408 CI->getDestTy()->getScalarType()->isPPC_FP128Ty() ||
409 isLargeIntegerTy(TT.isArch32Bit(), CI->getSrcTy()->getScalarType()) ||
410 isLargeIntegerTy(TT.isArch32Bit(), CI->getDestTy()->getScalarType()))
412 } else if (isLargeIntegerTy(TT.isArch32Bit(),
413 J->getType()->getScalarType()) &&
414 (J->getOpcode() == Instruction::UDiv ||
415 J->getOpcode() == Instruction::SDiv ||
416 J->getOpcode() == Instruction::URem ||
417 J->getOpcode() == Instruction::SRem)) {
419 } else if (TT.isArch32Bit() &&
420 isLargeIntegerTy(false, J->getType()->getScalarType()) &&
421 (J->getOpcode() == Instruction::Shl ||
422 J->getOpcode() == Instruction::AShr ||
423 J->getOpcode() == Instruction::LShr)) {
424 // Only on PPC32, for 128-bit integers (specifically not 64-bit
425 // integers), these might be runtime calls.
427 } else if (isa<IndirectBrInst>(J) || isa<InvokeInst>(J)) {
428 // On PowerPC, indirect jumps use the counter register.
430 } else if (SwitchInst *SI = dyn_cast<SwitchInst>(J)) {
433 const TargetLowering *TLI =
434 TM->getSubtargetImpl(*BB->getParent())->getTargetLowering();
436 if (SI->getNumCases() + 1 >= (unsigned)TLI->getMinimumJumpTableEntries())
440 if (TM->getSubtargetImpl(*BB->getParent())->getTargetLowering()->useSoftFloat()) {
441 switch(J->getOpcode()) {
442 case Instruction::FAdd:
443 case Instruction::FSub:
444 case Instruction::FMul:
445 case Instruction::FDiv:
446 case Instruction::FRem:
447 case Instruction::FPTrunc:
448 case Instruction::FPExt:
449 case Instruction::FPToUI:
450 case Instruction::FPToSI:
451 case Instruction::UIToFP:
452 case Instruction::SIToFP:
453 case Instruction::FCmp:
458 for (Value *Operand : J->operands())
459 if (memAddrUsesCTR(TM, Operand))
466 bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
467 bool MadeChange = false;
470 Triple(L->getHeader()->getParent()->getParent()->getTargetTriple());
471 if (!TT.isArch32Bit() && !TT.isArch64Bit())
472 return MadeChange; // Unknown arch. type.
474 // Process nested loops first.
475 for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) {
476 MadeChange |= convertToCTRLoop(*I);
477 DEBUG(dbgs() << "Nested loop converted\n");
480 // If a nested loop has been converted, then we can't convert this loop.
485 // Stop trying after reaching the limit (if any).
486 int Limit = CTRLoopLimit;
488 if (Counter >= CTRLoopLimit)
494 // We don't want to spill/restore the counter register, and so we don't
495 // want to use the counter register if the loop contains calls.
496 for (Loop::block_iterator I = L->block_begin(), IE = L->block_end();
498 if (mightUseCTR(TT, *I))
501 SmallVector<BasicBlock*, 4> ExitingBlocks;
502 L->getExitingBlocks(ExitingBlocks);
504 BasicBlock *CountedExitBlock = nullptr;
505 const SCEV *ExitCount = nullptr;
506 BranchInst *CountedExitBranch = nullptr;
507 for (SmallVectorImpl<BasicBlock *>::iterator I = ExitingBlocks.begin(),
508 IE = ExitingBlocks.end(); I != IE; ++I) {
509 const SCEV *EC = SE->getExitCount(L, *I);
510 DEBUG(dbgs() << "Exit Count for " << *L << " from block " <<
511 (*I)->getName() << ": " << *EC << "\n");
512 if (isa<SCEVCouldNotCompute>(EC))
514 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
515 if (ConstEC->getValue()->isZero())
517 } else if (!SE->isLoopInvariant(EC, L))
520 if (SE->getTypeSizeInBits(EC->getType()) > (TT.isArch64Bit() ? 64 : 32))
523 // We now have a loop-invariant count of loop iterations (which is not the
524 // constant zero) for which we know that this loop will not exit via this
527 // We need to make sure that this block will run on every loop iteration.
528 // For this to be true, we must dominate all blocks with backedges. Such
529 // blocks are in-loop predecessors to the header block.
530 bool NotAlways = false;
531 for (pred_iterator PI = pred_begin(L->getHeader()),
532 PIE = pred_end(L->getHeader()); PI != PIE; ++PI) {
533 if (!L->contains(*PI))
536 if (!DT->dominates(*I, *PI)) {
545 // Make sure this blocks ends with a conditional branch.
546 Instruction *TI = (*I)->getTerminator();
550 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
551 if (!BI->isConditional())
554 CountedExitBranch = BI;
558 // Note that this block may not be the loop latch block, even if the loop
559 // has a latch block.
560 CountedExitBlock = *I;
565 if (!CountedExitBlock)
568 BasicBlock *Preheader = L->getLoopPreheader();
570 // If we don't have a preheader, then insert one. If we already have a
571 // preheader, then we can use it (except if the preheader contains a use of
572 // the CTR register because some such uses might be reordered by the
573 // selection DAG after the mtctr instruction).
574 if (!Preheader || mightUseCTR(TT, Preheader))
575 Preheader = InsertPreheaderForLoop(L, DT, LI, PreserveLCSSA);
579 DEBUG(dbgs() << "Preheader for exit count: " << Preheader->getName() << "\n");
581 // Insert the count into the preheader and replace the condition used by the
585 SCEVExpander SCEVE(*SE, Preheader->getModule()->getDataLayout(), "loopcnt");
586 LLVMContext &C = SE->getContext();
587 Type *CountType = TT.isArch64Bit() ? Type::getInt64Ty(C) :
589 if (!ExitCount->getType()->isPointerTy() &&
590 ExitCount->getType() != CountType)
591 ExitCount = SE->getZeroExtendExpr(ExitCount, CountType);
592 ExitCount = SE->getAddExpr(ExitCount, SE->getOne(CountType));
594 SCEVE.expandCodeFor(ExitCount, CountType, Preheader->getTerminator());
596 IRBuilder<> CountBuilder(Preheader->getTerminator());
597 Module *M = Preheader->getParent()->getParent();
598 Value *MTCTRFunc = Intrinsic::getDeclaration(M, Intrinsic::ppc_mtctr,
600 CountBuilder.CreateCall(MTCTRFunc, ECValue);
602 IRBuilder<> CondBuilder(CountedExitBranch);
604 Intrinsic::getDeclaration(M, Intrinsic::ppc_is_decremented_ctr_nonzero);
605 Value *NewCond = CondBuilder.CreateCall(DecFunc, {});
606 Value *OldCond = CountedExitBranch->getCondition();
607 CountedExitBranch->setCondition(NewCond);
609 // The false branch must exit the loop.
610 if (!L->contains(CountedExitBranch->getSuccessor(0)))
611 CountedExitBranch->swapSuccessors();
613 // The old condition may be dead now, and may have even created a dead PHI
614 // (the original induction variable).
615 RecursivelyDeleteTriviallyDeadInstructions(OldCond);
616 DeleteDeadPHIs(CountedExitBlock);
623 static bool clobbersCTR(const MachineInstr &MI) {
624 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
625 const MachineOperand &MO = MI.getOperand(i);
627 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8))
629 } else if (MO.isRegMask()) {
630 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8))
638 static bool verifyCTRBranch(MachineBasicBlock *MBB,
639 MachineBasicBlock::iterator I) {
640 MachineBasicBlock::iterator BI = I;
641 SmallSet<MachineBasicBlock *, 16> Visited;
642 SmallVector<MachineBasicBlock *, 8> Preds;
645 if (I == MBB->begin()) {
657 for (MachineBasicBlock::iterator IE = MBB->begin();; --I) {
658 unsigned Opc = I->getOpcode();
659 if (Opc == PPC::MTCTRloop || Opc == PPC::MTCTR8loop) {
664 if (I != BI && clobbersCTR(*I)) {
665 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " (" <<
666 MBB->getFullName() << ") instruction " << *I <<
667 " clobbers CTR, invalidating " << "BB#" <<
668 BI->getParent()->getNumber() << " (" <<
669 BI->getParent()->getFullName() << ") instruction " <<
678 if (!CheckPreds && Preds.empty())
683 if (MachineFunction::iterator(MBB) == MBB->getParent()->begin()) {
684 DEBUG(dbgs() << "Unable to find a MTCTR instruction for BB#" <<
685 BI->getParent()->getNumber() << " (" <<
686 BI->getParent()->getFullName() << ") instruction " <<
691 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
692 PIE = MBB->pred_end(); PI != PIE; ++PI)
693 Preds.push_back(*PI);
697 MBB = Preds.pop_back_val();
698 if (!Visited.count(MBB)) {
699 I = MBB->getLastNonDebugInstr();
702 } while (!Preds.empty());
707 bool PPCCTRLoopsVerify::runOnMachineFunction(MachineFunction &MF) {
708 MDT = &getAnalysis<MachineDominatorTree>();
710 // Verify that all bdnz/bdz instructions are dominated by a loop mtctr before
711 // any other instructions that might clobber the ctr register.
712 for (MachineFunction::iterator I = MF.begin(), IE = MF.end();
714 MachineBasicBlock *MBB = &*I;
715 if (!MDT->isReachableFromEntry(MBB))
718 for (MachineBasicBlock::iterator MII = MBB->getFirstTerminator(),
719 MIIE = MBB->end(); MII != MIIE; ++MII) {
720 unsigned Opc = MII->getOpcode();
721 if (Opc == PPC::BDNZ8 || Opc == PPC::BDNZ ||
722 Opc == PPC::BDZ8 || Opc == PPC::BDZ)
723 if (!verifyCTRBranch(MBB, MII))
724 llvm_unreachable("Invalid PPC CTR loop!");