1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
15 #define LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
17 #include "PPCFrameLowering.h"
18 #include "PPCISelLowering.h"
19 #include "PPCInstrInfo.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
22 #include "llvm/CodeGen/TargetSubtargetInfo.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/MC/MCInstrItineraries.h"
27 #define GET_SUBTARGETINFO_HEADER
28 #include "PPCGenSubtargetInfo.inc"
30 // GCC #defines PPC on Linux but we use it as our namespace name
37 // -m directive values.
68 class PPCSubtarget : public PPCGenSubtargetInfo {
77 /// TargetTriple - What processor and OS we're targeting.
80 /// stackAlignment - The minimum alignment known to hold of the stack frame on
81 /// entry to the function and which must be maintained by every function.
82 unsigned StackAlignment;
84 /// Selected instruction itineraries (one entry per itinerary class.)
85 InstrItineraryData InstrItins;
87 /// Which cpu directive was used.
88 unsigned DarwinDirective;
90 /// Used by the ISel to turn in optimizations for POWER4-derived architectures
109 bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
127 bool HasLazyResolverStubs;
130 bool HasInvariantFunctionDescriptors;
131 bool HasPartwordAtomics;
140 POPCNTDKind HasPOPCNTD;
142 /// When targeting QPX running a stock PPC64 Linux kernel where the stack
143 /// alignment has not been changed, we need to keep the 16-byte alignment
145 bool IsQPXStackUnaligned;
147 const PPCTargetMachine &TM;
148 PPCFrameLowering FrameLowering;
149 PPCInstrInfo InstrInfo;
150 PPCTargetLowering TLInfo;
151 SelectionDAGTargetInfo TSInfo;
154 /// This constructor initializes the data members to match that
155 /// of the specified triple.
157 PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
158 const PPCTargetMachine &TM);
160 /// ParseSubtargetFeatures - Parses features string setting specified
161 /// subtarget options. Definition of function is auto generated by tblgen.
162 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
164 /// getStackAlignment - Returns the minimum alignment known to hold of the
165 /// stack frame on entry to the function and which must be maintained by every
166 /// function for this subtarget.
167 unsigned getStackAlignment() const { return StackAlignment; }
169 /// getDarwinDirective - Returns the -m directive specified for the cpu.
171 unsigned getDarwinDirective() const { return DarwinDirective; }
173 /// getInstrItins - Return the instruction itineraries based on subtarget
175 const InstrItineraryData *getInstrItineraryData() const override {
179 const PPCFrameLowering *getFrameLowering() const override {
180 return &FrameLowering;
182 const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
183 const PPCTargetLowering *getTargetLowering() const override {
186 const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
189 const PPCRegisterInfo *getRegisterInfo() const override {
190 return &getInstrInfo()->getRegisterInfo();
192 const PPCTargetMachine &getTargetMachine() const { return TM; }
194 /// initializeSubtargetDependencies - Initializes using a CPU and feature string
195 /// so that we can use initializer lists for subtarget initialization.
196 PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
199 void initializeEnvironment();
200 void initSubtargetFeatures(StringRef CPU, StringRef FS);
203 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
205 bool isPPC64() const;
207 /// has64BitSupport - Return true if the selected CPU supports 64-bit
208 /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
209 bool has64BitSupport() const { return Has64BitSupport; }
210 // useSoftFloat - Return true if soft-float option is turned on.
211 bool useSoftFloat() const { return !HasHardFloat; }
213 /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
214 /// registers in 32-bit mode when possible. This can only true if
215 /// has64BitSupport() returns true.
216 bool use64BitRegs() const { return Use64BitRegs; }
218 /// useCRBits - Return true if we should store and manipulate i1 values in
219 /// the individual condition register bits.
220 bool useCRBits() const { return UseCRBits; }
222 /// hasLazyResolverStub - Return true if accesses to the specified global have
223 /// to go through a dyld lazy resolution stub. This means that an extra load
224 /// is required to get the address of the global.
225 bool hasLazyResolverStub(const GlobalValue *GV) const;
227 // isLittleEndian - True if generating little-endian code
228 bool isLittleEndian() const { return IsLittleEndian; }
230 // Specific obvious features.
231 bool hasFCPSGN() const { return HasFCPSGN; }
232 bool hasFSQRT() const { return HasFSQRT; }
233 bool hasFRE() const { return HasFRE; }
234 bool hasFRES() const { return HasFRES; }
235 bool hasFRSQRTE() const { return HasFRSQRTE; }
236 bool hasFRSQRTES() const { return HasFRSQRTES; }
237 bool hasRecipPrec() const { return HasRecipPrec; }
238 bool hasSTFIWX() const { return HasSTFIWX; }
239 bool hasLFIWAX() const { return HasLFIWAX; }
240 bool hasFPRND() const { return HasFPRND; }
241 bool hasFPCVT() const { return HasFPCVT; }
242 bool hasAltivec() const { return HasAltivec; }
243 bool hasSPE() const { return HasSPE; }
244 bool hasFPU() const { return HasFPU; }
245 bool hasQPX() const { return HasQPX; }
246 bool hasVSX() const { return HasVSX; }
247 bool hasP8Vector() const { return HasP8Vector; }
248 bool hasP8Altivec() const { return HasP8Altivec; }
249 bool hasP8Crypto() const { return HasP8Crypto; }
250 bool hasP9Vector() const { return HasP9Vector; }
251 bool hasP9Altivec() const { return HasP9Altivec; }
252 bool hasMFOCRF() const { return HasMFOCRF; }
253 bool hasISEL() const { return HasISEL; }
254 bool hasBPERMD() const { return HasBPERMD; }
255 bool hasExtDiv() const { return HasExtDiv; }
256 bool hasCMPB() const { return HasCMPB; }
257 bool hasLDBRX() const { return HasLDBRX; }
258 bool isBookE() const { return IsBookE; }
259 bool hasOnlyMSYNC() const { return HasOnlyMSYNC; }
260 bool isPPC4xx() const { return IsPPC4xx; }
261 bool isPPC6xx() const { return IsPPC6xx; }
262 bool isSecurePlt() const {return SecurePlt; }
263 bool isE500() const { return IsE500; }
264 bool isFeatureMFTB() const { return FeatureMFTB; }
265 bool isDeprecatedDST() const { return DeprecatedDST; }
266 bool hasICBT() const { return HasICBT; }
267 bool hasInvariantFunctionDescriptors() const {
268 return HasInvariantFunctionDescriptors;
270 bool hasPartwordAtomics() const { return HasPartwordAtomics; }
271 bool hasDirectMove() const { return HasDirectMove; }
273 bool isQPXStackUnaligned() const { return IsQPXStackUnaligned; }
274 unsigned getPlatformStackAlignment() const {
275 if ((hasQPX() || isBGQ()) && !isQPXStackUnaligned())
281 // DarwinABI has a 224-byte red zone. PPC32 SVR4ABI(Non-DarwinABI) has no
282 // red zone and PPC64 SVR4ABI has a 288-byte red zone.
283 unsigned getRedZoneSize() const {
284 return isDarwinABI() ? 224 : (isPPC64() ? 288 : 0);
287 bool hasHTM() const { return HasHTM; }
288 bool hasFusion() const { return HasFusion; }
289 bool hasFloat128() const { return HasFloat128; }
290 bool isISA3_0() const { return IsISA3_0; }
291 bool useLongCalls() const { return UseLongCalls; }
292 bool needsSwapsForVSXMemOps() const {
293 return hasVSX() && isLittleEndian() && !hasP9Vector();
296 POPCNTDKind hasPOPCNTD() const { return HasPOPCNTD; }
298 const Triple &getTargetTriple() const { return TargetTriple; }
300 /// isDarwin - True if this is any darwin platform.
301 bool isDarwin() const { return TargetTriple.isMacOSX(); }
302 /// isBGQ - True if this is a BG/Q platform.
303 bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
305 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
306 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
307 bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
309 bool isDarwinABI() const { return isTargetMachO() || isDarwin(); }
310 bool isSVR4ABI() const { return !isDarwinABI(); }
311 bool isELFv2ABI() const;
313 /// Originally, this function return hasISEL(). Now we always enable it,
314 /// but may expand the ISEL instruction later.
315 bool enableEarlyIfConversion() const override { return true; }
317 // Scheduling customization.
318 bool enableMachineScheduler() const override;
319 // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
320 bool enablePostRAScheduler() const override;
321 AntiDepBreakMode getAntiDepBreakMode() const override;
322 void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
324 void overrideSchedPolicy(MachineSchedPolicy &Policy,
325 unsigned NumRegionInstrs) const override;
326 bool useAA() const override;
328 bool enableSubRegLiveness() const override;
330 /// classifyGlobalReference - Classify a global variable reference for the
331 /// current subtarget accourding to how we should reference it.
332 unsigned char classifyGlobalReference(const GlobalValue *GV) const;
334 bool isXRaySupported() const override { return IsPPC64 && IsLittleEndian; }
336 } // End llvm namespace