1 //===--------------- PPCVSXFMAMutate.cpp - VSX FMA Mutation ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass mutates the form of VSX FMA instructions to avoid unnecessary
13 //===----------------------------------------------------------------------===//
15 #include "PPCInstrInfo.h"
16 #include "MCTargetDesc/PPCPredicates.h"
18 #include "PPCInstrBuilder.h"
19 #include "PPCMachineFunctionInfo.h"
20 #include "PPCTargetMachine.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineFunctionPass.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/CodeGen/MachineMemOperand.h"
28 #include "llvm/CodeGen/MachineRegisterInfo.h"
29 #include "llvm/CodeGen/PseudoSourceValue.h"
30 #include "llvm/CodeGen/ScheduleDAG.h"
31 #include "llvm/CodeGen/SlotIndexes.h"
32 #include "llvm/MC/MCAsmInfo.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/TargetRegistry.h"
37 #include "llvm/Support/raw_ostream.h"
41 static cl::opt<bool> DisableVSXFMAMutate("disable-ppc-vsx-fma-mutation",
42 cl::desc("Disable VSX FMA instruction mutation"), cl::Hidden);
44 #define DEBUG_TYPE "ppc-vsx-fma-mutate"
46 namespace llvm { namespace PPC {
47 int getAltVSXFMAOpcode(uint16_t Opcode);
51 // PPCVSXFMAMutate pass - For copies between VSX registers and non-VSX registers
52 // (Altivec and scalar floating-point registers), we need to transform the
53 // copies into subregister copies with other restrictions.
54 struct PPCVSXFMAMutate : public MachineFunctionPass {
56 PPCVSXFMAMutate() : MachineFunctionPass(ID) {
57 initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
61 const PPCInstrInfo *TII;
64 bool processBlock(MachineBasicBlock &MBB) {
67 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
68 const TargetRegisterInfo *TRI = &TII->getRegisterInfo();
69 for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
73 // The default (A-type) VSX FMA form kills the addend (it is taken from
74 // the target register, which is then updated to reflect the result of
75 // the FMA). If the instruction, however, kills one of the registers
76 // used for the product, then we can use the M-form instruction (which
77 // will take that value from the to-be-defined register).
79 int AltOpc = PPC::getAltVSXFMAOpcode(MI->getOpcode());
83 // This pass is run after register coalescing, and so we're looking for
84 // a situation like this:
86 // %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9
87 // %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16,
88 // %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16
90 // %vreg9<def,tied1> = XSMADDADP %vreg9<tied0>, %vreg17, %vreg19,
91 // %RM<imp-use>; VSLRC:%vreg9,%vreg17,%vreg19
93 // Where we can eliminate the copy by changing from the A-type to the
94 // M-type instruction. Specifically, for this example, this means:
95 // %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16,
96 // %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16
98 // %vreg16<def,tied1> = XSMADDMDP %vreg16<tied0>, %vreg18, %vreg9,
99 // %RM<imp-use>; VSLRC:%vreg16,%vreg18,%vreg9
100 // and we remove: %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9
102 SlotIndex FMAIdx = LIS->getInstructionIndex(MI);
104 VNInfo *AddendValNo =
105 LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn();
106 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def);
108 // The addend and this instruction must be in the same block.
110 if (!AddendMI || AddendMI->getParent() != MI->getParent())
113 // The addend must be a full copy within the same register class.
115 if (!AddendMI->isFullCopy())
118 unsigned AddendSrcReg = AddendMI->getOperand(1).getReg();
119 if (TargetRegisterInfo::isVirtualRegister(AddendSrcReg)) {
120 if (MRI.getRegClass(AddendMI->getOperand(0).getReg()) !=
121 MRI.getRegClass(AddendSrcReg))
124 // If AddendSrcReg is a physical register, make sure the destination
125 // register class contains it.
126 if (!MRI.getRegClass(AddendMI->getOperand(0).getReg())
127 ->contains(AddendSrcReg))
131 // In theory, there could be other uses of the addend copy before this
132 // fma. We could deal with this, but that would require additional
133 // logic below and I suspect it will not occur in any relevant
134 // situations. Additionally, check whether the copy source is killed
135 // prior to the fma. In order to replace the addend here with the
136 // source of the copy, it must still be live here. We can't use
137 // interval testing for a physical register, so as long as we're
138 // walking the MIs we may as well test liveness here.
140 // FIXME: There is a case that occurs in practice, like this:
141 // %vreg9<def> = COPY %F1; VSSRC:%vreg9
143 // %vreg6<def> = COPY %vreg9; VSSRC:%vreg6,%vreg9
144 // %vreg7<def> = COPY %vreg9; VSSRC:%vreg7,%vreg9
145 // %vreg9<def,tied1> = XSMADDASP %vreg9<tied0>, %vreg1, %vreg4; VSSRC:
146 // %vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg1, %vreg2; VSSRC:
147 // %vreg7<def,tied1> = XSMADDASP %vreg7<tied0>, %vreg1, %vreg3; VSSRC:
148 // which prevents an otherwise-profitable transformation.
149 bool OtherUsers = false, KillsAddendSrc = false;
150 for (auto J = std::prev(I), JE = MachineBasicBlock::iterator(AddendMI);
152 if (J->readsVirtualRegister(AddendMI->getOperand(0).getReg())) {
156 if (J->modifiesRegister(AddendSrcReg, TRI) ||
157 J->killsRegister(AddendSrcReg, TRI)) {
158 KillsAddendSrc = true;
163 if (OtherUsers || KillsAddendSrc)
166 // Find one of the product operands that is killed by this instruction.
168 unsigned KilledProdOp = 0, OtherProdOp = 0;
169 if (LIS->getInterval(MI->getOperand(2).getReg())
170 .Query(FMAIdx).isKill()) {
173 } else if (LIS->getInterval(MI->getOperand(3).getReg())
174 .Query(FMAIdx).isKill()) {
179 // If there are no killed product operands, then this transformation is
180 // likely not profitable.
184 // For virtual registers, verify that the addend source register
185 // is live here (as should have been assured above).
186 assert((!TargetRegisterInfo::isVirtualRegister(AddendSrcReg) ||
187 LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) &&
188 "Addend source register is not live!");
190 // Transform: (O2 * O3) + O1 -> (O2 * O1) + O3.
192 unsigned AddReg = AddendMI->getOperand(1).getReg();
193 unsigned KilledProdReg = MI->getOperand(KilledProdOp).getReg();
194 unsigned OtherProdReg = MI->getOperand(OtherProdOp).getReg();
196 unsigned AddSubReg = AddendMI->getOperand(1).getSubReg();
197 unsigned KilledProdSubReg = MI->getOperand(KilledProdOp).getSubReg();
198 unsigned OtherProdSubReg = MI->getOperand(OtherProdOp).getSubReg();
200 bool AddRegKill = AddendMI->getOperand(1).isKill();
201 bool KilledProdRegKill = MI->getOperand(KilledProdOp).isKill();
202 bool OtherProdRegKill = MI->getOperand(OtherProdOp).isKill();
204 bool AddRegUndef = AddendMI->getOperand(1).isUndef();
205 bool KilledProdRegUndef = MI->getOperand(KilledProdOp).isUndef();
206 bool OtherProdRegUndef = MI->getOperand(OtherProdOp).isUndef();
208 unsigned OldFMAReg = MI->getOperand(0).getReg();
210 // The transformation doesn't work well with things like:
211 // %vreg5 = A-form-op %vreg5, %vreg11, %vreg5;
212 // so leave such things alone.
213 if (OldFMAReg == KilledProdReg)
216 assert(OldFMAReg == AddendMI->getOperand(0).getReg() &&
217 "Addend copy not tied to old FMA output!");
219 DEBUG(dbgs() << "VSX FMA Mutation:\n " << *MI;);
221 MI->getOperand(0).setReg(KilledProdReg);
222 MI->getOperand(1).setReg(KilledProdReg);
223 MI->getOperand(3).setReg(AddReg);
224 MI->getOperand(2).setReg(OtherProdReg);
226 MI->getOperand(0).setSubReg(KilledProdSubReg);
227 MI->getOperand(1).setSubReg(KilledProdSubReg);
228 MI->getOperand(3).setSubReg(AddSubReg);
229 MI->getOperand(2).setSubReg(OtherProdSubReg);
231 MI->getOperand(1).setIsKill(KilledProdRegKill);
232 MI->getOperand(3).setIsKill(AddRegKill);
233 MI->getOperand(2).setIsKill(OtherProdRegKill);
235 MI->getOperand(1).setIsUndef(KilledProdRegUndef);
236 MI->getOperand(3).setIsUndef(AddRegUndef);
237 MI->getOperand(2).setIsUndef(OtherProdRegUndef);
239 MI->setDesc(TII->get(AltOpc));
241 DEBUG(dbgs() << " -> " << *MI);
243 // The killed product operand was killed here, so we can reuse it now
244 // for the result of the fma.
246 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg);
247 VNInfo *FMAValNo = FMAInt.getVNInfoAt(FMAIdx.getRegSlot());
248 for (auto UI = MRI.reg_nodbg_begin(OldFMAReg), UE = MRI.reg_nodbg_end();
250 MachineOperand &UseMO = *UI;
251 MachineInstr *UseMI = UseMO.getParent();
254 // Don't replace the result register of the copy we're about to erase.
255 if (UseMI == AddendMI)
258 UseMO.setReg(KilledProdReg);
259 UseMO.setSubReg(KilledProdSubReg);
262 // Extend the live intervals of the killed product operand to hold the
265 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg);
266 for (LiveInterval::iterator AI = FMAInt.begin(), AE = FMAInt.end();
268 // Don't add the segment that corresponds to the original copy.
269 if (AI->valno == AddendValNo)
272 VNInfo *NewFMAValNo =
273 NewFMAInt.getNextValue(AI->start,
274 LIS->getVNInfoAllocator());
276 NewFMAInt.addSegment(LiveInterval::Segment(AI->start, AI->end,
279 DEBUG(dbgs() << " extended: " << NewFMAInt << '\n');
281 FMAInt.removeValNo(FMAValNo);
282 DEBUG(dbgs() << " trimmed: " << FMAInt << '\n');
284 // Remove the (now unused) copy.
286 DEBUG(dbgs() << " removing: " << *AddendMI << '\n');
287 LIS->RemoveMachineInstrFromMaps(AddendMI);
288 AddendMI->eraseFromParent();
297 bool runOnMachineFunction(MachineFunction &MF) override {
298 // If we don't have VSX then go ahead and return without doing
300 const PPCSubtarget &STI = MF.getSubtarget<PPCSubtarget>();
304 LIS = &getAnalysis<LiveIntervals>();
306 TII = STI.getInstrInfo();
308 bool Changed = false;
310 if (DisableVSXFMAMutate)
313 for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
314 MachineBasicBlock &B = *I++;
322 void getAnalysisUsage(AnalysisUsage &AU) const override {
323 AU.addRequired<LiveIntervals>();
324 AU.addPreserved<LiveIntervals>();
325 AU.addRequired<SlotIndexes>();
326 AU.addPreserved<SlotIndexes>();
327 MachineFunctionPass::getAnalysisUsage(AU);
332 INITIALIZE_PASS_BEGIN(PPCVSXFMAMutate, DEBUG_TYPE,
333 "PowerPC VSX FMA Mutation", false, false)
334 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
335 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
336 INITIALIZE_PASS_END(PPCVSXFMAMutate, DEBUG_TYPE,
337 "PowerPC VSX FMA Mutation", false, false)
339 char &llvm::PPCVSXFMAMutateID = PPCVSXFMAMutate::ID;
341 char PPCVSXFMAMutate::ID = 0;
343 llvm::createPPCVSXFMAMutatePass() { return new PPCVSXFMAMutate(); }