3 . Remaining Instructions (Total 56 Instructions, include 2 unknow instructions)
4 . Done (Total 155 Instructions: 101 VSX, 54 Altivec)
6 //------------------------------------------------------------------------------
7 //. Remaining Instructions
8 //------------------------------------------------------------------------------
9 GCC reference: https://sourceware.org/ml/binutils/2015-11/msg00071.html
11 // Add PC Immediate Shifted DX-form p69
12 [PO RT d1 d0 XO d2] addpcis RT,D
13 subpcis Rx,value = addpcis Rx,-value
15 // 6.17.2 Decimal Integer Format Conversion Instructions
17 // Decimal Convert From National VX-form p352
18 [PO VRT EO VRB 1 PS XO] bcdcfn. VRT,VRB,PS
20 // Decimal Convert From Zoned VX-form p353
21 [PO VRT EO VRB 1 PS XO] bcdcfz. VRT,VRB,PS
23 // Decimal Convert To National VX-form p354
24 [PO VRT EO VRB 1 / XO] bcdctn. VRT,VRB
26 // Decimal Convert To Zoned VX-form p355
27 [PO VRT EO VRB 1 PS XO] bcdctz. VRT,VRB,PS
29 // Decimal Convert From Signed Quadword VX-form p356
30 [PO VRT EO VRB 1 PS XO] bcdcfsq. VRT,VRB,PS
32 // Decimal Convert To Signed Quadword VX-form p356
33 [PO VRT EO VRB 1 / XO] bcdctsq. VRT,VRB
35 // 6.17.3 Decimal Integer Sign Manipulation Instructions
37 // Decimal Copy Sign VX-form p358
38 [PO VRT VRA VRB XO] bcdcpsgn. VRT,VRA,VRB
40 // Decimal Set Sign VX-form p358
41 [PO VRT EO VRB 1 PS XO] bcdsetsgn. VRT,VRB,PS
43 // Decimal Shift VX-form p359
44 [PO VRT VRA VRB 1 PS XO] bcds. VRT,VRA,VRB,PS
46 // Decimal Unsigned Shift VX-form p360
47 [PO VRT VRA VRB 1 / XO] bcdus. VRT,VRA,VRB
49 // Decimal Shift and Round VX-form p361
50 [PO VRT VRA VRB 1 PS XO] bcdsr. VRT,VRA,VRB,PS
52 // 6.17.5 Decimal Integer Truncate Instructions
54 // Decimal Truncate VX-form p362
55 [PO VRT VRA VRB 1 PS XO] bcdtrunc. VRT,VRA,VRB,PS
57 // Decimal Unsigned Truncate VX-form p363
58 [PO VRT VRA VRB 1 / XO] bcdutrunc. VRT,VRA,VRB
60 // 3.3.10.1 Character-Type Compare Instructions
62 // Compare Ranged Byte X-form p87
63 [PO BF / L RA RB XO /] cmprb BF,L,RA,RB
65 // Compare Equal Byte X-form p88
66 [PO BF // RA RB XO /] cmpeqb BF,RA,RB
68 // 3.3.13 Fixed-Point Logical Instructions
70 // Count Trailing Zeros Word X-form p95
71 [PO RS RA /// XO Rc] cnttzw(.) RA,RS
73 // 3.3.13.1 64-bit Fixed-Point Logical Instructions
75 // Count Trailing Zeros Doubleword X-form p98
76 [PO RS RA /// XO Rc] cnttzd(.) RA,RS
78 // 4.4 Copy-Paste Facility
81 [PO /// L RA RB XO /] copy RA,RB,L
82 copy_first = copy RA, RB, 1
84 [PO /// /// /// XO /] cp_abort
87 [PO /// L RA RB XO Rc] paste(.) RA,RB,L
88 paste_last = paste RA,RB,1
90 // 3.3.9 Fixed-Point Arithmetic Instructions
92 // Deliver A Random Number X-form p79
93 [PO RT /// L /// XO /] darn RT,L
95 // Multiply-Add High Doubleword VA-form p81
96 [PO RT RA RB RC XO] maddhd RT,RA.RB,RC
98 // Multiply-Add High Doubleword Unsigned VA-form p81
99 [PO RT RA RB RC XO] maddhdu RT,RA.RB,RC
101 // Multiply-Add Low Doubleword VA-form p81
102 [PO RT RA RB RC XO] maddld RT,RA.RB,RC
104 // Modulo Signed Word X-form p76
105 [PO RT RA RB XO /] modsw RT,RA,RB
107 // Modulo Unsigned Word X-form p76
108 [PO RT RA RB XO /] moduw RT,RA,RB
110 // Modulo Signed Doubleword X-form p84
111 [PO RT RA RB XO /] modsd RT,RA,RB
113 // Modulo Unsigned Doubleword X-form p84
114 [PO RT RA RB XO /] modud RT,RA,RB
117 // DFP Test Significance Immediate [Quad] X-form p204
118 [PO BF / UIM FRB XO /] dtstsfi BF,UIM,FRB
119 [PO BF / UIM FRBp XO /] dtstsfiq BF,UIM,FRBp
121 // 3.3.14.2.1 64-bit Fixed-Point Shift Instructions
123 // Extend-Sign Word and Shift Left Immediate XS-form p109
124 [PO RS RA sh XO sh Rc] extswsli(.) RA,RS,SH
128 // Load Word Atomic X-form p864
129 [PO RT RA FC XO /] lwat RT,RA,FC
131 // Load Doubleword Atomic X-form p864
132 [PO RT RA FC XO /] ldat RT,RA,FC
134 // 4.5.2 Store Atomic
136 // Store Word Atomic X-form p866
137 [PO RS RA FC XO /] stwat RS,RA,FC
139 // Store Doubleword Atomic X-form p866
140 [PO RS RA FC XO /] stdat RS,RA,FC
142 // 3.3.2.1 64-bit Fixed-Point Load Instructions
144 // Load Doubleword Monitored Indexed X-form p54
145 [PO RT RA RB XO /] ldmx RT,RA,RB
147 // 3.3.16 Move To/From Vector-Scalar Register Instructions
149 // Move From VSR Lower Doubleword XX1-form p111
150 [PO S RA /// XO SX] mfvsrld RA,XS
152 // Move To VSR Double Doubleword XX1-form p114
153 [PO T RA RB XO TX] mtvsrdd XT,RA,RB
155 // Move To VSR Word & Splat XX1-form p115
156 [PO T RA /// XO TX] mtvsrws XT,RA
158 // Move to CR from XER Extended X-form p119
159 [PO BF // /// /// XO /] mcrxrx BF
161 // Set Boolean X-form p121
162 [PO RT BFA // /// XO /] setb RT,BFA
164 // Message Synchronize X-form p1126
165 [PO /// /// /// XO /] msgsync
167 // SLB Invalidate Entry Global X-form p1026
168 [PO RS /// RB XO /] slbieg RS,RB
170 // SLB Synchronize X-form p1031
171 [PO /// /// /// XO /] slbsync
173 // 3.3.2.1 Power-Saving Mode Instruction
176 [PO /// /// /// XO /] stop
178 // 4.6.4 Wait Instruction
180 [PO /// WC /// /// XO /] wait
182 // Unknow Instructions:
184 - gcc's implementation:
185 {"urfid", XL(19,306), 0xffffffff, POWER9, PPCNONE, {0}},
186 (4c 00 02 64|64 02 00 4c) urfid
189 - gcc's implementation:
190 {"rmieg", X(31,882), XRTRA_MASK, POWER9, PPCNONE, {RB}},
191 (7c 00 f6 e4|e4 f6 00 7c) rmieg r30
193 //------------------------------------------------------------------------------
195 //------------------------------------------------------------------------------
197 //======================================
200 //--------------------------------------
201 "7.6.1.2.1 VSX Scalar Move Instructions"
202 // VSX Scalar Quad-Precision Move Instructions
204 // VSX Scalar Copy Sign Quad-Precision X-form p.553
205 [PO VRT VRA VRB XO /] xscpsgnqp
207 // VSX Scalar Absolute Quad-Precision X-form 531
208 // VSX Scalar Negate Quad-Precision X-form 627
209 // VSX Scalar Negative Absolute Quad-Precision X-form 626
210 [PO VRT XO VRB XO /] xsabsqp xsnegqp xsnabsqp
212 //--------------------------------------
213 "7.6.1.3 VSX Floating-Point Arithmetic Instructions"
215 // VSX Scalar Quad-Precision Elementary Arithmetic
217 // VSX Scalar Add Quad-Precision [using round to Odd] X-form 539
218 // VSX Scalar Divide Quad-Precision [using round to Odd] X-form 584
219 // VSX Scalar Multiply Quad-Precision [using round to Odd] X-form 622
220 [PO VRT VRA VRB XO RO] xsaddqp xsaddqpo xsdivqp xsdivqpo xsmulqp xsmulqpo
222 // VSX Scalar Square Root Quad-Precision [using round to Odd] X-form 662
223 // VSX Scalar Subtract Quad-Precision [using round to Odd] X-form 667
226 [PO VRT XO VRB XO RO] xssqrtqp xssqrtqpo
228 // VSX Scalar Quad-Precision Multiply-Add Arithmetic Instructions
230 // VSX Scalar Multiply-Add Quad-Precision [using round to Odd] X-form 596
231 // VSX Scalar Multiply-Subtract Quad-Precision [using round to Odd] X-form 617
232 // VSX Scalar Negative Multiply-Add Quad-Precision [using round to Odd] X-form 636
233 // VSX Scalar Negative Multiply-Subtract Quad-Precision [using round to Odd]
235 [PO VRT VRA VRB XO RO] xsmaddqp xsmaddqpo xsmsubqp xsmsubqpo
236 xsnmaddqp xsnmaddqpo xsnmsubqp xsnmsubqpo
239 //--------------------------------------
240 "7.6.1.4 VSX Floating-Point Compare Instructions"
242 // VSX Scalar Quad-Precision Compare Instructions
244 // VSX Scalar Compare Ordered Quad-Precision X-form 549
245 // VSX Scalar Compare Unordered Quad-Precision X-form 552
246 [PO BF // VRA VRB XO /] xscmpoqp xscmpuqp
248 "7.6.1.8 VSX Scalar Floating-Point Support Instructions"
249 // VSX Scalar Compare Exponents Quad-Precision X-form p. 541 542
250 [PO BF // A B XO AX BX /] xscmpexpdp
251 [PO BF // VRA VRB XO /] xscmpexpqp
253 // VSX Scalar Compare DP, XX3-form, p.543 544 545
254 // VSX Scalar Compare Equal Double-Precision,
255 [PO T A B XO AX BX TX] xscmpeqdp xscmpgedp xscmpgtdp xscmpnedp
257 // VSX Vector Compare Not Equal Double-Precision XX3-form 691
258 [PO T A B Rc XO AX BX TX] xvcmpnedp xvcmpnedp. xvcmpnesp xvcmpnesp.
260 //--------------------------------------
261 "7.6.1.5 VSX FP-FP Conversion Instructions"
262 // VSX Scalar Quad-Precision Floating-Point Conversion Instructions
264 // VSX Scalar round & Convert Quad-Precision format to Double-Precision format
265 // [using round to Odd] X-form 567
266 [PO VRT XO VRB XO /] xscvqpdp xscvqpdpo (actually [PO VRT XO VRB XO RO])
267 [PO VRT XO VRB XO /] xscvdpqp
269 // VSX Scalar Quad-Precision Convert to Integer Instructions
271 // VSX Scalar truncate & Convert Quad-Precision format to Signed Doubleword format
273 [PO VRT XO VRB XO /] xscvqpsdz xscvqpswz xscvqpudz xscvqpuwz
274 576 = 580 xscvsdqp xscvudqp
276 "7.6.1.7 VSX Round to Floating-Point Integer Instructions"
277 // VSX Scalar round & Convert Double-Precision format to Half-Precision format
279 [PO T XO B XO BX TX] xscvdphp xscvhpdp
281 // VSX Vector Convert Half-Precision format to Single-Precision format
283 [PO T XO B XO BX TX] xvcvhpsp xvcvsphp
285 // VSX Scalar Round to Quad-Precision Integer [with Inexact] Z23-form 654
286 [PO VRT /// R VRB RMC XO EX] xsrqpi xsrqpix
288 // VSX Scalar Round Quad-Precision to Double-Extended Precision Z23-form 656
289 [PO VRT /// R VRB RMC XO /] xsrqpxp
290 def XSRQPXP : Z23Form_1<63, 37,
291 (outs vrrc:$vT), (ins u5imm:$R, vrrc:$vB, u2imm:$RMC),
292 "xsrqpxp $vT, $R, $vB, $RMC"), IIC_VecFP, []>;
295 //--------------------------------------
296 // VSX Scalar Insert Exponent Double-Precision X-form 588
297 // VSX Scalar Insert Exponent Quad-Precision X-form 589
298 [PO VT rA rB XO /] xsiexpdp
299 [PO VRT VRA VRB XO /] xsiexpqp
301 // VSX Vector Insert Exponent Double-Precision XX3-form 722
302 [PO T A B XO AX BX TX] xviexpdp xviexpsp
304 // VSX Vector Extract Unsigned Word XX2-form 788
305 // VSX Vector Insert Word XX2-form
306 [PO T / UIM B XO BX TX] xxextractuw xxinsertw
308 // VSX Scalar Extract Exponent Double-Precision XX2-form 676
309 [PO BF DCMX B XO BX /]
310 [PO T XO B XO BX /] xsxexpdp xsxsigdp
312 [PO VRT XO VRB XO /] xsxexpqp xsxsigqp
314 // VSX Vector Extract Exponent Double-Precision XX2-form 784
315 [PO T XO B XO BX TX] xvxexpdp xvxexpsp
317 // VSX Vector Extract Significand Double-Precision XX2-form 785
318 [PO T XO B XO BX TX] xvxsigdp xvxsigsp
320 //--------------------------------------
321 // VSX Scalar Test Data Class Double-Precision XX2-form p673
322 // VSX Scalar Test Data Class Quad-Precision X-form 674
323 // VSX Scalar Test Data Class Single-Precision XX2-form 675
324 [PO BF DCMX B XO BX /] xststdcdp xststdcsp
325 [PO BF DCMX VRB XO /] xststdcqp
327 // VSX Vector Test Data Class Double-Precision XX2-form 782 783
328 [PO T dx B XO dc XO dm BX TX] xvtstdcdp xvtstdcsp
330 //--------------------------------------
331 // VSX Scalar Maximum Type-C Double-Precision XX3-form 601 ~ 609
332 [PO T A B XO AX BX TX] xsmaxcdp xsmaxjdp xsmincdp xsminjdp
334 //--------------------------------------
335 // VSX Vector Byte-Reverse Doubleword XX2-form 786 787
336 [PO T XO B XO BX TX] xxbrd xxbrh xxbrq xxbrw
338 // VSX Vector Permute XX3-form 794
339 [PO T A B XO AX BX TX] xxperm xxpermr
341 // VSX Vector Splat Immediate Byte 796 x-form
342 [PO T EO IMM8 XO TX] xxspltib <= sign or unsigned?
345 //--------------------------------------
346 // Load VSX Vector DQ-form 511
347 [PO T RA DQ TX XO] lxv
349 // Store VSX Vector DQ-form 526
350 [PO S RA DQ SX XO] stxv
352 // Load VSX Scalar Doubleword DS-form 499
353 // Load VSX Scalar Single DS-form 504
354 [PO VRT RA DS XO] lxsd lxssp
356 // Store VSX Scalar Doubleword DS-form 517
357 // Store VSX Scalar Single DS-form 520
358 [PO VRT RA DS XO] stxsd stxssp
361 // Load VSX Vector Indexed X-form 511
362 // Load VSX Scalar as Integer Byte & Zero Indexed X-form 501
363 // Load VSX Vector Byte*16 Indexed X-form 506
364 // Load VSX Vector with Length X-form 508
365 // Load VSX Vector Left-justified with Length X-form 510
366 // Load VSX Vector Halfword*8 Indexed X-form 514
367 // Load VSX Vector Word & Splat Indexed X-form 516
368 [PO T RA RB XO TX] lxvx lxsibzx lxsihzx lxvb16x lxvl lxvll lxvh8x lxvwsx
370 // Store VSX Scalar as Integer Byte Indexed X-form 518
371 // Store VSX Scalar as Integer Halfword Indexed X-form 518
372 // Store VSX Vector Byte*16 Indexed X-form 522
373 // Store VSX Vector Halfword*8 Indexed X-form 524
374 // Store VSX Vector with Length X-form 526
375 // Store VSX Vector Left-justified with Length X-form 528
376 // Store VSX Vector Indexed X-form 529
377 [PO S RA RB XO SX] stxsibx stxsihx stxvb16x stxvh8x stxvl stxvll stxvx
381 //--------------------------------------
382 ". vector instructions"
384 [1] PowerISA-v3.0 p.933 - Table 1, and Chapter 6. Vector Facility (altivec)
385 [2] https://sourceware.org/ml/binutils/2015-11/msg00071.html
387 //--------------------------------------
389 // vector bit, p.367, 6.16 Vector Bit Permute Instruction
390 [PO VRT VRA VRB XO] vbpermd, (existing: vbpermq)
392 // vector permute, p.280
393 [PO VRT VRA VRB VRC XO] vpermr
395 // vector rotate left, p.341
396 [PO VRT VRA VRB XO] vrlwnm vrlwmi vrldnm vrldmi
398 // vector shift, p.285
399 [PO VRT VRA VRB XO] vslv vsrv
401 // vector multiply-by-10, p.375
402 [PO VRT VRA /// XO] vmul10cuq vmul10uq
403 [PO VRT VRA VRB XO] vmul10ecuq vmul10euq
406 //--------------------------------------
407 http://reviews.llvm.org/D15887 + ext + neg + prty - vbpermd
408 // vector count leading/trailing zero
409 . new vx-form: p.31, 1.6.14 VX-FORM
410 [PO RT EO VRB XO] vclzlsbb vctzlsbb (p.363)
412 // Vector Count Trailing Zeros Instructions, 362
413 [PO VRT EO VRB XO] vctzb vctzh vctzw vctzd (v16i8 v8i16 v4i32 v2i64)
415 // vector extend sign (p.314)
416 [PO VRT EO VRB XO] vextsb2w vextsh2w vextsb2d vextsh2d vextsw2d
418 // vector negate, p.313
419 [PO VRT EO VRB XO] vnegd vnegw
421 // vector parity, p.335
422 [PO VRT EO VRB XO] vprtybd vprtybq vprtybw
425 //--------------------------------------
426 // vector compare, p.330
427 [PO VRT VRA VRB RC XO] vcmpneb vcmpneb. vcmpneh vcmpneh. vcmpnew vcmpnew.
428 vcmpnezb vcmpnezb. vcmpnezh vcmpnezh. vcmpnezw vcmpnezw.
430 //--------------------------------------
431 http://reviews.llvm.org/D15917 + insert
432 // vector extract (p.287) ref: vspltb (v2.07, p.227)
433 // vector insert, p.288
434 [PO VRT / UIM VRB XO] vinsertb vinsertd vinserth vinsertw
436 // Vector Extract Unsigned
437 [PO VRT / UIM VRB XO] vextractub vextractuh vextractuw vextractd
439 // p.364: Vector Extract Unsigned Left/Right-Indexed
440 [PO RT RA VRB XO] vextublx vextubrx vextuhlx vextuhrx vextuwlx vextuwrx