contrib/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp

   1 //===-- RISCVELFObjectWriter.cpp - RISCV ELF Writer -----------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 #include "MCTargetDesc/RISCVFixupKinds.h"
  11 #include "MCTargetDesc/RISCVMCTargetDesc.h"
  12 #include "llvm/MC/MCELFObjectWriter.h"
  13 #include "llvm/MC/MCFixup.h"
  14 #include "llvm/MC/MCObjectWriter.h"
  15 #include "llvm/Support/ErrorHandling.h"
  16
  17 using namespace llvm;
  18
  19 namespace {
  20 class RISCVELFObjectWriter : public MCELFObjectTargetWriter {
  21 public:
  22   RISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit);
  23
  24   ~RISCVELFObjectWriter() override;
  25
  26   // Return true if the given relocation must be with a symbol rather than
  27   // section plus offset.
  28   bool needsRelocateWithSymbol(const MCSymbol &Sym,
  29                                unsigned Type) const override {
  30     // TODO: this is very conservative, update once RISC-V psABI requirements
  31     //       are clarified.
  32     return true;
  33   }
  34
  35 protected:
  36   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
  37                         const MCFixup &Fixup, bool IsPCRel) const override;
  38 };
  39 }
  40
  41 RISCVELFObjectWriter::RISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit)
  42     : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_RISCV,
  43                               /*HasRelocationAddend*/ true) {}
  44
  45 RISCVELFObjectWriter::~RISCVELFObjectWriter() {}
  46
  47 unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
  48                                             const MCValue &Target,
  49                                             const MCFixup &Fixup,
  50                                             bool IsPCRel) const {
  51   // Determine the type of the relocation
  52   switch ((unsigned)Fixup.getKind()) {
  53   default:
  54     llvm_unreachable("invalid fixup kind!");
  55   case FK_Data_4:
  56     return ELF::R_RISCV_32;
  57   case FK_Data_8:
  58     return ELF::R_RISCV_64;
  59   case FK_Data_Add_1:
  60     return ELF::R_RISCV_ADD8;
  61   case FK_Data_Add_2:
  62     return ELF::R_RISCV_ADD16;
  63   case FK_Data_Add_4:
  64     return ELF::R_RISCV_ADD32;
  65   case FK_Data_Add_8:
  66     return ELF::R_RISCV_ADD64;
  67   case FK_Data_Sub_1:
  68     return ELF::R_RISCV_SUB8;
  69   case FK_Data_Sub_2:
  70     return ELF::R_RISCV_SUB16;
  71   case FK_Data_Sub_4:
  72     return ELF::R_RISCV_SUB32;
  73   case FK_Data_Sub_8:
  74     return ELF::R_RISCV_SUB64;
  75   case RISCV::fixup_riscv_hi20:
  76     return ELF::R_RISCV_HI20;
  77   case RISCV::fixup_riscv_lo12_i:
  78     return ELF::R_RISCV_LO12_I;
  79   case RISCV::fixup_riscv_lo12_s:
  80     return ELF::R_RISCV_LO12_S;
  81   case RISCV::fixup_riscv_pcrel_hi20:
  82     return ELF::R_RISCV_PCREL_HI20;
  83   case RISCV::fixup_riscv_pcrel_lo12_i:
  84     return ELF::R_RISCV_PCREL_LO12_I;
  85   case RISCV::fixup_riscv_pcrel_lo12_s:
  86     return ELF::R_RISCV_PCREL_LO12_S;
  87   case RISCV::fixup_riscv_jal:
  88     return ELF::R_RISCV_JAL;
  89   case RISCV::fixup_riscv_branch:
  90     return ELF::R_RISCV_BRANCH;
  91   case RISCV::fixup_riscv_rvc_jump:
  92     return ELF::R_RISCV_RVC_JUMP;
  93   case RISCV::fixup_riscv_rvc_branch:
  94     return ELF::R_RISCV_RVC_BRANCH;
  95   case RISCV::fixup_riscv_call:
  96     return ELF::R_RISCV_CALL;
  97   case RISCV::fixup_riscv_relax:
  98     return ELF::R_RISCV_RELAX;
  99   }
 100 }
 101
 102 std::unique_ptr<MCObjectTargetWriter>
 103 llvm::createRISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit) {
 104   return llvm::make_unique<RISCVELFObjectWriter>(OSABI, Is64Bit);
 105 }