1 //===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
14 // Target-independent interfaces which we are implementing
15 //===----------------------------------------------------------------------===//
17 include "llvm/Target/Target.td"
19 //===----------------------------------------------------------------------===//
20 // SPARC Subtarget features.
24 : SubtargetFeature<"v9", "IsV9", "true",
25 "Enable SPARC-V9 instructions">;
26 def FeatureV8Deprecated
27 : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true",
28 "Enable deprecated V8 instructions in V9 mode">;
30 : SubtargetFeature<"vis", "IsVIS", "true",
31 "Enable UltraSPARC Visual Instruction Set extensions">;
33 : SubtargetFeature<"vis2", "IsVIS2", "true",
34 "Enable Visual Instruction Set extensions II">;
36 : SubtargetFeature<"vis3", "IsVIS3", "true",
37 "Enable Visual Instruction Set extensions III">;
39 : SubtargetFeature<"leon", "IsLeon", "true",
40 "Enable LEON extensions">;
43 : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true",
44 "Enable quad-word floating point instructions">;
46 def UsePopc : SubtargetFeature<"popc", "UsePopc", "true",
47 "Use the popc (population count) instruction">;
49 def FeatureSoftFloat : SubtargetFeature<"soft-float", "UseSoftFloat", "true",
50 "Use software emulation for floating point">;
52 //==== Features added predmoninantly for LEON subtarget support
53 include "LeonFeatures.td"
55 //===----------------------------------------------------------------------===//
56 // Register File, Calling Conv, Instruction Descriptions
57 //===----------------------------------------------------------------------===//
59 include "SparcRegisterInfo.td"
60 include "SparcCallingConv.td"
61 include "SparcSchedule.td"
62 include "SparcInstrInfo.td"
64 def SparcInstrInfo : InstrInfo;
66 def SparcAsmParser : AsmParser {
67 bit ShouldEmitMatchRegisterName = 0;
70 //===----------------------------------------------------------------------===//
71 // SPARC processors supported.
72 //===----------------------------------------------------------------------===//
74 class Proc<string Name, list<SubtargetFeature> Features>
75 : Processor<Name, NoItineraries, Features>;
77 def : Proc<"generic", []>;
80 def : Proc<"supersparc", []>;
81 def : Proc<"sparclite", []>;
82 def : Proc<"f934", []>;
83 def : Proc<"hypersparc", []>;
84 def : Proc<"sparclite86x", []>;
85 def : Proc<"sparclet", []>;
86 def : Proc<"tsc701", []>;
87 def : Proc<"myriad2", [FeatureLeon, LeonCASA]>;
88 def : Proc<"myriad2.1", [FeatureLeon, LeonCASA]>;
89 def : Proc<"myriad2.2", [FeatureLeon, LeonCASA]>;
90 def : Proc<"ma2100", [FeatureLeon, LeonCASA]>;
91 def : Proc<"ma2150", [FeatureLeon, LeonCASA]>;
92 def : Proc<"ma2450", [FeatureLeon, LeonCASA]>;
93 def : Proc<"v9", [FeatureV9]>;
94 def : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
95 def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated, FeatureVIS,
97 def : Proc<"niagara", [FeatureV9, FeatureV8Deprecated, FeatureVIS,
99 def : Proc<"niagara2", [FeatureV9, FeatureV8Deprecated, UsePopc,
100 FeatureVIS, FeatureVIS2]>;
101 def : Proc<"niagara3", [FeatureV9, FeatureV8Deprecated, UsePopc,
102 FeatureVIS, FeatureVIS2]>;
103 def : Proc<"niagara4", [FeatureV9, FeatureV8Deprecated, UsePopc,
104 FeatureVIS, FeatureVIS2, FeatureVIS3]>;
107 def : Processor<"leon2", LEON2Itineraries,
110 // LEON 2 FT (AT697E)
111 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
112 def : Processor<"at697e", LEON2Itineraries,
113 [FeatureLeon, ReplaceSDIV, InsertNOPLoad]>;
115 // LEON 2 FT (AT697F)
116 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
117 def : Processor<"at697f", LEON2Itineraries,
118 [FeatureLeon, InsertNOPLoad]>;
122 def : Processor<"leon3", LEON3Itineraries,
123 [FeatureLeon, UMACSMACSupport]>;
125 // LEON 3 FT (UT699). Provides features for the UT699 processor
126 // - covers all the erratum fixes for LEON3, but does not support the CASA instruction.
127 def : Processor<"ut699", LEON3Itineraries,
128 [FeatureLeon, InsertNOPLoad, FixFSMULD, ReplaceFMULS, FixAllFDIVSQRT]>;
130 // LEON3 FT (GR712RC). Provides features for the GR712RC processor.
131 // - covers all the erratum fixed for LEON3 and support for the CASA instruction.
132 def : Processor<"gr712rc", LEON3Itineraries,
133 [FeatureLeon, LeonCASA]>;
136 def : Processor<"leon4", LEON4Itineraries,
137 [FeatureLeon, UMACSMACSupport, LeonCASA]>;
140 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
141 def : Processor<"gr740", LEON4Itineraries,
142 [FeatureLeon, UMACSMACSupport, LeonCASA]>;
144 //===----------------------------------------------------------------------===//
145 // Declare the target which we are implementing
146 //===----------------------------------------------------------------------===//
148 def SparcAsmWriter : AsmWriter {
149 string AsmWriterClassName = "InstPrinter";
150 int PassSubtarget = 1;
155 // Pull in Instruction Info:
156 let InstructionSet = SparcInstrInfo;
157 let AssemblyParsers = [SparcAsmParser];
158 let AssemblyWriters = [SparcAsmWriter];