1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18 def SDT_ZICmp : SDTypeProfile<0, 3,
21 def SDT_ZBRCCMask : SDTypeProfile<0, 3,
24 SDTCisVT<2, OtherVT>]>;
25 def SDT_ZSelectCCMask : SDTypeProfile<1, 4,
30 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
33 def SDT_ZWrapOffset : SDTypeProfile<1, 2,
37 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
38 def SDT_ZExtractAccess : SDTypeProfile<1, 1,
41 def SDT_ZGR128Binary32 : SDTypeProfile<1, 2,
42 [SDTCisVT<0, untyped>,
45 def SDT_ZGR128Binary64 : SDTypeProfile<1, 2,
46 [SDTCisVT<0, untyped>,
49 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
56 def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6,
64 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
68 def SDT_ZMemMemLoop : SDTypeProfile<0, 4,
73 def SDT_ZString : SDTypeProfile<1, 3,
78 def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>;
79 def SDT_ZPrefetch : SDTypeProfile<0, 2,
82 def SDT_ZLoadBSwap : SDTypeProfile<1, 2,
85 SDTCisVT<2, OtherVT>]>;
86 def SDT_ZStoreBSwap : SDTypeProfile<0, 3,
89 SDTCisVT<2, OtherVT>]>;
90 def SDT_ZTBegin : SDTypeProfile<0, 2,
93 def SDT_ZInsertVectorElt : SDTypeProfile<1, 3,
97 def SDT_ZExtractVectorElt : SDTypeProfile<1, 2,
100 def SDT_ZReplicate : SDTypeProfile<1, 1,
102 def SDT_ZVecUnaryConv : SDTypeProfile<1, 1,
105 def SDT_ZVecUnary : SDTypeProfile<1, 1,
107 SDTCisSameAs<0, 1>]>;
108 def SDT_ZVecBinary : SDTypeProfile<1, 2,
111 SDTCisSameAs<0, 2>]>;
112 def SDT_ZVecBinaryInt : SDTypeProfile<1, 2,
116 def SDT_ZVecBinaryConv : SDTypeProfile<1, 2,
119 SDTCisSameAs<1, 2>]>;
120 def SDT_ZVecBinaryConvInt : SDTypeProfile<1, 2,
124 def SDT_ZRotateMask : SDTypeProfile<1, 2,
128 def SDT_ZJoinDwords : SDTypeProfile<1, 2,
132 def SDT_ZVecTernary : SDTypeProfile<1, 3,
136 SDTCisSameAs<0, 3>]>;
137 def SDT_ZVecTernaryInt : SDTypeProfile<1, 3,
142 def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4,
148 def SDT_ZTest : SDTypeProfile<0, 2, [SDTCisVT<1, i64>]>;
150 //===----------------------------------------------------------------------===//
152 //===----------------------------------------------------------------------===//
154 // These are target-independent nodes, but have target-specific formats.
155 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
156 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
157 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
158 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
160 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
162 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
163 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
164 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
165 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
166 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
168 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
169 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
171 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
172 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
174 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
175 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
177 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
178 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET",
179 SDT_ZWrapOffset, []>;
180 def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>;
181 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>;
182 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>;
183 def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>;
184 def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
185 [SDNPHasChain, SDNPInGlue]>;
186 def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
188 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
189 def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS",
191 def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>;
192 def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
193 def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
194 def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
195 def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
196 def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
198 def z_serialize : SDNode<"SystemZISD::SERIALIZE", SDTNone,
199 [SDNPHasChain, SDNPMayStore]>;
200 def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone,
201 [SDNPHasChain, SDNPSideEffect]>;
203 def z_loadbswap : SDNode<"SystemZISD::LRV", SDT_ZLoadBSwap,
204 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
205 def z_storebswap : SDNode<"SystemZISD::STRV", SDT_ZStoreBSwap,
206 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
208 def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest, [SDNPOutGlue]>;
210 // Defined because the index is an i32 rather than a pointer.
211 def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
212 SDT_ZInsertVectorElt>;
213 def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
214 SDT_ZExtractVectorElt>;
215 def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>;
216 def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>;
217 def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>;
218 def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>;
219 def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>;
220 def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>;
221 def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>;
222 def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>;
223 def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS",
225 def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>;
226 def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>;
227 def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConv,
229 def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConv,
231 def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>;
232 def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>;
233 def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>;
234 def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>;
235 def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR",
237 def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR",
239 def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR",
241 def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>;
242 def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>;
243 def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>;
244 def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>;
245 def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinary,
247 def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinary,
249 def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinary,
251 def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>;
252 def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>;
253 def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>;
254 def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConv,
256 def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConv,
258 def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConv,
260 def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>;
261 def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>;
262 def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp, [SDNPOutGlue]>;
263 def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryInt,
265 def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryInt,
267 def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinary,
269 def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinary,
271 def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinary,
273 def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinary,
275 def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnary,
277 def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", SDT_ZVecQuaternaryInt,
279 def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC",
280 SDT_ZVecQuaternaryInt, [SDNPOutGlue]>;
281 def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvInt,
284 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
285 : SDNode<"SystemZISD::"##name, profile,
286 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
288 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
289 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
290 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
291 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
292 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
293 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
294 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
295 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
296 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
297 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
298 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
299 def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
301 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
302 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
303 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
304 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
305 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
306 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
307 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
308 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
309 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
310 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
311 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
312 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
313 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
314 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
315 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
316 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
317 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
318 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
319 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop,
320 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
321 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString,
322 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
323 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
324 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
325 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString,
326 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
327 def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic,
329 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
330 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
333 def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin,
334 [SDNPHasChain, SDNPOutGlue, SDNPMayStore,
336 def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin,
337 [SDNPHasChain, SDNPOutGlue, SDNPMayStore,
339 def z_tend : SDNode<"SystemZISD::TEND", SDTNone,
340 [SDNPHasChain, SDNPOutGlue, SDNPSideEffect]>;
342 def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>;
343 def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>;
344 def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>;
346 //===----------------------------------------------------------------------===//
348 //===----------------------------------------------------------------------===//
350 def z_lrvh : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i16)>;
351 def z_lrv : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i32)>;
352 def z_lrvg : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i64)>;
354 def z_strvh : PatFrag<(ops node:$src, node:$addr),
355 (z_storebswap node:$src, node:$addr, i16)>;
356 def z_strv : PatFrag<(ops node:$src, node:$addr),
357 (z_storebswap node:$src, node:$addr, i32)>;
358 def z_strvg : PatFrag<(ops node:$src, node:$addr),
359 (z_storebswap node:$src, node:$addr, i64)>;
361 // Signed and unsigned comparisons.
362 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
363 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
364 return Type != SystemZICMP::UnsignedOnly;
366 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
367 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
368 return Type != SystemZICMP::SignedOnly;
371 // Register- and memory-based TEST UNDER MASK.
372 def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>;
373 def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>;
375 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
376 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
377 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
378 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
380 // Match extensions of an i32 to an i64, followed by an in-register sign
381 // extension from a sub-i32 value.
382 def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>;
383 def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>;
385 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
386 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
387 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
388 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
390 // Match extensions of an i32 to an i64, followed by an AND of the low
392 def zext8dbl : PatFrag<(ops node:$src), (zext8 (anyext node:$src))>;
393 def zext16dbl : PatFrag<(ops node:$src), (zext16 (anyext node:$src))>;
395 // Typed floating-point loads.
396 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
397 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
399 // Extending loads in which the extension type can be signed.
400 def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
401 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
402 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
404 def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
405 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
407 def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
408 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
410 def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
411 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
414 // Extending loads in which the extension type can be unsigned.
415 def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
416 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
417 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
419 def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
420 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
422 def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
423 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
425 def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
426 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
429 // Extending loads in which the extension type doesn't matter.
430 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
431 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
433 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
434 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
436 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
437 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
439 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
440 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
444 class AlignedLoad<SDPatternOperator load>
445 : PatFrag<(ops node:$addr), (load node:$addr), [{
446 auto *Load = cast<LoadSDNode>(N);
447 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
449 def aligned_load : AlignedLoad<load>;
450 def aligned_asextloadi16 : AlignedLoad<asextloadi16>;
451 def aligned_asextloadi32 : AlignedLoad<asextloadi32>;
452 def aligned_azextloadi16 : AlignedLoad<azextloadi16>;
453 def aligned_azextloadi32 : AlignedLoad<azextloadi32>;
456 class AlignedStore<SDPatternOperator store>
457 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
458 auto *Store = cast<StoreSDNode>(N);
459 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
461 def aligned_store : AlignedStore<store>;
462 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
463 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
465 // Non-volatile loads. Used for instructions that might access the storage
466 // location multiple times.
467 class NonvolatileLoad<SDPatternOperator load>
468 : PatFrag<(ops node:$addr), (load node:$addr), [{
469 auto *Load = cast<LoadSDNode>(N);
470 return !Load->isVolatile();
472 def nonvolatile_load : NonvolatileLoad<load>;
473 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
474 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
475 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
477 // Non-volatile stores.
478 class NonvolatileStore<SDPatternOperator store>
479 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
480 auto *Store = cast<StoreSDNode>(N);
481 return !Store->isVolatile();
483 def nonvolatile_store : NonvolatileStore<store>;
484 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
485 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
486 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
488 // A store of a load that can be implemented using MVC.
489 def mvc_store : PatFrag<(ops node:$value, node:$addr),
490 (unindexedstore node:$value, node:$addr),
491 [{ return storeLoadCanUseMVC(N); }]>;
493 // Binary read-modify-write operations on memory in which the other
494 // operand is also memory and for which block operations like NC can
495 // be used. There are two patterns for each operator, depending on
496 // which operand contains the "other" load.
497 multiclass block_op<SDPatternOperator operator> {
498 def "1" : PatFrag<(ops node:$value, node:$addr),
499 (unindexedstore (operator node:$value,
500 (unindexedload node:$addr)),
502 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
503 def "2" : PatFrag<(ops node:$value, node:$addr),
504 (unindexedstore (operator (unindexedload node:$addr),
507 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
509 defm block_and : block_op<and>;
510 defm block_or : block_op<or>;
511 defm block_xor : block_op<xor>;
514 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
515 (or (and node:$src1, -256), node:$src2)>;
516 def insertll : PatFrag<(ops node:$src1, node:$src2),
517 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
518 def insertlh : PatFrag<(ops node:$src1, node:$src2),
519 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
520 def inserthl : PatFrag<(ops node:$src1, node:$src2),
521 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
522 def inserthh : PatFrag<(ops node:$src1, node:$src2),
523 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
524 def insertlf : PatFrag<(ops node:$src1, node:$src2),
525 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
526 def inserthf : PatFrag<(ops node:$src1, node:$src2),
527 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
529 // ORs that can be treated as insertions.
530 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
531 (or node:$src1, node:$src2), [{
532 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
533 return CurDAG->MaskedValueIsZero(N->getOperand(0),
534 APInt::getLowBitsSet(BitWidth, 8));
537 // ORs that can be treated as reversed insertions.
538 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
539 (or node:$src1, node:$src2), [{
540 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
541 return CurDAG->MaskedValueIsZero(N->getOperand(1),
542 APInt::getLowBitsSet(BitWidth, 8));
545 // Negative integer absolute.
546 def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>;
548 // Integer absolute, matching the canonical form generated by DAGCombiner.
549 def z_iabs32 : PatFrag<(ops node:$src),
550 (xor (add node:$src, (sra node:$src, (i32 31))),
551 (sra node:$src, (i32 31)))>;
552 def z_iabs64 : PatFrag<(ops node:$src),
553 (xor (add node:$src, (sra node:$src, (i32 63))),
554 (sra node:$src, (i32 63)))>;
555 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
556 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
558 // Integer multiply-and-add
559 def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3),
560 (add (mul node:$src1, node:$src2), node:$src3)>;
562 // Fused multiply-subtract, using the natural operand order.
563 def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
564 (fma node:$src1, node:$src2, (fneg node:$src3))>;
566 // Fused multiply-add and multiply-subtract, but with the order of the
567 // operands matching SystemZ's MA and MS instructions.
568 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
569 (fma node:$src2, node:$src3, node:$src1)>;
570 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
571 (fma node:$src2, node:$src3, (fneg node:$src1))>;
573 // Floating-point negative absolute.
574 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
576 // Create a unary operator that loads from memory and then performs
577 // the given operation on it.
578 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
579 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
581 // Create a store operator that performs the given unary operation
582 // on the value before storing it.
583 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
584 : PatFrag<(ops node:$value, node:$addr),
585 (store (operator node:$value), node:$addr)>;
587 // Vector representation of all-zeros and all-ones.
588 def z_vzero : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 0))))>;
589 def z_vones : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 65535))))>;
591 // Load a scalar and replicate it in all elements of a vector.
592 class z_replicate_load<ValueType scalartype, SDPatternOperator load>
593 : PatFrag<(ops node:$addr),
594 (z_replicate (scalartype (load node:$addr)))>;
595 def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>;
596 def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>;
597 def z_replicate_loadi32 : z_replicate_load<i32, load>;
598 def z_replicate_loadi64 : z_replicate_load<i64, load>;
599 def z_replicate_loadf32 : z_replicate_load<f32, load>;
600 def z_replicate_loadf64 : z_replicate_load<f64, load>;
602 // Load a scalar and insert it into a single element of a vector.
603 class z_vle<ValueType scalartype, SDPatternOperator load>
604 : PatFrag<(ops node:$vec, node:$addr, node:$index),
605 (z_vector_insert node:$vec, (scalartype (load node:$addr)),
607 def z_vlei8 : z_vle<i32, anyextloadi8>;
608 def z_vlei16 : z_vle<i32, anyextloadi16>;
609 def z_vlei32 : z_vle<i32, load>;
610 def z_vlei64 : z_vle<i64, load>;
611 def z_vlef32 : z_vle<f32, load>;
612 def z_vlef64 : z_vle<f64, load>;
614 // Load a scalar and insert it into the low element of the high i64 of a
616 class z_vllez<ValueType scalartype, SDPatternOperator load, int index>
617 : PatFrag<(ops node:$addr),
618 (z_vector_insert (z_vzero),
619 (scalartype (load node:$addr)), (i32 index))>;
620 def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>;
621 def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>;
622 def z_vllezi32 : z_vllez<i32, load, 1>;
623 def z_vllezi64 : PatFrag<(ops node:$addr),
624 (z_join_dwords (i64 (load node:$addr)), (i64 0))>;
625 // We use high merges to form a v4f32 from four f32s. Propagating zero
626 // into all elements but index 1 gives this expression.
627 def z_vllezf32 : PatFrag<(ops node:$addr),
634 (v4f32 (scalar_to_vector
635 (f32 (load node:$addr)))))))),
636 (v2i64 (z_vzero))))>;
637 def z_vllezf64 : PatFrag<(ops node:$addr),
639 (scalar_to_vector (f64 (load node:$addr))),
642 // Store one element of a vector.
643 class z_vste<ValueType scalartype, SDPatternOperator store>
644 : PatFrag<(ops node:$vec, node:$addr, node:$index),
645 (store (scalartype (z_vector_extract node:$vec, node:$index)),
647 def z_vstei8 : z_vste<i32, truncstorei8>;
648 def z_vstei16 : z_vste<i32, truncstorei16>;
649 def z_vstei32 : z_vste<i32, store>;
650 def z_vstei64 : z_vste<i64, store>;
651 def z_vstef32 : z_vste<f32, store>;
652 def z_vstef64 : z_vste<f64, store>;
654 // Arithmetic negation on vectors.
655 def z_vneg : PatFrag<(ops node:$x), (sub (z_vzero), node:$x)>;
657 // Bitwise negation on vectors.
658 def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (z_vones))>;
660 // Signed "integer greater than zero" on vectors.
661 def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (z_vzero))>;
663 // Signed "integer less than zero" on vectors.
664 def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (z_vzero), node:$x)>;
666 // Integer absolute on vectors.
667 class z_viabs<int shift>
668 : PatFrag<(ops node:$src),
669 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))),
670 (z_vsra_by_scalar node:$src, (i32 shift)))>;
671 def z_viabs8 : z_viabs<7>;
672 def z_viabs16 : z_viabs<15>;
673 def z_viabs32 : z_viabs<31>;
674 def z_viabs64 : z_viabs<63>;
676 // Sign-extend the i64 elements of a vector.
677 class z_vse<int shift>
678 : PatFrag<(ops node:$src),
679 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>;
680 def z_vsei8 : z_vse<56>;
681 def z_vsei16 : z_vse<48>;
682 def z_vsei32 : z_vse<32>;
684 // ...and again with the extensions being done on individual i64 scalars.
685 class z_vse_by_parts<SDPatternOperator operator, int index1, int index2>
686 : PatFrag<(ops node:$src),
688 (operator (z_vector_extract node:$src, index1)),
689 (operator (z_vector_extract node:$src, index2)))>;
690 def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>;
691 def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>;
692 def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>;